Commit | Line | Data |
---|---|---|
ec9653b8 SA |
1 | /include/ "skeleton.dtsi" |
2 | ||
3 | / { | |
4 | compatible = "brcm,bcm2835"; | |
5 | model = "BCM2835"; | |
89214f00 | 6 | interrupt-parent = <&intc>; |
ec9653b8 SA |
7 | |
8 | chosen { | |
407f9be4 | 9 | bootargs = "earlyprintk console=ttyAMA0"; |
ec9653b8 SA |
10 | }; |
11 | ||
12 | soc { | |
13 | compatible = "simple-bus"; | |
14 | #address-cells = <1>; | |
15 | #size-cells = <1>; | |
16 | ranges = <0x7e000000 0x20000000 0x02000000>; | |
89214f00 | 17 | |
25b2f1bd | 18 | timer@7e003000 { |
ee4af569 SA |
19 | compatible = "brcm,bcm2835-system-timer"; |
20 | reg = <0x7e003000 0x1000>; | |
21 | interrupts = <1 0>, <1 1>, <1 2>, <1 3>; | |
22 | clock-frequency = <1000000>; | |
23 | }; | |
24 | ||
89072339 FM |
25 | dma: dma@7e007000 { |
26 | compatible = "brcm,bcm2835-dma"; | |
27 | reg = <0x7e007000 0xf00>; | |
28 | interrupts = <1 16>, | |
29 | <1 17>, | |
30 | <1 18>, | |
31 | <1 19>, | |
32 | <1 20>, | |
33 | <1 21>, | |
34 | <1 22>, | |
35 | <1 23>, | |
36 | <1 24>, | |
37 | <1 25>, | |
38 | <1 26>, | |
39 | <1 27>, | |
40 | <1 28>; | |
41 | ||
42 | #dma-cells = <1>; | |
43 | brcm,dma-channel-mask = <0x7f35>; | |
44 | }; | |
45 | ||
25b2f1bd | 46 | intc: interrupt-controller@7e00b200 { |
89214f00 SA |
47 | compatible = "brcm,bcm2835-armctrl-ic"; |
48 | reg = <0x7e00b200 0x200>; | |
49 | interrupt-controller; | |
50 | #interrupt-cells = <2>; | |
51 | }; | |
407f9be4 | 52 | |
25b2f1bd | 53 | watchdog@7e100000 { |
d0f1c7ff SW |
54 | compatible = "brcm,bcm2835-pm-wdt"; |
55 | reg = <0x7e100000 0x28>; | |
56 | }; | |
57 | ||
25b2f1bd | 58 | rng@7e104000 { |
a1bf7082 LR |
59 | compatible = "brcm,bcm2835-rng"; |
60 | reg = <0x7e104000 0x10>; | |
61 | }; | |
62 | ||
25b2f1bd | 63 | gpio: gpio@7e200000 { |
805504ab SW |
64 | compatible = "brcm,bcm2835-gpio"; |
65 | reg = <0x7e200000 0xb4>; | |
66 | /* | |
67 | * The GPIO IP block is designed for 3 banks of GPIOs. | |
68 | * Each bank has a GPIO interrupt for itself. | |
69 | * There is an overall "any bank" interrupt. | |
70 | * In order, these are GIC interrupts 17, 18, 19, 20. | |
71 | * Since the BCM2835 only has 2 banks, the 2nd bank | |
72 | * interrupt output appears to be mirrored onto the | |
73 | * 3rd bank's interrupt signal. | |
74 | * So, a bank0 interrupt shows up on 17, 20, and | |
75 | * a bank1 interrupt shows up on 18, 19, 20! | |
76 | */ | |
77 | interrupts = <2 17>, <2 18>, <2 19>, <2 20>; | |
78 | ||
79 | gpio-controller; | |
80 | #gpio-cells = <2>; | |
81 | ||
82 | interrupt-controller; | |
83 | #interrupt-cells = <2>; | |
84 | }; | |
5186bf28 | 85 | |
25b2f1bd | 86 | uart@7e201000 { |
ef3c690c SW |
87 | compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; |
88 | reg = <0x7e201000 0x1000>; | |
89 | interrupts = <2 25>; | |
90 | clock-frequency = <3000000>; | |
91 | arm,primecell-periphid = <0x00241011>; | |
92 | }; | |
93 | ||
9511cc4d FM |
94 | i2s: i2s@7e203000 { |
95 | compatible = "brcm,bcm2835-i2s"; | |
96 | reg = <0x7e203000 0x20>, | |
97 | <0x7e101098 0x02>; | |
98 | ||
99 | dmas = <&dma 2>, | |
100 | <&dma 3>; | |
101 | dma-names = "tx", "rx"; | |
667bbd53 | 102 | status = "disabled"; |
9511cc4d FM |
103 | }; |
104 | ||
25b2f1bd | 105 | spi: spi@7e204000 { |
6ce5f02e SW |
106 | compatible = "brcm,bcm2835-spi"; |
107 | reg = <0x7e204000 0x1000>; | |
108 | interrupts = <2 22>; | |
109 | clocks = <&clk_spi>; | |
110 | #address-cells = <1>; | |
111 | #size-cells = <0>; | |
112 | status = "disabled"; | |
113 | }; | |
114 | ||
232fed48 SW |
115 | i2c0: i2c@20205000 { |
116 | compatible = "brcm,bcm2835-i2c"; | |
117 | reg = <0x7e205000 0x1000>; | |
118 | interrupts = <2 21>; | |
119 | clocks = <&clk_i2c>; | |
a31ab44e SW |
120 | #address-cells = <1>; |
121 | #size-cells = <0>; | |
232fed48 SW |
122 | status = "disabled"; |
123 | }; | |
124 | ||
25b2f1bd | 125 | sdhci: sdhci@7e300000 { |
ef3c690c SW |
126 | compatible = "brcm,bcm2835-sdhci"; |
127 | reg = <0x7e300000 0x100>; | |
128 | interrupts = <2 30>; | |
129 | clocks = <&clk_mmc>; | |
130 | status = "disabled"; | |
131 | }; | |
132 | ||
25b2f1bd | 133 | i2c1: i2c@7e804000 { |
232fed48 SW |
134 | compatible = "brcm,bcm2835-i2c"; |
135 | reg = <0x7e804000 0x1000>; | |
136 | interrupts = <2 21>; | |
137 | clocks = <&clk_i2c>; | |
a31ab44e SW |
138 | #address-cells = <1>; |
139 | #size-cells = <0>; | |
232fed48 SW |
140 | status = "disabled"; |
141 | }; | |
142 | ||
25b2f1bd | 143 | usb@7e980000 { |
5631e7f4 SW |
144 | compatible = "brcm,bcm2835-usb"; |
145 | reg = <0x7e980000 0x10000>; | |
146 | interrupts = <1 9>; | |
147 | }; | |
14ac652b VW |
148 | |
149 | arm-pmu { | |
150 | compatible = "arm,arm1176-pmu"; | |
151 | }; | |
5186bf28 SW |
152 | }; |
153 | ||
9692c191 SW |
154 | clocks { |
155 | compatible = "simple-bus"; | |
156 | #address-cells = <1>; | |
157 | #size-cells = <0>; | |
232fed48 | 158 | |
b7c6c176 | 159 | clk_mmc: clock@0 { |
9692c191 SW |
160 | compatible = "fixed-clock"; |
161 | reg = <0>; | |
162 | #clock-cells = <0>; | |
b7c6c176 | 163 | clock-output-names = "mmc"; |
9692c191 SW |
164 | clock-frequency = <100000000>; |
165 | }; | |
166 | ||
b7c6c176 | 167 | clk_i2c: clock@1 { |
9692c191 SW |
168 | compatible = "fixed-clock"; |
169 | reg = <1>; | |
170 | #clock-cells = <0>; | |
b7c6c176 | 171 | clock-output-names = "i2c"; |
2837a1d4 | 172 | clock-frequency = <250000000>; |
9692c191 | 173 | }; |
6ce5f02e | 174 | |
b7c6c176 | 175 | clk_spi: clock@2 { |
6ce5f02e SW |
176 | compatible = "fixed-clock"; |
177 | reg = <2>; | |
178 | #clock-cells = <0>; | |
b7c6c176 | 179 | clock-output-names = "spi"; |
6ce5f02e SW |
180 | clock-frequency = <250000000>; |
181 | }; | |
ec9653b8 SA |
182 | }; |
183 | }; |