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Merge branch 'for-linus' of git://git.kernel.dk/linux-block
[deliverable/linux.git] / arch / arm / boot / dts / exynos4.dtsi
CommitLineData
b571abb3
TF		 1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
1c75a78a 22#include <dt-bindings/clock/exynos4.h>
990a7bfd 23#include <dt-bindings/clock/exynos-audss-clk.h>
3799279f 24#include "skeleton.dtsi"
1462b137 25#include "exynos-syscon-restart.dtsi"
b571abb3
TF		 26
27/ {
28 interrupt-parent = <&gic>;
29
30 aliases {
31 spi0 = &spi_0;
32 spi1 = &spi_1;
33 spi2 = &spi_2;
34db4990
DA		 34 i2c0 = &i2c_0;
35 i2c1 = &i2c_1;
36 i2c2 = &i2c_2;
37 i2c3 = &i2c_3;
38 i2c4 = &i2c_4;
39 i2c5 = &i2c_5;
40 i2c6 = &i2c_6;
41 i2c7 = &i2c_7;
ed80d4ca 42 i2c8 = &i2c_8;
d1b8a41d
SN		 43 csis0 = &csis_0;
44 csis1 = &csis_1;
45 fimc0 = &fimc_0;
46 fimc1 = &fimc_1;
47 fimc2 = &fimc_2;
48 fimc3 = &fimc_3;
1e64f48e
TF		 49 serial0 = &serial_0;
50 serial1 = &serial_1;
51 serial2 = &serial_2;
52 serial3 = &serial_3;
b571abb3
TF		 53 };
54
990a7bfd
SN		 55 clock_audss: clock-controller@03810000 {
56 compatible = "samsung,exynos4210-audss-clock";
57 reg = <0x03810000 0x0C>;
58 #clock-cells = <1>;
59 };
60
61 i2s0: i2s@03830000 {
62 compatible = "samsung,s5pv210-i2s";
63 reg = <0x03830000 0x100>;
64 clocks = <&clock_audss EXYNOS_I2S_BUS>;
65 clock-names = "iis";
3635acef
SN		 66 #clock-cells = <1>;
67 clock-output-names = "i2s_cdclk0";
990a7bfd
SN		 68 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
69 dma-names = "tx", "rx", "tx-sec";
70 samsung,idma-addr = <0x03000000>;
16696337 71 #sound-dai-cells = <1>;
990a7bfd
SN		 72 status = "disabled";
73 };
74
096ee6ad
TA		 75 chipid@10000000 {
76 compatible = "samsung,exynos4210-chipid";
77 reg = <0x10000000 0x100>;
78 };
79
df4400ac
PD		 80 sromc@12570000 {
81 compatible = "samsung,exynos-srom";
82 reg = <0x12570000 0x14>;
83 };
84
21b190d2
SN		 85 mipi_phy: video-phy@10020710 {
86 compatible = "samsung,s5pv210-mipi-video-phy";
21b190d2 87 #phy-cells = <1>;
c8ef0bee 88 syscon = <&pmu_system_controller>;
21b190d2
SN		 89 };
90
91d88f03
TF		 91 pd_mfc: mfc-power-domain@10023C40 {
92 compatible = "samsung,exynos4210-pd";
93 reg = <0x10023C40 0x20>;
0da65870 94 #power-domain-cells = <0>;
91d88f03
TF		 95 };
96
97 pd_g3d: g3d-power-domain@10023C60 {
98 compatible = "samsung,exynos4210-pd";
99 reg = <0x10023C60 0x20>;
0da65870 100 #power-domain-cells = <0>;
91d88f03
TF		 101 };
102
103 pd_lcd0: lcd0-power-domain@10023C80 {
104 compatible = "samsung,exynos4210-pd";
105 reg = <0x10023C80 0x20>;
0da65870 106 #power-domain-cells = <0>;
91d88f03
TF		 107 };
108
109 pd_tv: tv-power-domain@10023C20 {
110 compatible = "samsung,exynos4210-pd";
111 reg = <0x10023C20 0x20>;
0da65870 112 #power-domain-cells = <0>;
ec459c0c 113 power-domains = <&pd_lcd0>;
91d88f03
TF		 114 };
115
116 pd_cam: cam-power-domain@10023C00 {
117 compatible = "samsung,exynos4210-pd";
118 reg = <0x10023C00 0x20>;
0da65870 119 #power-domain-cells = <0>;
91d88f03
TF		 120 };
121
122 pd_gps: gps-power-domain@10023CE0 {
123 compatible = "samsung,exynos4210-pd";
124 reg = <0x10023CE0 0x20>;
0da65870 125 #power-domain-cells = <0>;
b571abb3
TF		 126 };
127
10ea1f18
CC		 128 pd_gps_alive: gps-alive-power-domain@10023D00 {
129 compatible = "samsung,exynos4210-pd";
130 reg = <0x10023D00 0x20>;
0da65870 131 #power-domain-cells = <0>;
10ea1f18
CC		 132 };
133
0572b725 134 gic: interrupt-controller@10490000 {
b571abb3
TF		 135 compatible = "arm,cortex-a9-gic";
136 #interrupt-cells = <3>;
137 interrupt-controller;
cf286b40 138 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
b571abb3
TF		 139 };
140
0572b725 141 combiner: interrupt-controller@10440000 {
b571abb3
TF		 142 compatible = "samsung,exynos4210-combiner";
143 #interrupt-cells = <2>;
144 interrupt-controller;
145 reg = <0x10440000 0x1000>;
146 };
147
6f4b82a3
CP		 148 pmu {
149 compatible = "arm,cortex-a9-pmu";
150 interrupt-parent = <&combiner>;
151 interrupts = <2 2>, <3 2>;
152 };
153
9f052d0c 154 sys_reg: syscon@10010000 {
a64b1b22
SN		 155 compatible = "samsung,exynos4-sysreg", "syscon";
156 reg = <0x10010000 0x400>;
157 };
158
7b9613ac
CP		 159 pmu_system_controller: system-controller@10020000 {
160 compatible = "samsung,exynos4210-pmu", "syscon";
161 reg = <0x10020000 0x4000>;
8b283c02
MZ		 162 interrupt-controller;
163 #interrupt-cells = <3>;
164 interrupt-parent = <&gic>;
7b9613ac
CP		 165 };
166
8b7dd64c
AH		 167 dsi_0: dsi@11C80000 {
168 compatible = "samsung,exynos4210-mipi-dsi";
169 reg = <0x11C80000 0x10000>;
170 interrupts = <0 79 0>;
0da65870 171 power-domains = <&pd_lcd0>;
8b7dd64c
AH		 172 phys = <&mipi_phy 1>;
173 phy-names = "dsim";
c8366bac 174 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
4f01e650 175 clock-names = "bus_clk", "sclk_mipi";
8b7dd64c
AH		 176 status = "disabled";
177 #address-cells = <1>;
178 #size-cells = <0>;
179 };
180
d1b8a41d
SN		 181 camera {
182 compatible = "samsung,fimc", "simple-bus";
183 status = "disabled";
184 #address-cells = <1>;
185 #size-cells = <1>;
ee5eda64
SN		 186 #clock-cells = <1>;
187 clock-output-names = "cam_a_clkout", "cam_b_clkout";
d1b8a41d
SN		 188 ranges;
189
d1b8a41d
SN		 190 fimc_0: fimc@11800000 {
191 compatible = "samsung,exynos4210-fimc";
192 reg = <0x11800000 0x1000>;
193 interrupts = <0 84 0>;
1c75a78a 194 clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
d1b8a41d 195 clock-names = "fimc", "sclk_fimc";
0da65870 196 power-domains = <&pd_cam>;
d1b8a41d 197 samsung,sysreg = <&sys_reg>;
71d3a9fb 198 iommus = <&sysmmu_fimc0>;
d1b8a41d
SN		 199 status = "disabled";
200 };
201
202 fimc_1: fimc@11810000 {
203 compatible = "samsung,exynos4210-fimc";
204 reg = <0x11810000 0x1000>;
205 interrupts = <0 85 0>;
1c75a78a 206 clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
d1b8a41d 207 clock-names = "fimc", "sclk_fimc";
0da65870 208 power-domains = <&pd_cam>;
d1b8a41d 209 samsung,sysreg = <&sys_reg>;
71d3a9fb 210 iommus = <&sysmmu_fimc1>;
d1b8a41d
SN		 211 status = "disabled";
212 };
213
214 fimc_2: fimc@11820000 {
215 compatible = "samsung,exynos4210-fimc";
216 reg = <0x11820000 0x1000>;
217 interrupts = <0 86 0>;
1c75a78a 218 clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
d1b8a41d 219 clock-names = "fimc", "sclk_fimc";
0da65870 220 power-domains = <&pd_cam>;
d1b8a41d 221 samsung,sysreg = <&sys_reg>;
71d3a9fb 222 iommus = <&sysmmu_fimc2>;
d1b8a41d
SN		 223 status = "disabled";
224 };
225
226 fimc_3: fimc@11830000 {
227 compatible = "samsung,exynos4210-fimc";
228 reg = <0x11830000 0x1000>;
229 interrupts = <0 87 0>;
1c75a78a 230 clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
d1b8a41d 231 clock-names = "fimc", "sclk_fimc";
0da65870 232 power-domains = <&pd_cam>;
d1b8a41d 233 samsung,sysreg = <&sys_reg>;
71d3a9fb 234 iommus = <&sysmmu_fimc3>;
d1b8a41d
SN		 235 status = "disabled";
236 };
237
238 csis_0: csis@11880000 {
239 compatible = "samsung,exynos4210-csis";
240 reg = <0x11880000 0x4000>;
241 interrupts = <0 78 0>;
1c75a78a 242 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
d1b8a41d
SN		 243 clock-names = "csis", "sclk_csis";
244 bus-width = <4>;
0da65870 245 power-domains = <&pd_cam>;
21b190d2
SN		 246 phys = <&mipi_phy 0>;
247 phy-names = "csis";
d1b8a41d
SN		 248 status = "disabled";
249 #address-cells = <1>;
250 #size-cells = <0>;
251 };
252
253 csis_1: csis@11890000 {
254 compatible = "samsung,exynos4210-csis";
255 reg = <0x11890000 0x4000>;
256 interrupts = <0 80 0>;
1c75a78a 257 clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
d1b8a41d
SN		 258 clock-names = "csis", "sclk_csis";
259 bus-width = <2>;
0da65870 260 power-domains = <&pd_cam>;
21b190d2
SN		 261 phys = <&mipi_phy 2>;
262 phy-names = "csis";
d1b8a41d
SN		 263 status = "disabled";
264 #address-cells = <1>;
265 #size-cells = <0>;
266 };
267 };
268
9c41221e 269 watchdog: watchdog@10060000 {
b571abb3
TF		 270 compatible = "samsung,s3c2410-wdt";
271 reg = <0x10060000 0x100>;
272 interrupts = <0 43 0>;
1c75a78a 273 clocks = <&clock CLK_WDT>;
7ad34337 274 clock-names = "watchdog";
c9e23f00 275 status = "disabled";
b571abb3
TF		 276 };
277
ce9940a9 278 rtc: rtc@10070000 {
b571abb3
TF		 279 compatible = "samsung,s3c6410-rtc";
280 reg = <0x10070000 0x100>;
8b283c02 281 interrupt-parent = <&pmu_system_controller>;
b571abb3 282 interrupts = <0 44 0>, <0 45 0>;
1c75a78a 283 clocks = <&clock CLK_RTC>;
7ad34337 284 clock-names = "rtc";
c9e23f00 285 status = "disabled";
b571abb3
TF		 286 };
287
9c41221e 288 keypad: keypad@100A0000 {
b571abb3
TF		 289 compatible = "samsung,s5pv210-keypad";
290 reg = <0x100A0000 0x100>;
291 interrupts = <0 109 0>;
1c75a78a 292 clocks = <&clock CLK_KEYIF>;
7ad34337 293 clock-names = "keypad";
c9e23f00 294 status = "disabled";
b571abb3
TF		 295 };
296
9c41221e 297 sdhci_0: sdhci@12510000 {
b571abb3
TF		 298 compatible = "samsung,exynos4210-sdhci";
299 reg = <0x12510000 0x100>;
300 interrupts = <0 73 0>;
1c75a78a 301 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
7ad34337 302 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 303 status = "disabled";
b571abb3
TF		 304 };
305
9c41221e 306 sdhci_1: sdhci@12520000 {
b571abb3
TF		 307 compatible = "samsung,exynos4210-sdhci";
308 reg = <0x12520000 0x100>;
309 interrupts = <0 74 0>;
1c75a78a 310 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
7ad34337 311 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 312 status = "disabled";
b571abb3
TF		 313 };
314
9c41221e 315 sdhci_2: sdhci@12530000 {
b571abb3
TF		 316 compatible = "samsung,exynos4210-sdhci";
317 reg = <0x12530000 0x100>;
318 interrupts = <0 75 0>;
1c75a78a 319 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
7ad34337 320 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 321 status = "disabled";
b571abb3
TF		 322 };
323
9c41221e 324 sdhci_3: sdhci@12540000 {
b571abb3
TF		 325 compatible = "samsung,exynos4210-sdhci";
326 reg = <0x12540000 0x100>;
327 interrupts = <0 76 0>;
1c75a78a 328 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
7ad34337 329 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 330 status = "disabled";
26bbd41f
CP		 331 };
332
333 exynos_usbphy: exynos-usbphy@125B0000 {
334 compatible = "samsung,exynos4210-usb2-phy";
335 reg = <0x125B0000 0x100>;
336 samsung,pmureg-phandle = <&pmu_system_controller>;
337 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
338 clock-names = "phy", "ref";
339 #phy-cells = <1>;
340 status = "disabled";
ef14d94c
CP		 341 };
342
9c41221e 343 hsotg: hsotg@12480000 {
ef14d94c
CP		 344 compatible = "samsung,s3c6400-hsotg";
345 reg = <0x12480000 0x20000>;
346 interrupts = <0 71 0>;
347 clocks = <&clock CLK_USB_DEVICE>;
348 clock-names = "otg";
349 phys = <&exynos_usbphy 0>;
350 phy-names = "usb2-phy";
351 status = "disabled";
b571abb3
TF		 352 };
353
9c41221e 354 ehci: ehci@12580000 {
6f9d02a0
DK		 355 compatible = "samsung,exynos4210-ehci";
356 reg = <0x12580000 0x100>;
357 interrupts = <0 70 0>;
1c75a78a 358 clocks = <&clock CLK_USB_HOST>;
6f9d02a0
DK		 359 clock-names = "usbhost";
360 status = "disabled";
366126d5
MS		 361 #address-cells = <1>;
362 #size-cells = <0>;
363 port@0 {
364 reg = <0>;
365 phys = <&exynos_usbphy 1>;
366 status = "disabled";
367 };
368 port@1 {
369 reg = <1>;
370 phys = <&exynos_usbphy 2>;
371 status = "disabled";
372 };
373 port@2 {
374 reg = <2>;
375 phys = <&exynos_usbphy 3>;
376 status = "disabled";
377 };
6f9d02a0
DK		 378 };
379
9c41221e 380 ohci: ohci@12590000 {
6f9d02a0
DK		 381 compatible = "samsung,exynos4210-ohci";
382 reg = <0x12590000 0x100>;
383 interrupts = <0 70 0>;
1c75a78a 384 clocks = <&clock CLK_USB_HOST>;
6f9d02a0
DK		 385 clock-names = "usbhost";
386 status = "disabled";
366126d5
MS		 387 #address-cells = <1>;
388 #size-cells = <0>;
389 port@0 {
390 reg = <0>;
391 phys = <&exynos_usbphy 1>;
392 status = "disabled";
393 };
6f9d02a0
DK		 394 };
395
990a7bfd 396 i2s1: i2s@13960000 {
fddcd300 397 compatible = "samsung,s3c6410-i2s";
990a7bfd
SN		 398 reg = <0x13960000 0x100>;
399 clocks = <&clock CLK_I2S1>;
400 clock-names = "iis";
3635acef
SN		 401 #clock-cells = <1>;
402 clock-output-names = "i2s_cdclk1";
990a7bfd
SN		 403 dmas = <&pdma1 12>, <&pdma1 11>;
404 dma-names = "tx", "rx";
16696337 405 #sound-dai-cells = <1>;
990a7bfd
SN		 406 status = "disabled";
407 };
408
409 i2s2: i2s@13970000 {
fddcd300 410 compatible = "samsung,s3c6410-i2s";
990a7bfd
SN		 411 reg = <0x13970000 0x100>;
412 clocks = <&clock CLK_I2S2>;
413 clock-names = "iis";
3635acef
SN		 414 #clock-cells = <1>;
415 clock-output-names = "i2s_cdclk2";
990a7bfd
SN		 416 dmas = <&pdma0 14>, <&pdma0 13>;
417 dma-names = "tx", "rx";
16696337 418 #sound-dai-cells = <1>;
990a7bfd
SN		 419 status = "disabled";
420 };
421
20901f74
SK		 422 mfc: codec@13400000 {
423 compatible = "samsung,mfc-v5";
424 reg = <0x13400000 0x10000>;
425 interrupts = <0 94 0>;
0da65870 426 power-domains = <&pd_mfc>;
e7160bfc
MS		 427 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
428 clock-names = "mfc", "sclk_mfc";
71d3a9fb
MS		 429 iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
430 iommu-names = "left", "right";
20901f74
SK		 431 status = "disabled";
432 };
433
1e64f48e 434 serial_0: serial@13800000 {
b571abb3
TF		 435 compatible = "samsung,exynos4210-uart";
436 reg = <0x13800000 0x100>;
437 interrupts = <0 52 0>;
1c75a78a 438 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
7ad34337 439 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 440 dmas = <&pdma0 15>, <&pdma0 16>;
441 dma-names = "rx", "tx";
c9e23f00 442 status = "disabled";
b571abb3
TF		 443 };
444
1e64f48e 445 serial_1: serial@13810000 {
b571abb3
TF		 446 compatible = "samsung,exynos4210-uart";
447 reg = <0x13810000 0x100>;
448 interrupts = <0 53 0>;
1c75a78a 449 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
7ad34337 450 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 451 dmas = <&pdma1 15>, <&pdma1 16>;
452 dma-names = "rx", "tx";
c9e23f00 453 status = "disabled";
b571abb3
TF		 454 };
455
1e64f48e 456 serial_2: serial@13820000 {
b571abb3
TF		 457 compatible = "samsung,exynos4210-uart";
458 reg = <0x13820000 0x100>;
459 interrupts = <0 54 0>;
1c75a78a 460 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
7ad34337 461 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 462 dmas = <&pdma0 17>, <&pdma0 18>;
463 dma-names = "rx", "tx";
c9e23f00 464 status = "disabled";
b571abb3
TF		 465 };
466
1e64f48e 467 serial_3: serial@13830000 {
b571abb3
TF		 468 compatible = "samsung,exynos4210-uart";
469 reg = <0x13830000 0x100>;
470 interrupts = <0 55 0>;
1c75a78a 471 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
7ad34337 472 clock-names = "uart", "clk_uart_baud0";
22374fbe
RB		 473 dmas = <&pdma1 17>, <&pdma1 18>;
474 dma-names = "rx", "tx";
c9e23f00 475 status = "disabled";
b571abb3
TF		 476 };
477
34db4990 478 i2c_0: i2c@13860000 {
1b198d56
TF		 479 #address-cells = <1>;
480 #size-cells = <0>;
b571abb3
TF		 481 compatible = "samsung,s3c2440-i2c";
482 reg = <0x13860000 0x100>;
483 interrupts = <0 58 0>;
1c75a78a 484 clocks = <&clock CLK_I2C0>;
7ad34337 485 clock-names = "i2c";
045c8f63
TA		 486 pinctrl-names = "default";
487 pinctrl-0 = <&i2c0_bus>;
c9e23f00 488 status = "disabled";
b571abb3
TF		 489 };
490
34db4990 491 i2c_1: i2c@13870000 {
1b198d56
TF		 492 #address-cells = <1>;
493 #size-cells = <0>;
b571abb3
TF		 494 compatible = "samsung,s3c2440-i2c";
495 reg = <0x13870000 0x100>;
496 interrupts = <0 59 0>;
1c75a78a 497 clocks = <&clock CLK_I2C1>;
7ad34337 498 clock-names = "i2c";
045c8f63
TA		 499 pinctrl-names = "default";
500 pinctrl-0 = <&i2c1_bus>;
c9e23f00 501 status = "disabled";
b571abb3
TF		 502 };
503
34db4990 504 i2c_2: i2c@13880000 {
1b198d56
TF		 505 #address-cells = <1>;
506 #size-cells = <0>;
b571abb3
TF		 507 compatible = "samsung,s3c2440-i2c";
508 reg = <0x13880000 0x100>;
509 interrupts = <0 60 0>;
1c75a78a 510 clocks = <&clock CLK_I2C2>;
7ad34337 511 clock-names = "i2c";
9c869d1f
TS		 512 pinctrl-names = "default";
513 pinctrl-0 = <&i2c2_bus>;
c9e23f00 514 status = "disabled";
b571abb3
TF		 515 };
516
34db4990 517 i2c_3: i2c@13890000 {
1b198d56
TF		 518 #address-cells = <1>;
519 #size-cells = <0>;
b571abb3
TF		 520 compatible = "samsung,s3c2440-i2c";
521 reg = <0x13890000 0x100>;
522 interrupts = <0 61 0>;
1c75a78a 523 clocks = <&clock CLK_I2C3>;
7ad34337 524 clock-names = "i2c";
9c869d1f
TS		 525 pinctrl-names = "default";
526 pinctrl-0 = <&i2c3_bus>;
c9e23f00 527 status = "disabled";
b571abb3
TF		 528 };
529
34db4990 530 i2c_4: i2c@138A0000 {
1b198d56
TF		 531 #address-cells = <1>;
532 #size-cells = <0>;
b571abb3
TF		 533 compatible = "samsung,s3c2440-i2c";
534 reg = <0x138A0000 0x100>;
535 interrupts = <0 62 0>;
1c75a78a 536 clocks = <&clock CLK_I2C4>;
7ad34337 537 clock-names = "i2c";
9c869d1f
TS		 538 pinctrl-names = "default";
539 pinctrl-0 = <&i2c4_bus>;
c9e23f00 540 status = "disabled";
b571abb3
TF		 541 };
542
34db4990 543 i2c_5: i2c@138B0000 {
1b198d56
TF		 544 #address-cells = <1>;
545 #size-cells = <0>;
b571abb3
TF		 546 compatible = "samsung,s3c2440-i2c";
547 reg = <0x138B0000 0x100>;
548 interrupts = <0 63 0>;
1c75a78a 549 clocks = <&clock CLK_I2C5>;
7ad34337 550 clock-names = "i2c";
9c869d1f
TS		 551 pinctrl-names = "default";
552 pinctrl-0 = <&i2c5_bus>;
c9e23f00 553 status = "disabled";
b571abb3
TF		 554 };
555
34db4990 556 i2c_6: i2c@138C0000 {
1b198d56
TF		 557 #address-cells = <1>;
558 #size-cells = <0>;
b571abb3
TF		 559 compatible = "samsung,s3c2440-i2c";
560 reg = <0x138C0000 0x100>;
561 interrupts = <0 64 0>;
1c75a78a 562 clocks = <&clock CLK_I2C6>;
7ad34337 563 clock-names = "i2c";
9c869d1f
TS		 564 pinctrl-names = "default";
565 pinctrl-0 = <&i2c6_bus>;
c9e23f00 566 status = "disabled";
b571abb3
TF		 567 };
568
34db4990 569 i2c_7: i2c@138D0000 {
1b198d56
TF		 570 #address-cells = <1>;
571 #size-cells = <0>;
b571abb3
TF		 572 compatible = "samsung,s3c2440-i2c";
573 reg = <0x138D0000 0x100>;
574 interrupts = <0 65 0>;
1c75a78a 575 clocks = <&clock CLK_I2C7>;
7ad34337 576 clock-names = "i2c";
9c869d1f
TS		 577 pinctrl-names = "default";
578 pinctrl-0 = <&i2c7_bus>;
c9e23f00 579 status = "disabled";
b571abb3
TF		 580 };
581
ed80d4ca
MS		 582 i2c_8: i2c@138E0000 {
583 #address-cells = <1>;
584 #size-cells = <0>;
585 compatible = "samsung,s3c2440-hdmiphy-i2c";
586 reg = <0x138E0000 0x100>;
587 interrupts = <0 93 0>;
588 clocks = <&clock CLK_I2C_HDMI>;
589 clock-names = "i2c";
590 status = "disabled";
591
592 hdmi_i2c_phy: hdmiphy@38 {
593 compatible = "exynos4210-hdmiphy";
594 reg = <0x38>;
595 };
596 };
597
b571abb3
TF		 598 spi_0: spi@13920000 {
599 compatible = "samsung,exynos4210-spi";
600 reg = <0x13920000 0x100>;
601 interrupts = <0 66 0>;
48b3af1e
SN		 602 dmas = <&pdma0 7>, <&pdma0 6>;
603 dma-names = "tx", "rx";
b571abb3
TF		 604 #address-cells = <1>;
605 #size-cells = <0>;
1c75a78a 606 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
7ad34337 607 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 608 pinctrl-names = "default";
609 pinctrl-0 = <&spi0_bus>;
c9e23f00 610 status = "disabled";
b571abb3
TF		 611 };
612
613 spi_1: spi@13930000 {
614 compatible = "samsung,exynos4210-spi";
615 reg = <0x13930000 0x100>;
616 interrupts = <0 67 0>;
48b3af1e
SN		 617 dmas = <&pdma1 7>, <&pdma1 6>;
618 dma-names = "tx", "rx";
b571abb3
TF		 619 #address-cells = <1>;
620 #size-cells = <0>;
1c75a78a 621 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
7ad34337 622 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 623 pinctrl-names = "default";
624 pinctrl-0 = <&spi1_bus>;
c9e23f00 625 status = "disabled";
b571abb3
TF		 626 };
627
628 spi_2: spi@13940000 {
629 compatible = "samsung,exynos4210-spi";
630 reg = <0x13940000 0x100>;
631 interrupts = <0 68 0>;
48b3af1e
SN		 632 dmas = <&pdma0 9>, <&pdma0 8>;
633 dma-names = "tx", "rx";
b571abb3
TF		 634 #address-cells = <1>;
635 #size-cells = <0>;
1c75a78a 636 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
7ad34337 637 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 638 pinctrl-names = "default";
639 pinctrl-0 = <&spi2_bus>;
c9e23f00 640 status = "disabled";
b571abb3
TF		 641 };
642
9c41221e 643 pwm: pwm@139D0000 {
cc4193ea
TF		 644 compatible = "samsung,exynos4210-pwm";
645 reg = <0x139D0000 0x1000>;
646 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
1c75a78a 647 clocks = <&clock CLK_PWM>;
ec06dbe7 648 clock-names = "timers";
2fd82d33 649 #pwm-cells = <3>;
cc4193ea
TF		 650 status = "disabled";
651 };
652
b571abb3
TF		 653 amba {
654 #address-cells = <1>;
655 #size-cells = <1>;
2ef7d5f3 656 compatible = "simple-bus";
b571abb3
TF		 657 interrupt-parent = <&gic>;
658 ranges;
659
660 pdma0: pdma@12680000 {
661 compatible = "arm,pl330", "arm,primecell";
662 reg = <0x12680000 0x1000>;
663 interrupts = <0 35 0>;
1c75a78a 664 clocks = <&clock CLK_PDMA0>;
7ad34337 665 clock-names = "apb_pclk";
0a96d4d3
PV		 666 #dma-cells = <1>;
667 #dma-channels = <8>;
668 #dma-requests = <32>;
b571abb3
TF		 669 };
670
671 pdma1: pdma@12690000 {
672 compatible = "arm,pl330", "arm,primecell";
673 reg = <0x12690000 0x1000>;
674 interrupts = <0 36 0>;
1c75a78a 675 clocks = <&clock CLK_PDMA1>;
7ad34337 676 clock-names = "apb_pclk";
0a96d4d3
PV		 677 #dma-cells = <1>;
678 #dma-channels = <8>;
679 #dma-requests = <32>;
b571abb3 680 };
f7e758af
BZ		 681
682 mdma1: mdma@12850000 {
683 compatible = "arm,pl330", "arm,primecell";
684 reg = <0x12850000 0x1000>;
685 interrupts = <0 34 0>;
1c75a78a 686 clocks = <&clock CLK_MDMA>;
7ad34337 687 clock-names = "apb_pclk";
0a96d4d3
PV		 688 #dma-cells = <1>;
689 #dma-channels = <8>;
690 #dma-requests = <1>;
f7e758af 691 };
b571abb3 692 };
768c3a56
VS		 693
694 fimd: fimd@11c00000 {
695 compatible = "samsung,exynos4210-fimd";
696 interrupt-parent = <&combiner>;
697 reg = <0x11c00000 0x20000>;
698 interrupt-names = "fifo", "vsync", "lcd_sys";
699 interrupts = <11 0>, <11 1>, <11 2>;
1c75a78a 700 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
768c3a56 701 clock-names = "sclk_fimd", "fimd";
0da65870 702 power-domains = <&pd_lcd0>;
71d3a9fb 703 iommus = <&sysmmu_fimd0>;
2eb62941 704 samsung,sysreg = <&sys_reg>;
768c3a56
VS		 705 status = "disabled";
706 };
30e0e476 707
9843a223
LM		 708 tmu: tmu@100C0000 {
709 #include "exynos4412-tmu-sensor-conf.dtsi"
710 };
711
9c41221e 712 jpeg_codec: jpeg-codec@11840000 {
f470b859
MS		 713 compatible = "samsung,exynos4210-jpeg";
714 reg = <0x11840000 0x1000>;
715 interrupts = <0 88 0>;
716 clocks = <&clock CLK_JPEG>;
717 clock-names = "jpeg";
718 power-domains = <&pd_cam>;
ba032795 719 iommus = <&sysmmu_jpeg>;
f470b859
MS		 720 };
721
0c7e90b5
MS		 722 rotator: rotator@12810000 {
723 compatible = "samsung,exynos4210-rotator";
724 reg = <0x12810000 0x64>;
725 interrupts = <0 83 0>;
726 clocks = <&clock CLK_ROTATOR>;
727 clock-names = "rotator";
728 iommus = <&sysmmu_rotator>;
729 };
730
ed80d4ca
MS		 731 hdmi: hdmi@12D00000 {
732 compatible = "samsung,exynos4210-hdmi";
733 reg = <0x12D00000 0x70000>;
734 interrupts = <0 92 0>;
735 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
736 "mout_hdmi";
737 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
738 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
739 <&clock CLK_MOUT_HDMI>;
740 phy = <&hdmi_i2c_phy>;
741 power-domains = <&pd_tv>;
742 samsung,syscon-phandle = <&pmu_system_controller>;
743 status = "disabled";
744 };
745
746 mixer: mixer@12C10000 {
747 compatible = "samsung,exynos4210-mixer";
748 interrupts = <0 91 0>;
749 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
750 power-domains = <&pd_tv>;
71d3a9fb 751 iommus = <&sysmmu_tv>;
ed80d4ca
MS		 752 status = "disabled";
753 };
754
30e0e476
CC		 755 ppmu_dmc0: ppmu_dmc0@106a0000 {
756 compatible = "samsung,exynos-ppmu";
757 reg = <0x106a0000 0x2000>;
758 clocks = <&clock CLK_PPMUDMC0>;
759 clock-names = "ppmu";
760 status = "disabled";
761 };
762
763 ppmu_dmc1: ppmu_dmc1@106b0000 {
764 compatible = "samsung,exynos-ppmu";
765 reg = <0x106b0000 0x2000>;
766 clocks = <&clock CLK_PPMUDMC1>;
767 clock-names = "ppmu";
768 status = "disabled";
769 };
770
771 ppmu_cpu: ppmu_cpu@106c0000 {
772 compatible = "samsung,exynos-ppmu";
773 reg = <0x106c0000 0x2000>;
774 clocks = <&clock CLK_PPMUCPU>;
775 clock-names = "ppmu";
776 status = "disabled";
777 };
778
779 ppmu_acp: ppmu_acp@10ae0000 {
780 compatible = "samsung,exynos-ppmu";
781 reg = <0x106e0000 0x2000>;
782 status = "disabled";
783 };
784
785 ppmu_rightbus: ppmu_rightbus@112a0000 {
786 compatible = "samsung,exynos-ppmu";
787 reg = <0x112a0000 0x2000>;
788 clocks = <&clock CLK_PPMURIGHT>;
789 clock-names = "ppmu";
790 status = "disabled";
791 };
792
793 ppmu_leftbus: ppmu_leftbus0@116a0000 {
794 compatible = "samsung,exynos-ppmu";
795 reg = <0x116a0000 0x2000>;
796 clocks = <&clock CLK_PPMULEFT>;
797 clock-names = "ppmu";
798 status = "disabled";
799 };
800
801 ppmu_camif: ppmu_camif@11ac0000 {
802 compatible = "samsung,exynos-ppmu";
803 reg = <0x11ac0000 0x2000>;
804 clocks = <&clock CLK_PPMUCAMIF>;
805 clock-names = "ppmu";
806 status = "disabled";
807 };
808
809 ppmu_lcd0: ppmu_lcd0@11e40000 {
810 compatible = "samsung,exynos-ppmu";
811 reg = <0x11e40000 0x2000>;
812 clocks = <&clock CLK_PPMULCD0>;
813 clock-names = "ppmu";
814 status = "disabled";
815 };
816
817 ppmu_fsys: ppmu_g3d@12630000 {
818 compatible = "samsung,exynos-ppmu";
819 reg = <0x12630000 0x2000>;
820 status = "disabled";
821 };
822
823 ppmu_image: ppmu_image@12aa0000 {
824 compatible = "samsung,exynos-ppmu";
825 reg = <0x12aa0000 0x2000>;
826 clocks = <&clock CLK_PPMUIMAGE>;
827 clock-names = "ppmu";
828 status = "disabled";
829 };
830
831 ppmu_tv: ppmu_tv@12e40000 {
832 compatible = "samsung,exynos-ppmu";
833 reg = <0x12e40000 0x2000>;
834 clocks = <&clock CLK_PPMUTV>;
835 clock-names = "ppmu";
836 status = "disabled";
837 };
838
839 ppmu_g3d: ppmu_g3d@13220000 {
840 compatible = "samsung,exynos-ppmu";
841 reg = <0x13220000 0x2000>;
842 clocks = <&clock CLK_PPMUG3D>;
843 clock-names = "ppmu";
844 status = "disabled";
845 };
846
847 ppmu_mfc_left: ppmu_mfc_left@13660000 {
848 compatible = "samsung,exynos-ppmu";
849 reg = <0x13660000 0x2000>;
850 clocks = <&clock CLK_PPMUMFC_L>;
851 clock-names = "ppmu";
852 status = "disabled";
853 };
854
855 ppmu_mfc_right: ppmu_mfc_right@13670000 {
856 compatible = "samsung,exynos-ppmu";
857 reg = <0x13670000 0x2000>;
858 clocks = <&clock CLK_PPMUMFC_R>;
859 clock-names = "ppmu";
860 status = "disabled";
861 };
71d3a9fb
MS		 862
863 sysmmu_mfc_l: sysmmu@13620000 {
864 compatible = "samsung,exynos-sysmmu";
865 reg = <0x13620000 0x1000>;
866 interrupt-parent = <&combiner>;
867 interrupts = <5 5>;
868 clock-names = "sysmmu", "master";
869 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
870 power-domains = <&pd_mfc>;
871 #iommu-cells = <0>;
872 };
873
874 sysmmu_mfc_r: sysmmu@13630000 {
875 compatible = "samsung,exynos-sysmmu";
876 reg = <0x13630000 0x1000>;
877 interrupt-parent = <&combiner>;
878 interrupts = <5 6>;
879 clock-names = "sysmmu", "master";
880 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
881 power-domains = <&pd_mfc>;
882 #iommu-cells = <0>;
883 };
884
885 sysmmu_tv: sysmmu@12E20000 {
886 compatible = "samsung,exynos-sysmmu";
887 reg = <0x12E20000 0x1000>;
888 interrupt-parent = <&combiner>;
889 interrupts = <5 4>;
890 clock-names = "sysmmu", "master";
891 clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
892 power-domains = <&pd_tv>;
893 #iommu-cells = <0>;
894 };
895
896 sysmmu_fimc0: sysmmu@11A20000 {
897 compatible = "samsung,exynos-sysmmu";
898 reg = <0x11A20000 0x1000>;
899 interrupt-parent = <&combiner>;
900 interrupts = <4 2>;
901 clock-names = "sysmmu", "master";
902 clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
903 power-domains = <&pd_cam>;
904 #iommu-cells = <0>;
905 };
906
907 sysmmu_fimc1: sysmmu@11A30000 {
908 compatible = "samsung,exynos-sysmmu";
909 reg = <0x11A30000 0x1000>;
910 interrupt-parent = <&combiner>;
911 interrupts = <4 3>;
912 clock-names = "sysmmu", "master";
913 clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
914 power-domains = <&pd_cam>;
915 #iommu-cells = <0>;
916 };
917
918 sysmmu_fimc2: sysmmu@11A40000 {
919 compatible = "samsung,exynos-sysmmu";
920 reg = <0x11A40000 0x1000>;
921 interrupt-parent = <&combiner>;
922 interrupts = <4 4>;
923 clock-names = "sysmmu", "master";
924 clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
925 power-domains = <&pd_cam>;
926 #iommu-cells = <0>;
927 };
928
929 sysmmu_fimc3: sysmmu@11A50000 {
930 compatible = "samsung,exynos-sysmmu";
931 reg = <0x11A50000 0x1000>;
932 interrupt-parent = <&combiner>;
933 interrupts = <4 5>;
934 clock-names = "sysmmu", "master";
935 clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
936 power-domains = <&pd_cam>;
937 #iommu-cells = <0>;
938 };
939
940 sysmmu_jpeg: sysmmu@11A60000 {
941 compatible = "samsung,exynos-sysmmu";
942 reg = <0x11A60000 0x1000>;
943 interrupt-parent = <&combiner>;
944 interrupts = <4 6>;
945 clock-names = "sysmmu", "master";
946 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
947 power-domains = <&pd_cam>;
948 #iommu-cells = <0>;
949 };
950
951 sysmmu_rotator: sysmmu@12A30000 {
952 compatible = "samsung,exynos-sysmmu";
953 reg = <0x12A30000 0x1000>;
954 interrupt-parent = <&combiner>;
955 interrupts = <5 0>;
956 clock-names = "sysmmu", "master";
957 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
71d3a9fb
MS		 958 #iommu-cells = <0>;
959 };
960
961 sysmmu_fimd0: sysmmu@11E20000 {
962 compatible = "samsung,exynos-sysmmu";
963 reg = <0x11E20000 0x1000>;
964 interrupt-parent = <&combiner>;
965 interrupts = <5 2>;
966 clock-names = "sysmmu", "master";
967 clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
968 power-domains = <&pd_lcd0>;
969 #iommu-cells = <0>;
970 };
a452977c
KK		 971
972 prng: rng@10830400 {
973 compatible = "samsung,exynos4-rng";
974 reg = <0x10830400 0x200>;
975 clocks = <&clock CLK_SSS>;
976 clock-names = "secss";
977 status = "disabled";
978 };
b571abb3 979};
Linux kernel - Deliverables
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