Commit | Line | Data |
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0682edaa OJ |
1 | /* |
2 | * Samsung's Exynos4210 based Universal C210 board device tree source | |
3 | * | |
4 | * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Device tree source file for Samsung's Universal C210 board which is based on | |
8 | * Samsung's Exynos4210 rev0 SoC. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | /dts-v1/; | |
3799279f | 16 | #include "exynos4210.dtsi" |
0682edaa OJ |
17 | |
18 | / { | |
19 | model = "Samsung Universal C210 based on Exynos4210 rev0"; | |
8bdb31b4 | 20 | compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; |
0682edaa OJ |
21 | |
22 | memory { | |
23 | reg = <0x40000000 0x10000000 | |
24 | 0x50000000 0x10000000>; | |
25 | }; | |
26 | ||
27 | chosen { | |
28 | bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; | |
62d38099 | 29 | stdout-path = &serial_2; |
0682edaa OJ |
30 | }; |
31 | ||
b3205dea SK |
32 | sysram@02020000 { |
33 | smp-sysram@0 { | |
34 | status = "disabled"; | |
35 | }; | |
36 | ||
37 | smp-sysram@5000 { | |
38 | compatible = "samsung,exynos4210-sysram"; | |
39 | reg = <0x5000 0x1000>; | |
40 | }; | |
41 | ||
42 | smp-sysram@1f000 { | |
43 | status = "disabled"; | |
44 | }; | |
45 | }; | |
46 | ||
0682edaa OJ |
47 | mct@10050000 { |
48 | compatible = "none"; | |
49 | }; | |
50 | ||
51 | fixed-rate-clocks { | |
52 | xxti { | |
53 | compatible = "samsung,clock-xxti"; | |
54 | clock-frequency = <0>; | |
55 | }; | |
56 | ||
57 | xusbxti { | |
58 | compatible = "samsung,clock-xusbxti"; | |
59 | clock-frequency = <24000000>; | |
60 | }; | |
61 | }; | |
62 | ||
63 | vemmc_reg: voltage-regulator { | |
64 | compatible = "regulator-fixed"; | |
65 | regulator-name = "VMEM_VDD_2_8V"; | |
66 | regulator-min-microvolt = <2800000>; | |
67 | regulator-max-microvolt = <2800000>; | |
68 | gpio = <&gpe1 3 0>; | |
69 | enable-active-high; | |
70 | }; | |
71 | ||
45e58485 MS |
72 | hsotg@12480000 { |
73 | vusb_d-supply = <&ldo3_reg>; | |
74 | vusb_a-supply = <&ldo8_reg>; | |
32f144f2 | 75 | dr_mode = "peripheral"; |
45e58485 MS |
76 | status = "okay"; |
77 | }; | |
78 | ||
0682edaa OJ |
79 | sdhci_emmc: sdhci@12510000 { |
80 | bus-width = <8>; | |
81 | non-removable; | |
82 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; | |
83 | pinctrl-names = "default"; | |
84 | vmmc-supply = <&vemmc_reg>; | |
85 | status = "okay"; | |
adea8296 MS |
86 | }; |
87 | ||
88 | sdhci_sd: sdhci@12530000 { | |
89 | bus-width = <4>; | |
90 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; | |
91 | pinctrl-names = "default"; | |
92 | vmmc-supply = <&ldo5_reg>; | |
93 | cd-gpios = <&gpx3 4 0>; | |
94 | cd-inverted; | |
95 | status = "okay"; | |
0682edaa OJ |
96 | }; |
97 | ||
45e58485 MS |
98 | ehci@12580000 { |
99 | status = "okay"; | |
100 | port@0 { | |
101 | status = "okay"; | |
102 | }; | |
103 | }; | |
104 | ||
105 | ohci@12590000 { | |
106 | status = "okay"; | |
107 | port@0 { | |
108 | status = "okay"; | |
109 | }; | |
110 | }; | |
111 | ||
112 | exynos-usbphy@125B0000 { | |
113 | status = "okay"; | |
114 | }; | |
115 | ||
0682edaa OJ |
116 | serial@13800000 { |
117 | status = "okay"; | |
118 | }; | |
119 | ||
120 | serial@13810000 { | |
121 | status = "okay"; | |
122 | }; | |
123 | ||
124 | serial@13820000 { | |
125 | status = "okay"; | |
126 | }; | |
127 | ||
128 | serial@13830000 { | |
129 | status = "okay"; | |
130 | }; | |
131 | ||
132 | gpio-keys { | |
133 | compatible = "gpio-keys"; | |
134 | ||
135 | vol-up-key { | |
136 | gpios = <&gpx2 0 1>; | |
137 | linux,code = <115>; | |
138 | label = "volume up"; | |
139 | debounce-interval = <1>; | |
140 | }; | |
141 | ||
142 | vol-down-key { | |
143 | gpios = <&gpx2 1 1>; | |
144 | linux,code = <114>; | |
145 | label = "volume down"; | |
146 | debounce-interval = <1>; | |
147 | }; | |
148 | ||
149 | config-key { | |
150 | gpios = <&gpx2 2 1>; | |
151 | linux,code = <171>; | |
152 | label = "config"; | |
153 | debounce-interval = <1>; | |
154 | gpio-key,wakeup; | |
155 | }; | |
156 | ||
157 | camera-key { | |
158 | gpios = <&gpx2 3 1>; | |
159 | linux,code = <212>; | |
160 | label = "camera"; | |
161 | debounce-interval = <1>; | |
162 | }; | |
163 | ||
164 | power-key { | |
165 | gpios = <&gpx2 7 1>; | |
166 | linux,code = <116>; | |
167 | label = "power"; | |
168 | debounce-interval = <1>; | |
169 | gpio-key,wakeup; | |
170 | }; | |
171 | ||
172 | ok-key { | |
173 | gpios = <&gpx3 5 1>; | |
174 | linux,code = <352>; | |
175 | label = "ok"; | |
176 | debounce-interval = <1>; | |
177 | }; | |
178 | }; | |
179 | ||
180 | tsp_reg: voltage-regulator { | |
181 | compatible = "regulator-fixed"; | |
182 | regulator-name = "TSP_2_8V"; | |
183 | regulator-min-microvolt = <2800000>; | |
184 | regulator-max-microvolt = <2800000>; | |
185 | gpio = <&gpe2 3 0>; | |
186 | enable-active-high; | |
187 | }; | |
188 | ||
189 | i2c@13890000 { | |
190 | samsung,i2c-sda-delay = <100>; | |
191 | samsung,i2c-slave-addr = <0x10>; | |
192 | samsung,i2c-max-bus-freq = <100000>; | |
193 | pinctrl-0 = <&i2c3_bus>; | |
194 | pinctrl-names = "default"; | |
195 | status = "okay"; | |
196 | ||
197 | tsp@4a { | |
198 | /* TBD: Atmel maXtouch touchscreen */ | |
199 | reg = <0x4a>; | |
200 | }; | |
201 | }; | |
202 | ||
203 | i2c@138B0000 { | |
204 | samsung,i2c-sda-delay = <100>; | |
205 | samsung,i2c-slave-addr = <0x10>; | |
206 | samsung,i2c-max-bus-freq = <100000>; | |
207 | pinctrl-0 = <&i2c5_bus>; | |
208 | pinctrl-names = "default"; | |
209 | status = "okay"; | |
210 | ||
211 | vdd_arm_reg: pmic@60 { | |
212 | compatible = "maxim,max8952"; | |
213 | reg = <0x60>; | |
214 | ||
215 | max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>; | |
216 | max8952,default-mode = <0>; | |
217 | max8952,dvs-mode-microvolt = <1250000>, <1200000>, | |
218 | <1050000>, <950000>; | |
219 | max8952,sync-freq = <0>; | |
220 | max8952,ramp-speed = <0>; | |
221 | ||
222 | regulator-name = "vdd_arm"; | |
223 | regulator-min-microvolt = <770000>; | |
224 | regulator-max-microvolt = <1400000>; | |
225 | regulator-always-on; | |
226 | regulator-boot-on; | |
227 | }; | |
228 | ||
229 | pmic@66 { | |
230 | compatible = "national,lp3974"; | |
231 | reg = <0x66>; | |
232 | ||
233 | max8998,pmic-buck1-default-dvs-idx = <0>; | |
234 | max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>, | |
235 | <&gpx0 6 0>; | |
236 | max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>, | |
237 | <1100000>, <1000000>; | |
238 | ||
239 | max8998,pmic-buck2-default-dvs-idx = <0>; | |
240 | max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>; | |
241 | max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>; | |
242 | ||
243 | regulators { | |
244 | ldo2_reg: LDO2 { | |
245 | regulator-name = "VALIVE_1.2V"; | |
246 | regulator-min-microvolt = <1200000>; | |
247 | regulator-max-microvolt = <1200000>; | |
248 | regulator-always-on; | |
249 | }; | |
250 | ||
251 | ldo3_reg: LDO3 { | |
252 | regulator-name = "VUSB+MIPI_1.1V"; | |
253 | regulator-min-microvolt = <1100000>; | |
254 | regulator-max-microvolt = <1100000>; | |
45e58485 | 255 | regulator-always-on; |
0682edaa OJ |
256 | }; |
257 | ||
258 | ldo4_reg: LDO4 { | |
259 | regulator-name = "VADC_3.3V"; | |
260 | regulator-min-microvolt = <3300000>; | |
261 | regulator-max-microvolt = <3300000>; | |
262 | }; | |
263 | ||
264 | ldo5_reg: LDO5 { | |
265 | regulator-name = "VTF_2.8V"; | |
266 | regulator-min-microvolt = <2800000>; | |
267 | regulator-max-microvolt = <2800000>; | |
268 | }; | |
269 | ||
270 | ldo6_reg: LDO6 { | |
271 | regulator-name = "LDO6"; | |
272 | regulator-min-microvolt = <2000000>; | |
273 | regulator-max-microvolt = <2000000>; | |
274 | }; | |
275 | ||
276 | ldo7_reg: LDO7 { | |
277 | regulator-name = "VLCD+VMIPI_1.8V"; | |
278 | regulator-min-microvolt = <1800000>; | |
279 | regulator-max-microvolt = <1800000>; | |
280 | }; | |
281 | ||
282 | ldo8_reg: LDO8 { | |
283 | regulator-name = "VUSB+VDAC_3.3V"; | |
284 | regulator-min-microvolt = <3300000>; | |
285 | regulator-max-microvolt = <3300000>; | |
45e58485 | 286 | regulator-always-on; |
0682edaa OJ |
287 | }; |
288 | ||
289 | ldo9_reg: LDO9 { | |
290 | regulator-name = "VCC_2.8V"; | |
291 | regulator-min-microvolt = <2800000>; | |
292 | regulator-max-microvolt = <2800000>; | |
293 | regulator-always-on; | |
294 | }; | |
295 | ||
296 | ldo10_reg: LDO10 { | |
297 | regulator-name = "VPLL_1.1V"; | |
298 | regulator-min-microvolt = <1100000>; | |
299 | regulator-max-microvolt = <1100000>; | |
300 | regulator-boot-on; | |
301 | regulator-always-on; | |
302 | }; | |
303 | ||
304 | ldo11_reg: LDO11 { | |
305 | regulator-name = "CAM_AF_3.3V"; | |
306 | regulator-min-microvolt = <3300000>; | |
307 | regulator-max-microvolt = <3300000>; | |
308 | }; | |
309 | ||
310 | ldo12_reg: LDO12 { | |
311 | regulator-name = "PS_2.8V"; | |
312 | regulator-min-microvolt = <2800000>; | |
313 | regulator-max-microvolt = <2800000>; | |
314 | }; | |
315 | ||
316 | ldo13_reg: LDO13 { | |
317 | regulator-name = "VHIC_1.2V"; | |
318 | regulator-min-microvolt = <1200000>; | |
319 | regulator-max-microvolt = <1200000>; | |
320 | }; | |
321 | ||
322 | ldo14_reg: LDO14 { | |
323 | regulator-name = "CAM_I_HOST_1.8V"; | |
324 | regulator-min-microvolt = <1800000>; | |
325 | regulator-max-microvolt = <1800000>; | |
326 | }; | |
327 | ||
328 | ldo15_reg: LDO15 { | |
329 | regulator-name = "CAM_S_DIG+FM33_CORE_1.2V"; | |
330 | regulator-min-microvolt = <1200000>; | |
331 | regulator-max-microvolt = <1200000>; | |
332 | }; | |
333 | ||
334 | ldo16_reg: LDO16 { | |
335 | regulator-name = "CAM_S_ANA_2.8V"; | |
336 | regulator-min-microvolt = <2800000>; | |
337 | regulator-max-microvolt = <2800000>; | |
338 | }; | |
339 | ||
340 | ldo17_reg: LDO17 { | |
341 | regulator-name = "VCC_3.0V_LCD"; | |
342 | regulator-min-microvolt = <3000000>; | |
343 | regulator-max-microvolt = <3000000>; | |
344 | }; | |
345 | ||
346 | buck1_reg: BUCK1 { | |
347 | regulator-name = "VINT_1.1V"; | |
348 | regulator-min-microvolt = <750000>; | |
349 | regulator-max-microvolt = <1500000>; | |
350 | regulator-boot-on; | |
351 | regulator-always-on; | |
352 | }; | |
353 | ||
354 | buck2_reg: BUCK2 { | |
355 | regulator-name = "VG3D_1.1V"; | |
356 | regulator-min-microvolt = <750000>; | |
357 | regulator-max-microvolt = <1500000>; | |
358 | regulator-boot-on; | |
359 | }; | |
360 | ||
361 | buck3_reg: BUCK3 { | |
362 | regulator-name = "VCC_1.8V"; | |
363 | regulator-min-microvolt = <1800000>; | |
364 | regulator-max-microvolt = <1800000>; | |
365 | regulator-always-on; | |
366 | }; | |
367 | ||
368 | buck4_reg: BUCK4 { | |
369 | regulator-name = "VMEM_1.2V"; | |
370 | regulator-min-microvolt = <1200000>; | |
371 | regulator-max-microvolt = <1200000>; | |
372 | regulator-always-on; | |
373 | }; | |
374 | ||
375 | ap32khz_reg: EN32KHz-AP { | |
376 | regulator-name = "32KHz AP"; | |
377 | regulator-always-on; | |
378 | }; | |
379 | ||
380 | cp32khz_reg: EN32KHz-CP { | |
381 | regulator-name = "32KHz CP"; | |
382 | }; | |
383 | ||
384 | vichg_reg: ENVICHG { | |
385 | regulator-name = "VICHG"; | |
386 | }; | |
387 | ||
388 | safeout1_reg: ESAFEOUT1 { | |
389 | regulator-name = "SAFEOUT1"; | |
390 | regulator-always-on; | |
391 | }; | |
392 | ||
393 | safeout2_reg: ESAFEOUT2 { | |
394 | regulator-name = "SAFEOUT2"; | |
395 | regulator-boot-on; | |
396 | }; | |
397 | }; | |
398 | }; | |
399 | }; | |
400 | ||
ffff29d1 AH |
401 | spi-lcd { |
402 | compatible = "spi-gpio"; | |
403 | #address-cells = <1>; | |
404 | #size-cells = <0>; | |
405 | ||
406 | gpio-sck = <&gpy3 1 0>; | |
407 | gpio-mosi = <&gpy3 3 0>; | |
408 | num-chipselects = <1>; | |
409 | cs-gpios = <&gpy4 3 0>; | |
410 | ||
411 | lcd@0 { | |
412 | compatible = "samsung,ld9040"; | |
413 | reg = <0>; | |
414 | vdd3-supply = <&ldo7_reg>; | |
415 | vci-supply = <&ldo17_reg>; | |
416 | reset-gpios = <&gpy4 5 0>; | |
417 | spi-max-frequency = <1200000>; | |
418 | spi-cpol; | |
419 | spi-cpha; | |
420 | power-on-delay = <10>; | |
421 | reset-delay = <10>; | |
422 | panel-width-mm = <90>; | |
423 | panel-height-mm = <154>; | |
424 | display-timings { | |
425 | timing { | |
426 | clock-frequency = <23492370>; | |
427 | hactive = <480>; | |
428 | vactive = <800>; | |
429 | hback-porch = <16>; | |
430 | hfront-porch = <16>; | |
431 | vback-porch = <2>; | |
432 | vfront-porch = <28>; | |
433 | hsync-len = <2>; | |
434 | vsync-len = <1>; | |
435 | hsync-active = <0>; | |
436 | vsync-active = <0>; | |
437 | de-active = <0>; | |
438 | pixelclk-active = <0>; | |
439 | }; | |
440 | }; | |
441 | port { | |
442 | lcd_ep: endpoint { | |
443 | remote-endpoint = <&fimd_dpi_ep>; | |
444 | }; | |
445 | }; | |
446 | }; | |
447 | }; | |
448 | ||
621c5d66 AH |
449 | fimd: fimd@11c00000 { |
450 | pinctrl-0 = <&lcd_clk>, <&lcd_data24>; | |
451 | pinctrl-names = "default"; | |
452 | status = "okay"; | |
453 | samsung,invert-vden; | |
454 | samsung,invert-vclk; | |
ffff29d1 AH |
455 | #address-cells = <1>; |
456 | #size-cells = <0>; | |
457 | port@3 { | |
458 | reg = <3>; | |
459 | fimd_dpi_ep: endpoint { | |
460 | remote-endpoint = <&lcd_ep>; | |
621c5d66 AH |
461 | }; |
462 | }; | |
463 | }; | |
464 | ||
0682edaa OJ |
465 | pwm@139D0000 { |
466 | compatible = "samsung,s5p6440-pwm"; | |
467 | status = "okay"; | |
468 | }; | |
9afc343f MS |
469 | |
470 | camera { | |
471 | status = "okay"; | |
472 | ||
473 | pinctrl-names = "default"; | |
474 | pinctrl-0 = <>; | |
475 | ||
476 | fimc_0: fimc@11800000 { | |
477 | status = "okay"; | |
0357a443 SN |
478 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, |
479 | <&clock CLK_SCLK_FIMC0>; | |
480 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
481 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
482 | }; |
483 | ||
484 | fimc_1: fimc@11810000 { | |
485 | status = "okay"; | |
0357a443 SN |
486 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, |
487 | <&clock CLK_SCLK_FIMC1>; | |
488 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
489 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
490 | }; |
491 | ||
492 | fimc_2: fimc@11820000 { | |
493 | status = "okay"; | |
0357a443 SN |
494 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, |
495 | <&clock CLK_SCLK_FIMC2>; | |
496 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
497 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
498 | }; |
499 | ||
500 | fimc_3: fimc@11830000 { | |
501 | status = "okay"; | |
0357a443 SN |
502 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, |
503 | <&clock CLK_SCLK_FIMC3>; | |
504 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
505 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
506 | }; |
507 | }; | |
0682edaa | 508 | }; |
22c98592 BZ |
509 | |
510 | &mdma1 { | |
511 | reg = <0x12840000 0x1000>; | |
512 | }; |