Commit | Line | Data |
---|---|---|
0f7238a1 TF |
1 | /* |
2 | * Samsung's Exynos4212 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212 | |
8 | * based board files can include this file and provide values for board specfic | |
9 | * bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional | |
13 | * nodes can be added to this file. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
3799279f | 20 | #include "exynos4x12.dtsi" |
0f7238a1 TF |
21 | |
22 | / { | |
8bdb31b4 | 23 | compatible = "samsung,exynos4212", "samsung,exynos4"; |
0f7238a1 | 24 | |
e540920c BZ |
25 | cpus { |
26 | #address-cells = <1>; | |
27 | #size-cells = <0>; | |
28 | ||
29 | cpu@A00 { | |
30 | device_type = "cpu"; | |
31 | compatible = "arm,cortex-a9"; | |
32 | reg = <0xA00>; | |
33 | }; | |
34 | ||
35 | cpu@A01 { | |
36 | device_type = "cpu"; | |
37 | compatible = "arm,cortex-a9"; | |
38 | reg = <0xA01>; | |
39 | }; | |
40 | }; | |
41 | ||
8bdfa203 CC |
42 | combiner: interrupt-controller@10440000 { |
43 | samsung,combiner-nr = <18>; | |
0f7238a1 | 44 | }; |
bbd9700a | 45 | |
8bdfa203 CC |
46 | gic: interrupt-controller@10490000 { |
47 | cpu-offset = <0x8000>; | |
30269ddf | 48 | }; |
0f7238a1 | 49 | }; |