Commit | Line | Data |
---|---|---|
ec601ff3 MS |
1 | /* |
2 | * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards | |
3 | * device tree source | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
3635acef | 10 | #include <dt-bindings/sound/samsung-i2s.h> |
081a15e3 | 11 | #include <dt-bindings/input/input.h> |
ee2020a4 | 12 | #include <dt-bindings/clock/maxim,max77686.h> |
ec601ff3 | 13 | #include "exynos4412.dtsi" |
4a80467a | 14 | #include "exynos4412-ppmu-common.dtsi" |
c10d3290 | 15 | #include <dt-bindings/gpio/gpio.h> |
96167bd3 | 16 | #include "exynos-mfc-reserved-memory.dtsi" |
ec601ff3 MS |
17 | |
18 | / { | |
62d38099 TF |
19 | chosen { |
20 | stdout-path = &serial_1; | |
21 | }; | |
22 | ||
ec601ff3 MS |
23 | firmware@0204F000 { |
24 | compatible = "samsung,secure-firmware"; | |
25 | reg = <0x0204F000 0x1000>; | |
26 | }; | |
27 | ||
081a15e3 MS |
28 | gpio_keys { |
29 | compatible = "gpio-keys"; | |
30 | pinctrl-names = "default"; | |
31 | pinctrl-0 = <&gpio_power_key>; | |
32 | ||
33 | power_key { | |
34 | interrupt-parent = <&gpx1>; | |
35 | interrupts = <3 0>; | |
c10d3290 | 36 | gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; |
081a15e3 MS |
37 | linux,code = <KEY_POWER>; |
38 | label = "power key"; | |
39 | debounce-interval = <10>; | |
36a0282a | 40 | wakeup-source; |
081a15e3 MS |
41 | }; |
42 | }; | |
43 | ||
5a852743 | 44 | sound: sound { |
16696337 | 45 | compatible = "simple-audio-card"; |
59760009 SN |
46 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, |
47 | <&clock_audss EXYNOS_MOUT_I2S>, | |
48 | <&clock_audss EXYNOS_DOUT_SRP>, | |
49 | <&clock_audss EXYNOS_DOUT_AUD_BUS>; | |
50 | assigned-clock-parents = <&clock CLK_FOUT_EPLL>, | |
51 | <&clock_audss EXYNOS_MOUT_AUDSS>; | |
52 | assigned-clock-rates = <0>, | |
53 | <0>, | |
54 | <192000000>, | |
55 | <19200000>; | |
16696337 SN |
56 | |
57 | simple-audio-card,format = "i2s"; | |
58 | simple-audio-card,bitclock-master = <&link0_codec>; | |
59 | simple-audio-card,frame-master = <&link0_codec>; | |
60 | ||
61 | simple-audio-card,cpu { | |
62 | sound-dai = <&i2s0 0>; | |
63 | system-clock-frequency = <19200000>; | |
64 | }; | |
65 | ||
66 | link0_codec: simple-audio-card,codec { | |
67 | sound-dai = <&max98090>; | |
68 | clocks = <&i2s0 CLK_I2S_CDCLK>; | |
69 | }; | |
5a852743 SN |
70 | }; |
71 | ||
225da7e6 MS |
72 | emmc_pwrseq: pwrseq { |
73 | pinctrl-0 = <&sd1_cd>; | |
74 | pinctrl-names = "default"; | |
75 | compatible = "mmc-pwrseq-emmc"; | |
c10d3290 | 76 | reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>; |
225da7e6 MS |
77 | }; |
78 | ||
ec601ff3 MS |
79 | camera { |
80 | status = "okay"; | |
81 | pinctrl-names = "default"; | |
82 | pinctrl-0 = <>; | |
49c1a163 | 83 | }; |
ec601ff3 | 84 | |
49c1a163 KK |
85 | fixed-rate-clocks { |
86 | xxti { | |
87 | compatible = "samsung,clock-xxti"; | |
88 | clock-frequency = <0>; | |
ec601ff3 MS |
89 | }; |
90 | ||
49c1a163 KK |
91 | xusbxti { |
92 | compatible = "samsung,clock-xusbxti"; | |
93 | clock-frequency = <24000000>; | |
ec601ff3 | 94 | }; |
49c1a163 | 95 | }; |
ec601ff3 | 96 | |
49c1a163 KK |
97 | thermal-zones { |
98 | cpu_thermal: cpu-thermal { | |
99 | cooling-maps { | |
100 | map0 { | |
101 | /* Corresponds to 800MHz at freq_table */ | |
102 | cooling-device = <&cpu0 7 7>; | |
103 | }; | |
104 | map1 { | |
105 | /* Corresponds to 200MHz at freq_table */ | |
106 | cooling-device = <&cpu0 13 13>; | |
107 | }; | |
108 | }; | |
ec601ff3 MS |
109 | }; |
110 | }; | |
49c1a163 | 111 | }; |
ec601ff3 | 112 | |
4f20aa0e CC |
113 | &bus_dmc { |
114 | devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; | |
115 | vdd-supply = <&buck1_reg>; | |
116 | status = "okay"; | |
117 | }; | |
118 | ||
119 | &bus_acp { | |
120 | devfreq = <&bus_dmc>; | |
121 | status = "okay"; | |
122 | }; | |
123 | ||
124 | &bus_c2c { | |
125 | devfreq = <&bus_dmc>; | |
126 | status = "okay"; | |
127 | }; | |
128 | ||
129 | &bus_leftbus { | |
130 | devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; | |
131 | vdd-supply = <&buck3_reg>; | |
132 | status = "okay"; | |
133 | }; | |
134 | ||
135 | &bus_rightbus { | |
136 | devfreq = <&bus_leftbus>; | |
137 | status = "okay"; | |
138 | }; | |
139 | ||
140 | &bus_display { | |
141 | devfreq = <&bus_leftbus>; | |
142 | status = "okay"; | |
143 | }; | |
144 | ||
145 | &bus_fsys { | |
146 | devfreq = <&bus_leftbus>; | |
147 | status = "okay"; | |
148 | }; | |
149 | ||
150 | &bus_peri { | |
151 | devfreq = <&bus_leftbus>; | |
152 | status = "okay"; | |
153 | }; | |
154 | ||
155 | &bus_mfc { | |
156 | devfreq = <&bus_leftbus>; | |
157 | status = "okay"; | |
158 | }; | |
159 | ||
f4499741 BZ |
160 | &cpu0 { |
161 | cpu0-supply = <&buck2_reg>; | |
162 | }; | |
163 | ||
49c1a163 KK |
164 | /* RSTN signal for eMMC */ |
165 | &sd1_cd { | |
166 | samsung,pin-pud = <0>; | |
167 | samsung,pin-drv = <0>; | |
168 | }; | |
ec601ff3 | 169 | |
49c1a163 KK |
170 | &pinctrl_1 { |
171 | gpio_power_key: power_key { | |
172 | samsung,pins = "gpx1-3"; | |
173 | samsung,pin-pud = <0>; | |
ec601ff3 MS |
174 | }; |
175 | ||
49c1a163 KK |
176 | max77686_irq: max77686-irq { |
177 | samsung,pins = "gpx3-2"; | |
178 | samsung,pin-function = <0>; | |
179 | samsung,pin-pud = <0>; | |
180 | samsung,pin-drv = <0>; | |
ec601ff3 MS |
181 | }; |
182 | ||
49c1a163 KK |
183 | hdmi_hpd: hdmi-hpd { |
184 | samsung,pins = "gpx3-7"; | |
185 | samsung,pin-pud = <1>; | |
ec601ff3 | 186 | }; |
49c1a163 | 187 | }; |
ec601ff3 | 188 | |
49c1a163 KK |
189 | &ehci { |
190 | status = "okay"; | |
191 | }; | |
ec601ff3 | 192 | |
49c1a163 KK |
193 | &exynos_usbphy { |
194 | status = "okay"; | |
195 | }; | |
ec601ff3 | 196 | |
49c1a163 KK |
197 | &fimc_0 { |
198 | status = "okay"; | |
199 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, | |
200 | <&clock CLK_SCLK_FIMC0>; | |
201 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
202 | assigned-clock-rates = <0>, <176000000>; | |
203 | }; | |
ec601ff3 | 204 | |
49c1a163 KK |
205 | &fimc_1 { |
206 | status = "okay"; | |
207 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, | |
208 | <&clock CLK_SCLK_FIMC1>; | |
209 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
210 | assigned-clock-rates = <0>, <176000000>; | |
211 | }; | |
ec601ff3 | 212 | |
49c1a163 KK |
213 | &fimc_2 { |
214 | status = "okay"; | |
215 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, | |
216 | <&clock CLK_SCLK_FIMC2>; | |
217 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
218 | assigned-clock-rates = <0>, <176000000>; | |
219 | }; | |
ec601ff3 | 220 | |
49c1a163 KK |
221 | &fimc_3 { |
222 | status = "okay"; | |
223 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, | |
224 | <&clock CLK_SCLK_FIMC3>; | |
225 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
226 | assigned-clock-rates = <0>, <176000000>; | |
227 | }; | |
ec601ff3 | 228 | |
49c1a163 | 229 | &hdmi { |
c10d3290 | 230 | hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; |
49c1a163 KK |
231 | pinctrl-names = "default"; |
232 | pinctrl-0 = <&hdmi_hpd>; | |
233 | vdd-supply = <&ldo8_reg>; | |
234 | vdd_osc-supply = <&ldo10_reg>; | |
235 | vdd_pll-supply = <&ldo8_reg>; | |
236 | ddc = <&i2c_2>; | |
237 | status = "okay"; | |
238 | }; | |
ec601ff3 | 239 | |
f1be903d MS |
240 | &hdmicec { |
241 | status = "okay"; | |
242 | }; | |
243 | ||
49c1a163 KK |
244 | &hsotg { |
245 | dr_mode = "peripheral"; | |
246 | status = "okay"; | |
247 | vusb_d-supply = <&ldo15_reg>; | |
248 | vusb_a-supply = <&ldo12_reg>; | |
249 | }; | |
ec601ff3 | 250 | |
49c1a163 | 251 | &i2c_0 { |
49c1a163 KK |
252 | samsung,i2c-sda-delay = <100>; |
253 | samsung,i2c-max-bus-freq = <400000>; | |
254 | status = "okay"; | |
255 | ||
256 | usb3503: usb3503@08 { | |
257 | compatible = "smsc,usb3503"; | |
258 | reg = <0x08>; | |
259 | ||
c10d3290 JMC |
260 | intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>; |
261 | connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; | |
262 | reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>; | |
49c1a163 KK |
263 | initial-mode = <1>; |
264 | }; | |
ec601ff3 | 265 | |
49c1a163 KK |
266 | max77686: pmic@09 { |
267 | compatible = "maxim,max77686"; | |
268 | interrupt-parent = <&gpx3>; | |
269 | interrupts = <2 0>; | |
270 | pinctrl-names = "default"; | |
271 | pinctrl-0 = <&max77686_irq>; | |
272 | reg = <0x09>; | |
273 | #clock-cells = <1>; | |
274 | ||
275 | voltage-regulators { | |
276 | ldo1_reg: LDO1 { | |
277 | regulator-name = "VDD_ALIVE_1.0V"; | |
278 | regulator-min-microvolt = <1000000>; | |
279 | regulator-max-microvolt = <1000000>; | |
280 | regulator-always-on; | |
281 | }; | |
2561658b | 282 | |
49c1a163 KK |
283 | ldo2_reg: LDO2 { |
284 | regulator-name = "VDDQ_M1_2_1.8V"; | |
285 | regulator-min-microvolt = <1800000>; | |
286 | regulator-max-microvolt = <1800000>; | |
287 | regulator-always-on; | |
288 | }; | |
a59acc17 | 289 | |
49c1a163 KK |
290 | ldo3_reg: LDO3 { |
291 | regulator-name = "VDDQ_EXT_1.8V"; | |
292 | regulator-min-microvolt = <1800000>; | |
293 | regulator-max-microvolt = <1800000>; | |
294 | regulator-always-on; | |
295 | }; | |
ec601ff3 | 296 | |
49c1a163 KK |
297 | ldo4_reg: LDO4 { |
298 | regulator-name = "VDDQ_MMC2_2.8V"; | |
299 | regulator-min-microvolt = <2800000>; | |
300 | regulator-max-microvolt = <2800000>; | |
49c1a163 KK |
301 | regulator-boot-on; |
302 | }; | |
ec601ff3 | 303 | |
49c1a163 KK |
304 | ldo5_reg: LDO5 { |
305 | regulator-name = "VDDQ_MMC1_3_1.8V"; | |
306 | regulator-min-microvolt = <1800000>; | |
307 | regulator-max-microvolt = <1800000>; | |
308 | regulator-always-on; | |
309 | regulator-boot-on; | |
310 | }; | |
ec601ff3 | 311 | |
49c1a163 KK |
312 | ldo6_reg: LDO6 { |
313 | regulator-name = "VDD10_MPLL_1.0V"; | |
314 | regulator-min-microvolt = <1000000>; | |
315 | regulator-max-microvolt = <1000000>; | |
316 | regulator-always-on; | |
317 | }; | |
ec601ff3 | 318 | |
49c1a163 KK |
319 | ldo7_reg: LDO7 { |
320 | regulator-name = "VDD10_XPLL_1.0V"; | |
321 | regulator-min-microvolt = <1000000>; | |
322 | regulator-max-microvolt = <1000000>; | |
323 | regulator-always-on; | |
324 | }; | |
ec601ff3 | 325 | |
00e5e8c4 | 326 | ldo8_reg: LDO8 { |
49c1a163 KK |
327 | regulator-name = "VDD10_HDMI_1.0V"; |
328 | regulator-min-microvolt = <1000000>; | |
329 | regulator-max-microvolt = <1000000>; | |
330 | }; | |
ec601ff3 | 331 | |
00e5e8c4 | 332 | ldo10_reg: LDO10 { |
49c1a163 KK |
333 | regulator-name = "VDDQ_MIPIHSI_1.8V"; |
334 | regulator-min-microvolt = <1800000>; | |
335 | regulator-max-microvolt = <1800000>; | |
336 | }; | |
ec601ff3 | 337 | |
49c1a163 KK |
338 | ldo11_reg: LDO11 { |
339 | regulator-name = "VDD18_ABB1_1.8V"; | |
340 | regulator-min-microvolt = <1800000>; | |
341 | regulator-max-microvolt = <1800000>; | |
342 | regulator-always-on; | |
343 | }; | |
ec601ff3 | 344 | |
49c1a163 KK |
345 | ldo12_reg: LDO12 { |
346 | regulator-name = "VDD33_USB_3.3V"; | |
347 | regulator-min-microvolt = <3300000>; | |
348 | regulator-max-microvolt = <3300000>; | |
349 | regulator-always-on; | |
350 | regulator-boot-on; | |
351 | }; | |
ec601ff3 | 352 | |
49c1a163 KK |
353 | ldo13_reg: LDO13 { |
354 | regulator-name = "VDDQ_C2C_W_1.8V"; | |
355 | regulator-min-microvolt = <1800000>; | |
356 | regulator-max-microvolt = <1800000>; | |
357 | regulator-always-on; | |
358 | regulator-boot-on; | |
359 | }; | |
ec601ff3 | 360 | |
49c1a163 KK |
361 | ldo14_reg: LDO14 { |
362 | regulator-name = "VDD18_ABB0_2_1.8V"; | |
363 | regulator-min-microvolt = <1800000>; | |
364 | regulator-max-microvolt = <1800000>; | |
365 | regulator-always-on; | |
366 | regulator-boot-on; | |
367 | }; | |
ec601ff3 | 368 | |
49c1a163 KK |
369 | ldo15_reg: LDO15 { |
370 | regulator-name = "VDD10_HSIC_1.0V"; | |
371 | regulator-min-microvolt = <1000000>; | |
372 | regulator-max-microvolt = <1000000>; | |
373 | regulator-always-on; | |
374 | regulator-boot-on; | |
375 | }; | |
ec601ff3 | 376 | |
49c1a163 KK |
377 | ldo16_reg: LDO16 { |
378 | regulator-name = "VDD18_HSIC_1.8V"; | |
379 | regulator-min-microvolt = <1800000>; | |
380 | regulator-max-microvolt = <1800000>; | |
381 | regulator-always-on; | |
382 | regulator-boot-on; | |
383 | }; | |
ec601ff3 | 384 | |
49c1a163 KK |
385 | ldo20_reg: LDO20 { |
386 | regulator-name = "LDO20_1.8V"; | |
387 | regulator-min-microvolt = <1800000>; | |
388 | regulator-max-microvolt = <1800000>; | |
389 | regulator-boot-on; | |
390 | }; | |
ec601ff3 | 391 | |
49c1a163 | 392 | ldo21_reg: LDO21 { |
885fdf7b KK |
393 | regulator-name = "TFLASH_2.8V"; |
394 | regulator-min-microvolt = <2800000>; | |
395 | regulator-max-microvolt = <2800000>; | |
49c1a163 KK |
396 | regulator-boot-on; |
397 | }; | |
ec601ff3 | 398 | |
303ce716 KK |
399 | ldo22_reg: LDO22 { |
400 | /* | |
401 | * Only U3 uses it, so let it define the | |
402 | * constraints | |
403 | */ | |
404 | regulator-name = "LDO22"; | |
405 | regulator-boot-on; | |
406 | }; | |
407 | ||
49c1a163 KK |
408 | ldo25_reg: LDO25 { |
409 | regulator-name = "VDDQ_LCD_1.8V"; | |
410 | regulator-min-microvolt = <1800000>; | |
411 | regulator-max-microvolt = <1800000>; | |
412 | regulator-always-on; | |
413 | regulator-boot-on; | |
414 | }; | |
ec601ff3 | 415 | |
49c1a163 KK |
416 | buck1_reg: BUCK1 { |
417 | regulator-name = "vdd_mif"; | |
918f7c2d CC |
418 | regulator-min-microvolt = <900000>; |
419 | regulator-max-microvolt = <1100000>; | |
49c1a163 KK |
420 | regulator-always-on; |
421 | regulator-boot-on; | |
ec601ff3 | 422 | }; |
ec601ff3 | 423 | |
49c1a163 KK |
424 | buck2_reg: BUCK2 { |
425 | regulator-name = "vdd_arm"; | |
426 | regulator-min-microvolt = <900000>; | |
427 | regulator-max-microvolt = <1350000>; | |
428 | regulator-always-on; | |
429 | regulator-boot-on; | |
430 | }; | |
5a852743 | 431 | |
49c1a163 KK |
432 | buck3_reg: BUCK3 { |
433 | regulator-name = "vdd_int"; | |
918f7c2d CC |
434 | regulator-min-microvolt = <900000>; |
435 | regulator-max-microvolt = <1050000>; | |
49c1a163 KK |
436 | regulator-always-on; |
437 | regulator-boot-on; | |
438 | }; | |
ec601ff3 | 439 | |
49c1a163 KK |
440 | buck4_reg: BUCK4 { |
441 | regulator-name = "vdd_g3d"; | |
442 | regulator-min-microvolt = <900000>; | |
443 | regulator-max-microvolt = <1100000>; | |
444 | regulator-microvolt-offset = <50000>; | |
445 | }; | |
ec601ff3 | 446 | |
49c1a163 KK |
447 | buck5_reg: BUCK5 { |
448 | regulator-name = "VDDQ_CKEM1_2_1.2V"; | |
449 | regulator-min-microvolt = <1200000>; | |
450 | regulator-max-microvolt = <1200000>; | |
451 | regulator-always-on; | |
452 | regulator-boot-on; | |
453 | }; | |
233e274a | 454 | |
49c1a163 KK |
455 | buck6_reg: BUCK6 { |
456 | regulator-name = "BUCK6_1.35V"; | |
457 | regulator-min-microvolt = <1350000>; | |
458 | regulator-max-microvolt = <1350000>; | |
459 | regulator-always-on; | |
460 | regulator-boot-on; | |
461 | }; | |
bf4a0bed | 462 | |
49c1a163 KK |
463 | buck7_reg: BUCK7 { |
464 | regulator-name = "BUCK7_2.0V"; | |
465 | regulator-min-microvolt = <2000000>; | |
466 | regulator-max-microvolt = <2000000>; | |
467 | regulator-always-on; | |
468 | }; | |
469 | ||
470 | buck8_reg: BUCK8 { | |
303ce716 KK |
471 | /* |
472 | * Constraints set by specific board: X, | |
473 | * X2 and U3. | |
474 | */ | |
49c1a163 | 475 | regulator-name = "BUCK8_2.8V"; |
49c1a163 | 476 | }; |
bf4a0bed LM |
477 | }; |
478 | }; | |
49c1a163 | 479 | }; |
2561658b | 480 | |
49c1a163 | 481 | &i2c_1 { |
49c1a163 KK |
482 | status = "okay"; |
483 | max98090: max98090@10 { | |
484 | compatible = "maxim,max98090"; | |
485 | reg = <0x10>; | |
486 | interrupt-parent = <&gpx0>; | |
487 | interrupts = <0 0>; | |
488 | clocks = <&i2s0 CLK_I2S_CDCLK>; | |
489 | clock-names = "mclk"; | |
490 | #sound-dai-cells = <0>; | |
2561658b | 491 | }; |
49c1a163 | 492 | }; |
2561658b | 493 | |
49c1a163 KK |
494 | &i2c_2 { |
495 | status = "okay"; | |
49c1a163 | 496 | }; |
2561658b | 497 | |
49c1a163 KK |
498 | &i2c_8 { |
499 | status = "okay"; | |
500 | }; | |
2561658b | 501 | |
49c1a163 KK |
502 | &i2s0 { |
503 | pinctrl-0 = <&i2s0_bus>; | |
504 | pinctrl-names = "default"; | |
505 | status = "okay"; | |
506 | clocks = <&clock_audss EXYNOS_I2S_BUS>, | |
507 | <&clock_audss EXYNOS_DOUT_AUD_BUS>, | |
508 | <&clock_audss EXYNOS_SCLK_I2S>; | |
509 | clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; | |
ec601ff3 | 510 | }; |
081a15e3 | 511 | |
49c1a163 KK |
512 | &mixer { |
513 | status = "okay"; | |
225da7e6 MS |
514 | }; |
515 | ||
49c1a163 KK |
516 | &mshc_0 { |
517 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; | |
518 | pinctrl-names = "default"; | |
303ce716 | 519 | vmmc-supply = <&ldo20_reg>; |
49c1a163 KK |
520 | mmc-pwrseq = <&emmc_pwrseq>; |
521 | status = "okay"; | |
522 | ||
523 | num-slots = <1>; | |
524 | broken-cd; | |
525 | card-detect-delay = <200>; | |
526 | samsung,dw-mshc-ciu-div = <3>; | |
527 | samsung,dw-mshc-sdr-timing = <2 3>; | |
528 | samsung,dw-mshc-ddr-timing = <1 2>; | |
529 | bus-width = <8>; | |
530 | cap-mmc-highspeed; | |
531 | }; | |
eea6653a | 532 | |
49c1a163 KK |
533 | &rtc { |
534 | status = "okay"; | |
535 | clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; | |
536 | clock-names = "rtc", "rtc_src"; | |
537 | }; | |
2561658b | 538 | |
49c1a163 KK |
539 | &sdhci_2 { |
540 | bus-width = <4>; | |
541 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | |
542 | pinctrl-names = "default"; | |
0f0677f6 KK |
543 | vmmc-supply = <&ldo21_reg>; |
544 | vqmmc-supply = <&ldo4_reg>; | |
c10d3290 | 545 | cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>; |
49c1a163 KK |
546 | cd-inverted; |
547 | status = "okay"; | |
548 | }; | |
549 | ||
550 | &serial_0 { | |
551 | status = "okay"; | |
552 | }; | |
553 | ||
554 | &serial_1 { | |
555 | status = "okay"; | |
556 | }; | |
557 | ||
558 | &tmu { | |
559 | vtmu-supply = <&ldo10_reg>; | |
560 | status = "okay"; | |
561 | }; | |
562 | ||
563 | &watchdog { | |
564 | status = "okay"; | |
081a15e3 | 565 | }; |