Commit | Line | Data |
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3a7c01d7 KK |
1 | /* |
2 | * Hardkernel Odroid XU3 board device tree source | |
3 | * | |
4 | * Copyright (c) 2014 Collabora Ltd. | |
5 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. | |
6 | * http://www.samsung.com | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <dt-bindings/clock/samsung,s2mps11.h> | |
14 | #include <dt-bindings/interrupt-controller/irq.h> | |
15 | #include <dt-bindings/gpio/gpio.h> | |
16 | #include <dt-bindings/sound/samsung-i2s.h> | |
17 | #include "exynos5800.dtsi" | |
df09df6f | 18 | #include "exynos5422-cpus.dtsi" |
cc20fc4c | 19 | #include "exynos5422-cpu-thermal.dtsi" |
3a7c01d7 KK |
20 | |
21 | / { | |
22 | memory { | |
23 | reg = <0x40000000 0x7EA00000>; | |
24 | }; | |
25 | ||
26 | chosen { | |
27 | linux,stdout-path = &serial_2; | |
28 | }; | |
29 | ||
30 | firmware@02073000 { | |
31 | compatible = "samsung,secure-firmware"; | |
32 | reg = <0x02073000 0x1000>; | |
33 | }; | |
34 | ||
35 | fixed-rate-clocks { | |
36 | oscclk { | |
37 | compatible = "samsung,exynos5420-oscclk"; | |
38 | clock-frequency = <24000000>; | |
39 | }; | |
40 | }; | |
41 | ||
42 | emmc_pwrseq: pwrseq { | |
43 | pinctrl-0 = <&emmc_nrst_pin>; | |
44 | pinctrl-names = "default"; | |
45 | compatible = "mmc-pwrseq-emmc"; | |
31b9903c | 46 | reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>; |
3a7c01d7 KK |
47 | }; |
48 | ||
b685d540 AM |
49 | fan0: pwm-fan { |
50 | compatible = "pwm-fan"; | |
51 | pwms = <&pwm 0 20972 0>; | |
52 | cooling-min-state = <0>; | |
53 | cooling-max-state = <3>; | |
54 | #cooling-cells = <2>; | |
55 | cooling-levels = <0 130 170 230>; | |
56 | }; | |
3a7c01d7 KK |
57 | }; |
58 | ||
59 | &clock_audss { | |
60 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, | |
61 | <&clock_audss EXYNOS_MOUT_I2S>, | |
62 | <&clock_audss EXYNOS_DOUT_AUD_BUS>; | |
63 | assigned-clock-parents = <&clock CLK_FIN_PLL>, | |
64 | <&clock_audss EXYNOS_MOUT_AUDSS>; | |
65 | assigned-clock-rates = <0>, | |
66 | <0>, | |
67 | <19200000>; | |
68 | }; | |
69 | ||
8b51c5e7 BZ |
70 | &cpu0 { |
71 | cpu-supply = <&buck6_reg>; | |
72 | }; | |
73 | ||
74 | &cpu4 { | |
75 | cpu-supply = <&buck2_reg>; | |
76 | }; | |
77 | ||
3a7c01d7 KK |
78 | &hdmi { |
79 | status = "okay"; | |
31b9903c | 80 | hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; |
3a7c01d7 KK |
81 | pinctrl-names = "default"; |
82 | pinctrl-0 = <&hdmi_hpd_irq>; | |
83 | ||
84 | vdd_osc-supply = <&ldo7_reg>; | |
85 | vdd_pll-supply = <&ldo6_reg>; | |
86 | vdd-supply = <&ldo6_reg>; | |
87 | }; | |
88 | ||
89 | &hsi2c_4 { | |
90 | status = "okay"; | |
91 | ||
92 | s2mps11_pmic@66 { | |
93 | compatible = "samsung,s2mps11-pmic"; | |
94 | reg = <0x66>; | |
95 | s2mps11,buck2-ramp-delay = <12>; | |
96 | s2mps11,buck34-ramp-delay = <12>; | |
97 | s2mps11,buck16-ramp-delay = <12>; | |
98 | s2mps11,buck6-ramp-enable = <1>; | |
99 | s2mps11,buck2-ramp-enable = <1>; | |
100 | s2mps11,buck3-ramp-enable = <1>; | |
101 | s2mps11,buck4-ramp-enable = <1>; | |
0fb033bb | 102 | samsung,s2mps11-acokb-ground; |
3a7c01d7 KK |
103 | |
104 | interrupt-parent = <&gpx0>; | |
105 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; | |
106 | pinctrl-names = "default"; | |
107 | pinctrl-0 = <&s2mps11_irq>; | |
108 | ||
109 | s2mps11_osc: clocks { | |
110 | #clock-cells = <1>; | |
111 | clock-output-names = "s2mps11_ap", | |
112 | "s2mps11_cp", "s2mps11_bt"; | |
113 | }; | |
114 | ||
115 | regulators { | |
116 | ldo1_reg: LDO1 { | |
117 | regulator-name = "vdd_ldo1"; | |
118 | regulator-min-microvolt = <1000000>; | |
119 | regulator-max-microvolt = <1000000>; | |
120 | regulator-always-on; | |
121 | }; | |
122 | ||
123 | ldo3_reg: LDO3 { | |
124 | regulator-name = "vdd_ldo3"; | |
125 | regulator-min-microvolt = <1800000>; | |
126 | regulator-max-microvolt = <1800000>; | |
127 | regulator-always-on; | |
128 | }; | |
129 | ||
130 | ldo5_reg: LDO5 { | |
131 | regulator-name = "vdd_ldo5"; | |
132 | regulator-min-microvolt = <1800000>; | |
133 | regulator-max-microvolt = <1800000>; | |
134 | regulator-always-on; | |
135 | }; | |
136 | ||
137 | ldo6_reg: LDO6 { | |
138 | regulator-name = "vdd_ldo6"; | |
139 | regulator-min-microvolt = <1000000>; | |
140 | regulator-max-microvolt = <1000000>; | |
141 | regulator-always-on; | |
142 | }; | |
143 | ||
144 | ldo7_reg: LDO7 { | |
145 | regulator-name = "vdd_ldo7"; | |
146 | regulator-min-microvolt = <1800000>; | |
147 | regulator-max-microvolt = <1800000>; | |
148 | regulator-always-on; | |
149 | }; | |
150 | ||
151 | ldo8_reg: LDO8 { | |
152 | regulator-name = "vdd_ldo8"; | |
153 | regulator-min-microvolt = <1800000>; | |
154 | regulator-max-microvolt = <1800000>; | |
155 | regulator-always-on; | |
156 | }; | |
157 | ||
158 | ldo9_reg: LDO9 { | |
159 | regulator-name = "vdd_ldo9"; | |
160 | regulator-min-microvolt = <3000000>; | |
161 | regulator-max-microvolt = <3000000>; | |
162 | regulator-always-on; | |
163 | }; | |
164 | ||
165 | ldo10_reg: LDO10 { | |
166 | regulator-name = "vdd_ldo10"; | |
167 | regulator-min-microvolt = <1800000>; | |
168 | regulator-max-microvolt = <1800000>; | |
169 | regulator-always-on; | |
170 | }; | |
171 | ||
172 | ldo11_reg: LDO11 { | |
173 | regulator-name = "vdd_ldo11"; | |
174 | regulator-min-microvolt = <1000000>; | |
175 | regulator-max-microvolt = <1000000>; | |
176 | regulator-always-on; | |
177 | }; | |
178 | ||
179 | ldo12_reg: LDO12 { | |
180 | regulator-name = "vdd_ldo12"; | |
181 | regulator-min-microvolt = <1800000>; | |
182 | regulator-max-microvolt = <1800000>; | |
183 | regulator-always-on; | |
184 | }; | |
185 | ||
186 | ldo13_reg: LDO13 { | |
187 | regulator-name = "vdd_ldo13"; | |
188 | regulator-min-microvolt = <2800000>; | |
189 | regulator-max-microvolt = <2800000>; | |
190 | regulator-always-on; | |
191 | }; | |
192 | ||
193 | ldo15_reg: LDO15 { | |
194 | regulator-name = "vdd_ldo15"; | |
195 | regulator-min-microvolt = <3100000>; | |
196 | regulator-max-microvolt = <3100000>; | |
197 | regulator-always-on; | |
198 | }; | |
199 | ||
200 | ldo16_reg: LDO16 { | |
201 | regulator-name = "vdd_ldo16"; | |
202 | regulator-min-microvolt = <2200000>; | |
203 | regulator-max-microvolt = <2200000>; | |
204 | regulator-always-on; | |
205 | }; | |
206 | ||
207 | ldo17_reg: LDO17 { | |
208 | regulator-name = "tsp_avdd"; | |
209 | regulator-min-microvolt = <3300000>; | |
210 | regulator-max-microvolt = <3300000>; | |
211 | regulator-always-on; | |
212 | }; | |
213 | ||
214 | ldo19_reg: LDO19 { | |
215 | regulator-name = "vdd_sd"; | |
216 | regulator-min-microvolt = <2800000>; | |
217 | regulator-max-microvolt = <2800000>; | |
218 | regulator-always-on; | |
219 | }; | |
220 | ||
221 | ldo24_reg: LDO24 { | |
222 | regulator-name = "tsp_io"; | |
223 | regulator-min-microvolt = <2800000>; | |
224 | regulator-max-microvolt = <2800000>; | |
225 | regulator-always-on; | |
226 | }; | |
227 | ||
228 | ldo26_reg: LDO26 { | |
229 | regulator-name = "vdd_ldo26"; | |
230 | regulator-min-microvolt = <3000000>; | |
231 | regulator-max-microvolt = <3000000>; | |
232 | regulator-always-on; | |
233 | }; | |
234 | ||
235 | buck1_reg: BUCK1 { | |
236 | regulator-name = "vdd_mif"; | |
237 | regulator-min-microvolt = <800000>; | |
238 | regulator-max-microvolt = <1300000>; | |
239 | regulator-always-on; | |
240 | regulator-boot-on; | |
241 | }; | |
242 | ||
243 | buck2_reg: BUCK2 { | |
244 | regulator-name = "vdd_arm"; | |
245 | regulator-min-microvolt = <800000>; | |
246 | regulator-max-microvolt = <1500000>; | |
247 | regulator-always-on; | |
248 | regulator-boot-on; | |
249 | }; | |
250 | ||
251 | buck3_reg: BUCK3 { | |
252 | regulator-name = "vdd_int"; | |
253 | regulator-min-microvolt = <800000>; | |
254 | regulator-max-microvolt = <1400000>; | |
255 | regulator-always-on; | |
256 | regulator-boot-on; | |
257 | }; | |
258 | ||
259 | buck4_reg: BUCK4 { | |
260 | regulator-name = "vdd_g3d"; | |
261 | regulator-min-microvolt = <800000>; | |
262 | regulator-max-microvolt = <1400000>; | |
263 | regulator-always-on; | |
264 | regulator-boot-on; | |
265 | }; | |
266 | ||
267 | buck5_reg: BUCK5 { | |
268 | regulator-name = "vdd_mem"; | |
269 | regulator-min-microvolt = <800000>; | |
270 | regulator-max-microvolt = <1400000>; | |
271 | regulator-always-on; | |
272 | regulator-boot-on; | |
273 | }; | |
274 | ||
275 | buck6_reg: BUCK6 { | |
276 | regulator-name = "vdd_kfc"; | |
277 | regulator-min-microvolt = <800000>; | |
278 | regulator-max-microvolt = <1500000>; | |
279 | regulator-always-on; | |
280 | regulator-boot-on; | |
281 | }; | |
282 | ||
283 | buck7_reg: BUCK7 { | |
284 | regulator-name = "vdd_1.0v_ldo"; | |
285 | regulator-min-microvolt = <800000>; | |
286 | regulator-max-microvolt = <1500000>; | |
287 | regulator-always-on; | |
288 | regulator-boot-on; | |
289 | }; | |
290 | ||
291 | buck8_reg: BUCK8 { | |
292 | regulator-name = "vdd_1.8v_ldo"; | |
293 | regulator-min-microvolt = <800000>; | |
294 | regulator-max-microvolt = <1500000>; | |
295 | regulator-always-on; | |
296 | regulator-boot-on; | |
297 | }; | |
298 | ||
299 | buck9_reg: BUCK9 { | |
300 | regulator-name = "vdd_2.8v_ldo"; | |
301 | regulator-min-microvolt = <3000000>; | |
302 | regulator-max-microvolt = <3750000>; | |
303 | regulator-always-on; | |
304 | regulator-boot-on; | |
305 | }; | |
306 | ||
307 | buck10_reg: BUCK10 { | |
308 | regulator-name = "vdd_vmem"; | |
309 | regulator-min-microvolt = <2850000>; | |
310 | regulator-max-microvolt = <2850000>; | |
311 | regulator-always-on; | |
312 | regulator-boot-on; | |
313 | }; | |
314 | }; | |
315 | }; | |
316 | }; | |
317 | ||
3a7c01d7 KK |
318 | &i2c_2 { |
319 | samsung,i2c-sda-delay = <100>; | |
320 | samsung,i2c-max-bus-freq = <66000>; | |
321 | status = "okay"; | |
322 | ||
323 | hdmiddc@50 { | |
324 | compatible = "samsung,exynos4210-hdmiddc"; | |
325 | reg = <0x50>; | |
326 | }; | |
327 | }; | |
328 | ||
3a7c01d7 KK |
329 | &mfc { |
330 | samsung,mfc-r = <0x43000000 0x800000>; | |
331 | samsung,mfc-l = <0x51000000 0x800000>; | |
332 | }; | |
333 | ||
334 | &mmc_0 { | |
335 | status = "okay"; | |
336 | mmc-pwrseq = <&emmc_pwrseq>; | |
337 | cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>; | |
338 | card-detect-delay = <200>; | |
339 | samsung,dw-mshc-ciu-div = <3>; | |
340 | samsung,dw-mshc-sdr-timing = <0 4>; | |
341 | samsung,dw-mshc-ddr-timing = <0 2>; | |
342 | samsung,dw-mshc-hs400-timing = <0 2>; | |
343 | samsung,read-strobe-delay = <90>; | |
344 | pinctrl-names = "default"; | |
345 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; | |
346 | bus-width = <8>; | |
347 | cap-mmc-highspeed; | |
348 | mmc-hs200-1_8v; | |
349 | mmc-hs400-1_8v; | |
350 | }; | |
351 | ||
352 | &mmc_2 { | |
353 | status = "okay"; | |
354 | card-detect-delay = <200>; | |
355 | samsung,dw-mshc-ciu-div = <3>; | |
356 | samsung,dw-mshc-sdr-timing = <0 4>; | |
357 | samsung,dw-mshc-ddr-timing = <0 2>; | |
358 | pinctrl-names = "default"; | |
359 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; | |
360 | bus-width = <4>; | |
361 | cap-sd-highspeed; | |
362 | }; | |
363 | ||
364 | &pinctrl_0 { | |
365 | hdmi_hpd_irq: hdmi-hpd-irq { | |
366 | samsung,pins = "gpx3-7"; | |
367 | samsung,pin-function = <0>; | |
368 | samsung,pin-pud = <1>; | |
369 | samsung,pin-drv = <0>; | |
370 | }; | |
371 | ||
372 | s2mps11_irq: s2mps11-irq { | |
373 | samsung,pins = "gpx0-4"; | |
374 | samsung,pin-function = <0xf>; | |
375 | samsung,pin-pud = <0>; | |
376 | samsung,pin-drv = <0>; | |
377 | }; | |
378 | }; | |
379 | ||
380 | &pinctrl_1 { | |
381 | emmc_nrst_pin: emmc-nrst { | |
382 | samsung,pins = "gpd1-0"; | |
383 | samsung,pin-function = <0>; | |
384 | samsung,pin-pud = <0>; | |
385 | samsung,pin-drv = <0>; | |
386 | }; | |
387 | }; | |
388 | ||
8e946a05 AM |
389 | &tmu_cpu0 { |
390 | vtmu-supply = <&ldo7_reg>; | |
391 | status = "okay"; | |
392 | }; | |
393 | ||
394 | &tmu_cpu1 { | |
395 | vtmu-supply = <&ldo7_reg>; | |
396 | status = "okay"; | |
397 | }; | |
398 | ||
399 | &tmu_cpu2 { | |
400 | vtmu-supply = <&ldo7_reg>; | |
401 | status = "okay"; | |
402 | }; | |
403 | ||
404 | &tmu_cpu3 { | |
405 | vtmu-supply = <&ldo7_reg>; | |
406 | status = "okay"; | |
407 | }; | |
408 | ||
409 | &tmu_gpu { | |
410 | vtmu-supply = <&ldo7_reg>; | |
411 | status = "okay"; | |
412 | }; | |
413 | ||
3a7c01d7 KK |
414 | &rtc { |
415 | status = "okay"; | |
416 | clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; | |
417 | clock-names = "rtc", "rtc_src"; | |
418 | }; | |
419 | ||
420 | &usbdrd_dwc3_0 { | |
421 | dr_mode = "host"; | |
422 | }; | |
423 | ||
66583560 | 424 | /* usbdrd_dwc3_1 mode customized in each board */ |
dc929d49 AM |
425 | |
426 | &usbdrd3_0 { | |
427 | vdd33-supply = <&ldo9_reg>; | |
428 | vdd10-supply = <&ldo11_reg>; | |
429 | }; | |
430 | ||
431 | &usbdrd3_1 { | |
432 | vdd33-supply = <&ldo9_reg>; | |
433 | vdd10-supply = <&ldo11_reg>; | |
434 | }; |