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853d2694 AK |
1 | /* |
2 | * Google Peach Pi Rev 10+ board device tree source | |
3 | * | |
4 | * Copyright (c) 2014 Google, Inc | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | /dts-v1/; | |
12 | #include <dt-bindings/input/input.h> | |
13 | #include <dt-bindings/gpio/gpio.h> | |
14 | #include "exynos5800.dtsi" | |
15 | ||
16 | / { | |
17 | model = "Google Peach Pi Rev 10+"; | |
18 | ||
19 | compatible = "google,pi-rev16", | |
20 | "google,pi-rev15", "google,pi-rev14", | |
21 | "google,pi-rev13", "google,pi-rev12", | |
22 | "google,pi-rev11", "google,pi-rev10", | |
23 | "google,pi", "google,peach", "samsung,exynos5800", | |
24 | "samsung,exynos5"; | |
25 | ||
26 | memory { | |
27 | reg = <0x20000000 0x80000000>; | |
28 | }; | |
29 | ||
30 | fixed-rate-clocks { | |
31 | oscclk { | |
32 | compatible = "samsung,exynos5420-oscclk"; | |
33 | clock-frequency = <24000000>; | |
34 | }; | |
35 | }; | |
36 | ||
37 | gpio-keys { | |
38 | compatible = "gpio-keys"; | |
39 | ||
40 | pinctrl-names = "default"; | |
41 | pinctrl-0 = <&power_key_irq>; | |
42 | ||
43 | power { | |
44 | label = "Power"; | |
45 | gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; | |
46 | linux,code = <KEY_POWER>; | |
47 | gpio-key,wakeup; | |
48 | }; | |
49 | }; | |
50 | ||
51 | backlight { | |
52 | compatible = "pwm-backlight"; | |
53 | pwms = <&pwm 0 1000000 0>; | |
54 | brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; | |
55 | default-brightness-level = <7>; | |
56 | pinctrl-0 = <&pwm0_out>; | |
57 | pinctrl-names = "default"; | |
58 | }; | |
59 | }; | |
60 | ||
61 | &pinctrl_0 { | |
62 | tpm_irq: tpm-irq { | |
63 | samsung,pins = "gpx1-0"; | |
64 | samsung,pin-function = <0>; | |
65 | samsung,pin-pud = <0>; | |
66 | samsung,pin-drv = <0>; | |
67 | }; | |
68 | ||
69 | power_key_irq: power-key-irq { | |
70 | samsung,pins = "gpx1-2"; | |
71 | samsung,pin-function = <0>; | |
72 | samsung,pin-pud = <0>; | |
73 | samsung,pin-drv = <0>; | |
74 | }; | |
75 | }; | |
76 | ||
77 | &rtc { | |
78 | status = "okay"; | |
79 | }; | |
80 | ||
81 | &uart_3 { | |
82 | status = "okay"; | |
83 | }; | |
84 | ||
85 | &mmc_0 { | |
86 | status = "okay"; | |
87 | num-slots = <1>; | |
88 | broken-cd; | |
89 | caps2-mmc-hs200-1_8v; | |
90 | supports-highspeed; | |
91 | non-removable; | |
92 | card-detect-delay = <200>; | |
93 | clock-frequency = <400000000>; | |
94 | samsung,dw-mshc-ciu-div = <3>; | |
95 | samsung,dw-mshc-sdr-timing = <0 4>; | |
96 | samsung,dw-mshc-ddr-timing = <0 2>; | |
97 | pinctrl-names = "default"; | |
98 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | |
99 | ||
100 | slot@0 { | |
101 | reg = <0>; | |
102 | bus-width = <8>; | |
103 | }; | |
104 | }; | |
105 | ||
106 | &mmc_2 { | |
107 | status = "okay"; | |
108 | num-slots = <1>; | |
109 | supports-highspeed; | |
110 | card-detect-delay = <200>; | |
111 | clock-frequency = <400000000>; | |
112 | samsung,dw-mshc-ciu-div = <3>; | |
113 | samsung,dw-mshc-sdr-timing = <2 3>; | |
114 | samsung,dw-mshc-ddr-timing = <1 2>; | |
115 | pinctrl-names = "default"; | |
116 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | |
117 | ||
118 | slot@0 { | |
119 | reg = <0>; | |
120 | bus-width = <4>; | |
121 | }; | |
122 | }; | |
123 | ||
124 | &hsi2c_9 { | |
125 | status = "okay"; | |
126 | clock-frequency = <400000>; | |
127 | ||
128 | tpm@20 { | |
129 | compatible = "infineon,slb9645tt"; | |
130 | reg = <0x20>; | |
131 | /* Unused irq; but still need to configure the pins */ | |
132 | pinctrl-names = "default"; | |
133 | pinctrl-0 = <&tpm_irq>; | |
134 | }; | |
135 | }; | |
136 | ||
137 | /* | |
138 | * Use longest HW watchdog in SoC (32 seconds) since the hardware | |
139 | * watchdog provides no debugging information (compared to soft/hard | |
140 | * lockup detectors) and so should be last resort. | |
141 | */ | |
142 | &watchdog { | |
143 | timeout-sec = <32>; | |
144 | }; |