[deliverable/linux.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx23-pinfunc.h"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
		spi0 = &ssp0;
		spi1 = &ssp1;
		usbphy0 = &usbphy0;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <0 14 20 0
					      13 13 13 13>;
				interrupt-names = "empty", "ssp0", "ssp1", "empty",
						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
				#dma-cells = <1>;
				dma-channels = <8>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <56>;
				interrupt-names = "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					reg = <0>;
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					reg = <1>;
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					reg = <2>;
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM0__DUART_RX
						MX23_PAD_PWM1__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_AUART1_RX__AUART1_RX
						MX23_PAD_AUART1_TX__AUART1_TX
						MX23_PAD_AUART1_CTS__AUART1_CTS
						MX23_PAD_AUART1_RTS__AUART1_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__AUART1_TX
						MX23_PAD_I2C_SDA__AUART1_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D14__AUART2_RX
						MX23_PAD_GPMI_D15__AUART2_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__GPMI_D00
						MX23_PAD_GPMI_D01__GPMI_D01
						MX23_PAD_GPMI_D02__GPMI_D02
						MX23_PAD_GPMI_D03__GPMI_D03
						MX23_PAD_GPMI_D04__GPMI_D04
						MX23_PAD_GPMI_D05__GPMI_D05
						MX23_PAD_GPMI_D06__GPMI_D06
						MX23_PAD_GPMI_D07__GPMI_D07
						MX23_PAD_GPMI_CLE__GPMI_CLE
						MX23_PAD_GPMI_ALE__GPMI_ALE
						MX23_PAD_GPMI_RDY0__GPMI_RDY0
						MX23_PAD_GPMI_RDY1__GPMI_RDY1
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
						MX23_PAD_GPMI_CE1N__GPMI_CE1N
						MX23_PAD_GPMI_CE0N__GPMI_CE0N
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_GPMI_D08__SSP1_DATA4
						MX23_PAD_GPMI_D09__SSP1_DATA5
						MX23_PAD_GPMI_D10__SSP1_DATA6
						MX23_PAD_GPMI_D11__SSP1_DATA7
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc1_4bit_pins_a: mmc1-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D01__SSP2_DATA1
						MX23_PAD_GPMI_D02__SSP2_DATA2
						MX23_PAD_GPMI_D03__SSP2_DATA3
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_WRN__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc1_8bit_pins_a: mmc1-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D01__SSP2_DATA1
						MX23_PAD_GPMI_D02__SSP2_DATA2
						MX23_PAD_GPMI_D03__SSP2_DATA3
						MX23_PAD_GPMI_D04__SSP2_DATA4
						MX23_PAD_GPMI_D05__SSP2_DATA5
						MX23_PAD_GPMI_D06__SSP2_DATA6
						MX23_PAD_GPMI_D07__SSP2_DATA7
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_WRN__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM2__PWM2
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_D00__LCD_D00
						MX23_PAD_LCD_D01__LCD_D01
						MX23_PAD_LCD_D02__LCD_D02
						MX23_PAD_LCD_D03__LCD_D03
						MX23_PAD_LCD_D04__LCD_D04
						MX23_PAD_LCD_D05__LCD_D05
						MX23_PAD_LCD_D06__LCD_D06
						MX23_PAD_LCD_D07__LCD_D07
						MX23_PAD_LCD_D08__LCD_D08
						MX23_PAD_LCD_D09__LCD_D09
						MX23_PAD_LCD_D10__LCD_D10
						MX23_PAD_LCD_D11__LCD_D11
						MX23_PAD_LCD_D12__LCD_D12
						MX23_PAD_LCD_D13__LCD_D13
						MX23_PAD_LCD_D14__LCD_D14
						MX23_PAD_LCD_D15__LCD_D15
						MX23_PAD_LCD_D16__LCD_D16
						MX23_PAD_LCD_D17__LCD_D17
						MX23_PAD_GPMI_D08__LCD_D18
						MX23_PAD_GPMI_D09__LCD_D19
						MX23_PAD_GPMI_D10__LCD_D20
						MX23_PAD_GPMI_D11__LCD_D21
						MX23_PAD_GPMI_D12__LCD_D22
						MX23_PAD_GPMI_D13__LCD_D23
						MX23_PAD_LCD_DOTCK__LCD_DOTCK
						MX23_PAD_LCD_ENABLE__LCD_ENABLE
						MX23_PAD_LCD_HSYNC__LCD_HSYNC
						MX23_PAD_LCD_VSYNC__LCD_VSYNC
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WRN__SSP2_SCK
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D03__SSP2_DATA3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_a: i2c@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__I2C_SCL
						MX23_PAD_I2C_SDA__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_b: i2c@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_ENABLE__I2C_SCL
						MX23_PAD_LCD_HSYNC__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_c: i2c@2 {
					reg = <2>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA1__I2C_SCL
						MX23_PAD_SSP1_DATA2__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <7 5 9 26
					      19 0 25 23
					      60 58 9 0
					      0 0 0 0>;
				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
						  "saif0", "empty", "auart0-rx", "auart0-tx",
						  "auart1-rx", "auart1-tx", "saif1", "empty",
						  "empty", "empty", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				compatible = "fsl,imx23-dcp";
				reg = <0x80028000 0x2000>;
				interrupts = <53 54>;
				status = "okay";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				compatible = "fsl,imx23-ocotp", "fsl,ocotp";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8002c000 0x2000>;
				clocks = <&clks 15>;
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				dmas = <&dma_apbx 10>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				dmas = <&dma_apbx 1>;
				dma-names = "tx";
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				dmas = <&dma_apbx 0>;
				dma-names = "rx";
				status = "disabled";
			};

			lradc: lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
				clocks = <&clks 26>;
				#io-channel-cells = <1>;
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			i2c: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-i2c";
				reg = <0x80058000 0x2000>;
				interrupts = <27>;
				clock-frequency = <100000>;
				dmas = <&dma_apbx 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&lradc 8>;
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
bc3875f1 LW	12	#include "skeleton.dtsi"
bc3875f1 LW	13	#include "imx23-pinfunc.h"
2954ff39 SG	14
	15	/ {
	16	interrupt-parent = <&icoll>;
	17
ce4c6f9b SG	18	aliases {
	19	gpio0 = &gpio0;
	20	gpio1 = &gpio1;
	21	gpio2 = &gpio2;
a4508394 SG	22	serial0 = &auart0;
a4508394 SG	23	serial1 = &auart1;
6bf6eb09 FE	24	spi0 = &ssp0;
6bf6eb09 FE	25	spi1 = &ssp1;
1f35cc6a	26	usbphy0 = &usbphy0;
ce4c6f9b SG	27	};
ce4c6f9b SG	28
2954ff39	29	cpus {
7925e89f LP	30	#address-cells = <0>;
	31	#size-cells = <0>;
	32
	33	cpu {
	34	compatible = "arm,arm926ej-s";
	35	device_type = "cpu";
2954ff39 SG	36	};
	37	};
	38
	39	apb@80000000 {
	40	compatible = "simple-bus";
	41	#address-cells = <1>;
	42	#size-cells = <1>;
	43	reg = <0x80000000 0x80000>;
	44	ranges;
	45
	46	apbh@80000000 {
	47	compatible = "simple-bus";
	48	#address-cells = <1>;
	49	#size-cells = <1>;
	50	reg = <0x80000000 0x40000>;
	51	ranges;
	52
	53	icoll: interrupt-controller@80000000 {
83a84efc	54	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	55	interrupt-controller;
	56	#interrupt-cells = <1>;
	57	reg = <0x80000000 0x2000>;
	58	};
	59
f30fb03d	60	dma_apbh: dma-apbh@80004000 {
84f3570a	61	compatible = "fsl,imx23-dma-apbh";
640bf060	62	reg = <0x80004000 0x2000>;
f30fb03d SG	63	interrupts = <0 14 20 0
	64	13 13 13 13>;
	65	interrupt-names = "empty", "ssp0", "ssp1", "empty",
	66	"gpmi0", "gpmi1", "gpmi2", "gpmi3";
	67	#dma-cells = <1>;
	68	dma-channels = <8>;
53f9443d	69	clocks = <&clks 15>;
2954ff39 SG	70	};
	71
	72	ecc@80008000 {
640bf060	73	reg = <0x80008000 0x2000>;
2954ff39 SG	74	status = "disabled";
	75	};
	76
a217c46c	77	gpmi-nand@8000c000 {
b9f25f86 HS	78	compatible = "fsl,imx23-gpmi-nand";
	79	#address-cells = <1>;
	80	#size-cells = <1>;
640bf060	81	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86	82	reg-names = "gpmi-nand", "bch";
7f2b9288 SG	83	interrupts = <56>;
7f2b9288 SG	84	interrupt-names = "bch";
53f9443d	85	clocks = <&clks 34>;
b6442559	86	clock-names = "gpmi_io";
f30fb03d SG	87	dmas = <&dma_apbh 4>;
f30fb03d SG	88	dma-names = "rx-tx";
2954ff39 SG	89	status = "disabled";
	90	};
	91
	92	ssp0: ssp@80010000 {
640bf060	93	reg = <0x80010000 0x2000>;
7f2b9288	94	interrupts = <15>;
53f9443d	95	clocks = <&clks 33>;
f30fb03d SG	96	dmas = <&dma_apbh 1>;
f30fb03d SG	97	dma-names = "rx-tx";
2954ff39 SG	98	status = "disabled";
	99	};
	100
	101	etm@80014000 {
640bf060	102	reg = <0x80014000 0x2000>;
2954ff39 SG	103	status = "disabled";
	104	};
	105
	106	pinctrl@80018000 {
	107	#address-cells = <1>;
	108	#size-cells = <0>;
ce4c6f9b	109	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	110	reg = <0x80018000 0x2000>;
2954ff39	111
ce4c6f9b SG	112	gpio0: gpio@0 {
ce4c6f9b SG	113	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
e57609aa	114	reg = <0>;
ce4c6f9b SG	115	interrupts = <16>;
	116	gpio-controller;
	117	#gpio-cells = <2>;
	118	interrupt-controller;
	119	#interrupt-cells = <2>;
	120	};
	121
	122	gpio1: gpio@1 {
	123	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
e57609aa	124	reg = <1>;
ce4c6f9b SG	125	interrupts = <17>;
	126	gpio-controller;
	127	#gpio-cells = <2>;
	128	interrupt-controller;
	129	#interrupt-cells = <2>;
	130	};
	131
	132	gpio2: gpio@2 {
	133	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
e57609aa	134	reg = <2>;
ce4c6f9b SG	135	interrupts = <18>;
	136	gpio-controller;
	137	#gpio-cells = <2>;
	138	interrupt-controller;
	139	#interrupt-cells = <2>;
	140	};
	141
2954ff39 SG	142	duart_pins_a: duart@0 {
2954ff39 SG	143	reg = <0>;
f14da767	144	fsl,pinmux-ids = <
bc3875f1 LW	145	MX23_PAD_PWM0__DUART_RX
bc3875f1 LW	146	MX23_PAD_PWM1__DUART_TX
f14da767	147	>;
4191c340 LW	148	fsl,drive-strength = <MXS_DRIVE_4mA>;
	149	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	150	fsl,pull-up = <MXS_PULL_DISABLE>;
2954ff39	151	};
be1ce308	152
a4508394 SG	153	auart0_pins_a: auart0@0 {
	154	reg = <0>;
	155	fsl,pinmux-ids = <
bc3875f1 LW	156	MX23_PAD_AUART1_RX__AUART1_RX
	157	MX23_PAD_AUART1_TX__AUART1_TX
	158	MX23_PAD_AUART1_CTS__AUART1_CTS
	159	MX23_PAD_AUART1_RTS__AUART1_RTS
a4508394	160	>;
4191c340 LW	161	fsl,drive-strength = <MXS_DRIVE_4mA>;
	162	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	163	fsl,pull-up = <MXS_PULL_DISABLE>;
a4508394 SG	164	};
a4508394 SG	165
98916a2f FE	166	auart0_2pins_a: auart0-2pins@0 {
	167	reg = <0>;
	168	fsl,pinmux-ids = <
bc3875f1 LW	169	MX23_PAD_I2C_SCL__AUART1_TX
bc3875f1 LW	170	MX23_PAD_I2C_SDA__AUART1_RX
98916a2f	171	>;
4191c340 LW	172	fsl,drive-strength = <MXS_DRIVE_4mA>;
	173	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	174	fsl,pull-up = <MXS_PULL_DISABLE>;
98916a2f FE	175	};
98916a2f FE	176
d33c731b MV	177	auart1_2pins_a: auart1-2pins@0 {
	178	reg = <0>;
	179	fsl,pinmux-ids = <
	180	MX23_PAD_GPMI_D14__AUART2_RX
	181	MX23_PAD_GPMI_D15__AUART2_TX
	182	>;
	183	fsl,drive-strength = <MXS_DRIVE_4mA>;
	184	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	185	fsl,pull-up = <MXS_PULL_DISABLE>;
	186	};
	187
b9f25f86 HS	188	gpmi_pins_a: gpmi-nand@0 {
	189	reg = <0>;
	190	fsl,pinmux-ids = <
bc3875f1 LW	191	MX23_PAD_GPMI_D00__GPMI_D00
	192	MX23_PAD_GPMI_D01__GPMI_D01
	193	MX23_PAD_GPMI_D02__GPMI_D02
	194	MX23_PAD_GPMI_D03__GPMI_D03
	195	MX23_PAD_GPMI_D04__GPMI_D04
	196	MX23_PAD_GPMI_D05__GPMI_D05
	197	MX23_PAD_GPMI_D06__GPMI_D06
	198	MX23_PAD_GPMI_D07__GPMI_D07
	199	MX23_PAD_GPMI_CLE__GPMI_CLE
	200	MX23_PAD_GPMI_ALE__GPMI_ALE
	201	MX23_PAD_GPMI_RDY0__GPMI_RDY0
	202	MX23_PAD_GPMI_RDY1__GPMI_RDY1
	203	MX23_PAD_GPMI_WPN__GPMI_WPN
	204	MX23_PAD_GPMI_WRN__GPMI_WRN
	205	MX23_PAD_GPMI_RDN__GPMI_RDN
	206	MX23_PAD_GPMI_CE1N__GPMI_CE1N
	207	MX23_PAD_GPMI_CE0N__GPMI_CE0N
b9f25f86	208	>;
4191c340 LW	209	fsl,drive-strength = <MXS_DRIVE_4mA>;
	210	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	211	fsl,pull-up = <MXS_PULL_DISABLE>;
b9f25f86 HS	212	};
	213
	214	gpmi_pins_fixup: gpmi-pins-fixup {
	215	fsl,pinmux-ids = <
bc3875f1 LW	216	MX23_PAD_GPMI_WPN__GPMI_WPN
	217	MX23_PAD_GPMI_WRN__GPMI_WRN
	218	MX23_PAD_GPMI_RDN__GPMI_RDN
b9f25f86	219	>;
4191c340	220	fsl,drive-strength = <MXS_DRIVE_12mA>;
b9f25f86 HS	221	};
b9f25f86 HS	222
72beabae SG	223	mmc0_4bit_pins_a: mmc0-4bit@0 {
	224	reg = <0>;
	225	fsl,pinmux-ids = <
bc3875f1 LW	226	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	227	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	228	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	229	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	230	MX23_PAD_SSP1_CMD__SSP1_CMD
	231	MX23_PAD_SSP1_SCK__SSP1_SCK
72beabae	232	>;
4191c340 LW	233	fsl,drive-strength = <MXS_DRIVE_8mA>;
	234	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	235	fsl,pull-up = <MXS_PULL_ENABLE>;
72beabae SG	236	};
72beabae SG	237
be1ce308 SG	238	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	239	reg = <0>;
f14da767	240	fsl,pinmux-ids = <
bc3875f1 LW	241	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	242	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	243	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	244	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	245	MX23_PAD_GPMI_D08__SSP1_DATA4
	246	MX23_PAD_GPMI_D09__SSP1_DATA5
	247	MX23_PAD_GPMI_D10__SSP1_DATA6
	248	MX23_PAD_GPMI_D11__SSP1_DATA7
	249	MX23_PAD_SSP1_CMD__SSP1_CMD
	250	MX23_PAD_SSP1_DETECT__SSP1_DETECT
	251	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	252	>;
4191c340 LW	253	fsl,drive-strength = <MXS_DRIVE_8mA>;
	254	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	255	fsl,pull-up = <MXS_PULL_ENABLE>;
be1ce308 SG	256	};
	257
	258	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767	259	fsl,pinmux-ids = <
bc3875f1 LW	260	MX23_PAD_SSP1_DETECT__SSP1_DETECT
bc3875f1 LW	261	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	262	>;
4191c340	263	fsl,pull-up = <MXS_PULL_DISABLE>;
be1ce308	264	};
52f7176b	265
1ebcb168 MV	266	mmc1_4bit_pins_a: mmc1-4bit@0 {
	267	reg = <0>;
	268	fsl,pinmux-ids = <
	269	MX23_PAD_GPMI_D00__SSP2_DATA0
	270	MX23_PAD_GPMI_D01__SSP2_DATA1
	271	MX23_PAD_GPMI_D02__SSP2_DATA2
	272	MX23_PAD_GPMI_D03__SSP2_DATA3
	273	MX23_PAD_GPMI_RDY1__SSP2_CMD
	274	MX23_PAD_GPMI_WRN__SSP2_SCK
	275	>;
	276	fsl,drive-strength = <MXS_DRIVE_8mA>;
	277	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	278	fsl,pull-up = <MXS_PULL_ENABLE>;
	279	};
	280
	281	mmc1_8bit_pins_a: mmc1-8bit@0 {
	282	reg = <0>;
	283	fsl,pinmux-ids = <
	284	MX23_PAD_GPMI_D00__SSP2_DATA0
	285	MX23_PAD_GPMI_D01__SSP2_DATA1
	286	MX23_PAD_GPMI_D02__SSP2_DATA2
	287	MX23_PAD_GPMI_D03__SSP2_DATA3
	288	MX23_PAD_GPMI_D04__SSP2_DATA4
	289	MX23_PAD_GPMI_D05__SSP2_DATA5
	290	MX23_PAD_GPMI_D06__SSP2_DATA6
	291	MX23_PAD_GPMI_D07__SSP2_DATA7
	292	MX23_PAD_GPMI_RDY1__SSP2_CMD
	293	MX23_PAD_GPMI_WRN__SSP2_SCK
	294	>;
	295	fsl,drive-strength = <MXS_DRIVE_8mA>;
	296	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	297	fsl,pull-up = <MXS_PULL_ENABLE>;
	298	};
	299
52f7176b SG	300	pwm2_pins_a: pwm2@0 {
	301	reg = <0>;
	302	fsl,pinmux-ids = <
bc3875f1	303	MX23_PAD_PWM2__PWM2
52f7176b	304	>;
4191c340 LW	305	fsl,drive-strength = <MXS_DRIVE_4mA>;
	306	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	307	fsl,pull-up = <MXS_PULL_DISABLE>;
52f7176b	308	};
a915ee42 SG	309
	310	lcdif_24bit_pins_a: lcdif-24bit@0 {
	311	reg = <0>;
	312	fsl,pinmux-ids = <
bc3875f1 LW	313	MX23_PAD_LCD_D00__LCD_D00
	314	MX23_PAD_LCD_D01__LCD_D01
	315	MX23_PAD_LCD_D02__LCD_D02
	316	MX23_PAD_LCD_D03__LCD_D03
	317	MX23_PAD_LCD_D04__LCD_D04
	318	MX23_PAD_LCD_D05__LCD_D05
	319	MX23_PAD_LCD_D06__LCD_D06
	320	MX23_PAD_LCD_D07__LCD_D07
	321	MX23_PAD_LCD_D08__LCD_D08
	322	MX23_PAD_LCD_D09__LCD_D09
	323	MX23_PAD_LCD_D10__LCD_D10
	324	MX23_PAD_LCD_D11__LCD_D11
	325	MX23_PAD_LCD_D12__LCD_D12
	326	MX23_PAD_LCD_D13__LCD_D13
	327	MX23_PAD_LCD_D14__LCD_D14
	328	MX23_PAD_LCD_D15__LCD_D15
	329	MX23_PAD_LCD_D16__LCD_D16
	330	MX23_PAD_LCD_D17__LCD_D17
	331	MX23_PAD_GPMI_D08__LCD_D18
	332	MX23_PAD_GPMI_D09__LCD_D19
	333	MX23_PAD_GPMI_D10__LCD_D20
	334	MX23_PAD_GPMI_D11__LCD_D21
	335	MX23_PAD_GPMI_D12__LCD_D22
	336	MX23_PAD_GPMI_D13__LCD_D23
	337	MX23_PAD_LCD_DOTCK__LCD_DOTCK
	338	MX23_PAD_LCD_ENABLE__LCD_ENABLE
	339	MX23_PAD_LCD_HSYNC__LCD_HSYNC
	340	MX23_PAD_LCD_VSYNC__LCD_VSYNC
a915ee42	341	>;
4191c340 LW	342	fsl,drive-strength = <MXS_DRIVE_4mA>;
	343	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	344	fsl,pull-up = <MXS_PULL_DISABLE>;
a915ee42	345	};
a0487864 FB	346
	347	spi2_pins_a: spi2@0 {
	348	reg = <0>;
	349	fsl,pinmux-ids = <
bc3875f1 LW	350	MX23_PAD_GPMI_WRN__SSP2_SCK
	351	MX23_PAD_GPMI_RDY1__SSP2_CMD
	352	MX23_PAD_GPMI_D00__SSP2_DATA0
	353	MX23_PAD_GPMI_D03__SSP2_DATA3
a0487864	354	>;
4191c340 LW	355	fsl,drive-strength = <MXS_DRIVE_8mA>;
	356	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	357	fsl,pull-up = <MXS_PULL_ENABLE>;
a0487864	358	};
71a34d82 HG	359
	360	i2c_pins_a: i2c@0 {
	361	reg = <0>;
	362	fsl,pinmux-ids = <
	363	MX23_PAD_I2C_SCL__I2C_SCL
	364	MX23_PAD_I2C_SDA__I2C_SDA
	365	>;
	366	fsl,drive-strength = <MXS_DRIVE_8mA>;
	367	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	368	fsl,pull-up = <MXS_PULL_ENABLE>;
	369	};
	370
	371	i2c_pins_b: i2c@1 {
	372	reg = <1>;
	373	fsl,pinmux-ids = <
	374	MX23_PAD_LCD_ENABLE__I2C_SCL
	375	MX23_PAD_LCD_HSYNC__I2C_SDA
	376	>;
	377	fsl,drive-strength = <MXS_DRIVE_8mA>;
	378	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	379	fsl,pull-up = <MXS_PULL_ENABLE>;
	380	};
	381
	382	i2c_pins_c: i2c@2 {
	383	reg = <2>;
	384	fsl,pinmux-ids = <
	385	MX23_PAD_SSP1_DATA1__I2C_SCL
	386	MX23_PAD_SSP1_DATA2__I2C_SDA
	387	>;
	388	fsl,drive-strength = <MXS_DRIVE_8mA>;
	389	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	390	fsl,pull-up = <MXS_PULL_ENABLE>;
	391	};
2954ff39 SG	392	};
	393
	394	digctl@8001c000 {
38d6590f	395	compatible = "fsl,imx23-digctl";
2954ff39 SG	396	reg = <0x8001c000 2000>;
	397	status = "disabled";
	398	};
	399
	400	emi@80020000 {
640bf060	401	reg = <0x80020000 0x2000>;
2954ff39 SG	402	status = "disabled";
	403	};
	404
f30fb03d	405	dma_apbx: dma-apbx@80024000 {
84f3570a	406	compatible = "fsl,imx23-dma-apbx";
640bf060	407	reg = <0x80024000 0x2000>;
f30fb03d SG	408	interrupts = <7 5 9 26
	409	19 0 25 23
	410	60 58 9 0
	411	0 0 0 0>;
	412	interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
	413	"saif0", "empty", "auart0-rx", "auart0-tx",
	414	"auart1-rx", "auart1-tx", "saif1", "empty",
	415	"empty", "empty", "empty", "empty";
	416	#dma-cells = <1>;
	417	dma-channels = <16>;
53f9443d	418	clocks = <&clks 16>;
2954ff39 SG	419	};
	420
	421	dcp@80028000 {
7d56a28f	422	compatible = "fsl,imx23-dcp";
640bf060	423	reg = <0x80028000 0x2000>;
7d56a28f MV	424	interrupts = <53 54>;
7d56a28f MV	425	status = "okay";
2954ff39 SG	426	};
	427
	428	pxp@8002a000 {
640bf060	429	reg = <0x8002a000 0x2000>;
2954ff39 SG	430	status = "disabled";
	431	};
	432
	433	ocotp@8002c000 {
a7be1e68 SW	434	compatible = "fsl,imx23-ocotp", "fsl,ocotp";
	435	#address-cells = <1>;
	436	#size-cells = <1>;
640bf060	437	reg = <0x8002c000 0x2000>;
a7be1e68	438	clocks = <&clks 15>;
2954ff39 SG	439	};
	440
	441	axi-ahb@8002e000 {
640bf060	442	reg = <0x8002e000 0x2000>;
2954ff39 SG	443	status = "disabled";
	444	};
	445
	446	lcdif@80030000 {
a915ee42	447	compatible = "fsl,imx23-lcdif";
2954ff39	448	reg = <0x80030000 2000>;
a915ee42	449	interrupts = <46 45>;
53f9443d	450	clocks = <&clks 38>;
2954ff39 SG	451	status = "disabled";
	452	};
	453
	454	ssp1: ssp@80034000 {
640bf060	455	reg = <0x80034000 0x2000>;
7f2b9288	456	interrupts = <2>;
53f9443d	457	clocks = <&clks 33>;
f30fb03d SG	458	dmas = <&dma_apbh 2>;
f30fb03d SG	459	dma-names = "rx-tx";
2954ff39 SG	460	status = "disabled";
	461	};
	462
	463	tvenc@80038000 {
640bf060	464	reg = <0x80038000 0x2000>;
2954ff39 SG	465	status = "disabled";
	466	};
	467	};
	468
	469	apbx@80040000 {
	470	compatible = "simple-bus";
	471	#address-cells = <1>;
	472	#size-cells = <1>;
	473	reg = <0x80040000 0x40000>;
	474	ranges;
	475
53f9443d	476	clks: clkctrl@80040000 {
8f7cf881	477	compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
640bf060	478	reg = <0x80040000 0x2000>;
53f9443d	479	#clock-cells = <1>;
2954ff39 SG	480	};
	481
	482	saif0: saif@80042000 {
640bf060	483	reg = <0x80042000 0x2000>;
f30fb03d SG	484	dmas = <&dma_apbx 4>;
f30fb03d SG	485	dma-names = "rx-tx";
2954ff39 SG	486	status = "disabled";
	487	};
	488
	489	power@80044000 {
640bf060	490	reg = <0x80044000 0x2000>;
2954ff39 SG	491	status = "disabled";
	492	};
	493
	494	saif1: saif@80046000 {
640bf060	495	reg = <0x80046000 0x2000>;
f30fb03d SG	496	dmas = <&dma_apbx 10>;
f30fb03d SG	497	dma-names = "rx-tx";
2954ff39 SG	498	status = "disabled";
	499	};
	500
	501	audio-out@80048000 {
640bf060	502	reg = <0x80048000 0x2000>;
f30fb03d SG	503	dmas = <&dma_apbx 1>;
f30fb03d SG	504	dma-names = "tx";
2954ff39 SG	505	status = "disabled";
	506	};
	507
	508	audio-in@8004c000 {
640bf060	509	reg = <0x8004c000 0x2000>;
f30fb03d SG	510	dmas = <&dma_apbx 0>;
f30fb03d SG	511	dma-names = "rx";
2954ff39 SG	512	status = "disabled";
	513	};
	514
bd798f9c	515	lradc: lradc@80050000 {
1f45188c	516	compatible = "fsl,imx23-lradc";
640bf060	517	reg = <0x80050000 0x2000>;
1f45188c	518	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39	519	status = "disabled";
18da755d	520	clocks = <&clks 26>;
e8e94ed6	521	#io-channel-cells = <1>;
2954ff39 SG	522	};
	523
	524	spdif@80054000 {
	525	reg = <0x80054000 2000>;
f30fb03d SG	526	dmas = <&dma_apbx 2>;
f30fb03d SG	527	dma-names = "tx";
2954ff39 SG	528	status = "disabled";
	529	};
	530
71a34d82 HG	531	i2c: i2c@80058000 {
	532	#address-cells = <1>;
	533	#size-cells = <0>;
	534	compatible = "fsl,imx23-i2c";
640bf060	535	reg = <0x80058000 0x2000>;
71a34d82 HG	536	interrupts = <27>;
71a34d82 HG	537	clock-frequency = <100000>;
f30fb03d SG	538	dmas = <&dma_apbx 3>;
f30fb03d SG	539	dma-names = "rx-tx";
2954ff39 SG	540	status = "disabled";
	541	};
	542
	543	rtc@8005c000 {
f98c990c	544	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	545	reg = <0x8005c000 0x2000>;
f98c990c	546	interrupts = <22>;
2954ff39 SG	547	};
2954ff39 SG	548
52f7176b SG	549	pwm: pwm@80064000 {
52f7176b SG	550	compatible = "fsl,imx23-pwm";
640bf060	551	reg = <0x80064000 0x2000>;
53f9443d	552	clocks = <&clks 30>;
52f7176b SG	553	#pwm-cells = <2>;
52f7176b SG	554	fsl,pwm-number = <5>;
2954ff39 SG	555	status = "disabled";
	556	};
	557
	558	timrot@80068000 {
eeca6e60	559	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	560	reg = <0x80068000 0x2000>;
eeca6e60	561	interrupts = <28 29 30 31>;
2efb9504	562	clocks = <&clks 28>;
2954ff39 SG	563	};
	564
	565	auart0: serial@8006c000 {
a4508394	566	compatible = "fsl,imx23-auart";
2954ff39	567	reg = <0x8006c000 0x2000>;
7f2b9288	568	interrupts = <24>;
53f9443d	569	clocks = <&clks 32>;
f30fb03d SG	570	dmas = <&dma_apbx 6>, <&dma_apbx 7>;
f30fb03d SG	571	dma-names = "rx", "tx";
2954ff39 SG	572	status = "disabled";
	573	};
	574
	575	auart1: serial@8006e000 {
a4508394	576	compatible = "fsl,imx23-auart";
2954ff39	577	reg = <0x8006e000 0x2000>;
7f2b9288	578	interrupts = <59>;
53f9443d	579	clocks = <&clks 32>;
f30fb03d SG	580	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
f30fb03d SG	581	dma-names = "rx", "tx";
2954ff39 SG	582	status = "disabled";
	583	};
	584
	585	duart: serial@80070000 {
	586	compatible = "arm,pl011", "arm,primecell";
	587	reg = <0x80070000 0x2000>;
	588	interrupts = <0>;
53f9443d SG	589	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	590	clock-names = "uart", "apb_pclk";
2954ff39 SG	591	status = "disabled";
	592	};
	593
d6475317 FE	594	usbphy0: usbphy@8007c000 {
d6475317 FE	595	compatible = "fsl,imx23-usbphy";
2954ff39	596	reg = <0x8007c000 0x2000>;
d6475317	597	clocks = <&clks 41>;
2954ff39 SG	598	status = "disabled";
	599	};
	600	};
	601	};
	602
	603	ahb@80080000 {
	604	compatible = "simple-bus";
	605	#address-cells = <1>;
	606	#size-cells = <1>;
	607	reg = <0x80080000 0x80000>;
	608	ranges;
	609
d6475317 FE	610	usb0: usb@80080000 {
d6475317 FE	611	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	612	reg = <0x80080000 0x40000>;
d6475317 FE	613	interrupts = <11>;
	614	fsl,usbphy = <&usbphy0>;
	615	clocks = <&clks 40>;
2954ff39 SG	616	status = "disabled";
	617	};
	618	};
bd798f9c	619
0b452ccc	620	iio-hwmon {
bd798f9c AB	621	compatible = "iio-hwmon";
	622	io-channels = <&lradc 8>;
	623	};
2954ff39	624	};