[deliverable/linux.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx23-pinfunc.h"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
		spi0 = &ssp0;
		spi1 = &ssp1;
		usbphy0 = &usbphy0;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <0 14 20 0
					      13 13 13 13>;
				interrupt-names = "empty", "ssp0", "ssp1", "empty",
						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
				#dma-cells = <1>;
				dma-channels = <8>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <56>;
				interrupt-names = "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM0__DUART_RX
						MX23_PAD_PWM1__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_AUART1_RX__AUART1_RX
						MX23_PAD_AUART1_TX__AUART1_TX
						MX23_PAD_AUART1_CTS__AUART1_CTS
						MX23_PAD_AUART1_RTS__AUART1_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__AUART1_TX
						MX23_PAD_I2C_SDA__AUART1_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart1_2pins_a: auart1-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D14__AUART2_RX
						MX23_PAD_GPMI_D15__AUART2_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__GPMI_D00
						MX23_PAD_GPMI_D01__GPMI_D01
						MX23_PAD_GPMI_D02__GPMI_D02
						MX23_PAD_GPMI_D03__GPMI_D03
						MX23_PAD_GPMI_D04__GPMI_D04
						MX23_PAD_GPMI_D05__GPMI_D05
						MX23_PAD_GPMI_D06__GPMI_D06
						MX23_PAD_GPMI_D07__GPMI_D07
						MX23_PAD_GPMI_CLE__GPMI_CLE
						MX23_PAD_GPMI_ALE__GPMI_ALE
						MX23_PAD_GPMI_RDY0__GPMI_RDY0
						MX23_PAD_GPMI_RDY1__GPMI_RDY1
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
						MX23_PAD_GPMI_CE1N__GPMI_CE1N
						MX23_PAD_GPMI_CE0N__GPMI_CE0N
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_GPMI_D08__SSP1_DATA4
						MX23_PAD_GPMI_D09__SSP1_DATA5
						MX23_PAD_GPMI_D10__SSP1_DATA6
						MX23_PAD_GPMI_D11__SSP1_DATA7
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				mmc1_4bit_pins_a: mmc1-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D01__SSP2_DATA1
						MX23_PAD_GPMI_D02__SSP2_DATA2
						MX23_PAD_GPMI_D03__SSP2_DATA3
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_WRN__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc1_8bit_pins_a: mmc1-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D01__SSP2_DATA1
						MX23_PAD_GPMI_D02__SSP2_DATA2
						MX23_PAD_GPMI_D03__SSP2_DATA3
						MX23_PAD_GPMI_D04__SSP2_DATA4
						MX23_PAD_GPMI_D05__SSP2_DATA5
						MX23_PAD_GPMI_D06__SSP2_DATA6
						MX23_PAD_GPMI_D07__SSP2_DATA7
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_WRN__SSP2_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM2__PWM2
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_D00__LCD_D00
						MX23_PAD_LCD_D01__LCD_D01
						MX23_PAD_LCD_D02__LCD_D02
						MX23_PAD_LCD_D03__LCD_D03
						MX23_PAD_LCD_D04__LCD_D04
						MX23_PAD_LCD_D05__LCD_D05
						MX23_PAD_LCD_D06__LCD_D06
						MX23_PAD_LCD_D07__LCD_D07
						MX23_PAD_LCD_D08__LCD_D08
						MX23_PAD_LCD_D09__LCD_D09
						MX23_PAD_LCD_D10__LCD_D10
						MX23_PAD_LCD_D11__LCD_D11
						MX23_PAD_LCD_D12__LCD_D12
						MX23_PAD_LCD_D13__LCD_D13
						MX23_PAD_LCD_D14__LCD_D14
						MX23_PAD_LCD_D15__LCD_D15
						MX23_PAD_LCD_D16__LCD_D16
						MX23_PAD_LCD_D17__LCD_D17
						MX23_PAD_GPMI_D08__LCD_D18
						MX23_PAD_GPMI_D09__LCD_D19
						MX23_PAD_GPMI_D10__LCD_D20
						MX23_PAD_GPMI_D11__LCD_D21
						MX23_PAD_GPMI_D12__LCD_D22
						MX23_PAD_GPMI_D13__LCD_D23
						MX23_PAD_LCD_DOTCK__LCD_DOTCK
						MX23_PAD_LCD_ENABLE__LCD_ENABLE
						MX23_PAD_LCD_HSYNC__LCD_HSYNC
						MX23_PAD_LCD_VSYNC__LCD_VSYNC
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WRN__SSP2_SCK
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D03__SSP2_DATA3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_a: i2c@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__I2C_SCL
						MX23_PAD_I2C_SDA__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_b: i2c@1 {
					reg = <1>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_ENABLE__I2C_SCL
						MX23_PAD_LCD_HSYNC__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				i2c_pins_c: i2c@2 {
					reg = <2>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA1__I2C_SCL
						MX23_PAD_SSP1_DATA2__I2C_SDA
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <7 5 9 26
					      19 0 25 23
					      60 58 9 0
					      0 0 0 0>;
				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
						  "saif0", "empty", "auart0-rx", "auart0-tx",
						  "auart1-rx", "auart1-tx", "saif1", "empty",
						  "empty", "empty", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				compatible = "fsl,imx23-dcp";
				reg = <0x80028000 0x2000>;
				interrupts = <53 54>;
				status = "okay";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				compatible = "fsl,imx23-ocotp", "fsl,ocotp";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8002c000 0x2000>;
				clocks = <&clks 15>;
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				dmas = <&dma_apbx 10>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				dmas = <&dma_apbx 1>;
				dma-names = "tx";
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				dmas = <&dma_apbx 0>;
				dma-names = "rx";
				status = "disabled";
			};

			lradc: lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
				clocks = <&clks 26>;
				#io-channel-cells = <1>;
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			i2c: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-i2c";
				reg = <0x80058000 0x2000>;
				interrupts = <27>;
				clock-frequency = <100000>;
				dmas = <&dma_apbx 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&lradc 8>;
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
bc3875f1 LW	12	#include "skeleton.dtsi"
bc3875f1 LW	13	#include "imx23-pinfunc.h"
2954ff39 SG	14
	15	/ {
	16	interrupt-parent = <&icoll>;
	17
ce4c6f9b SG	18	aliases {
	19	gpio0 = &gpio0;
	20	gpio1 = &gpio1;
	21	gpio2 = &gpio2;
a4508394 SG	22	serial0 = &auart0;
a4508394 SG	23	serial1 = &auart1;
6bf6eb09 FE	24	spi0 = &ssp0;
6bf6eb09 FE	25	spi1 = &ssp1;
1f35cc6a	26	usbphy0 = &usbphy0;
ce4c6f9b SG	27	};
ce4c6f9b SG	28
2954ff39	29	cpus {
7925e89f LP	30	#address-cells = <0>;
	31	#size-cells = <0>;
	32
	33	cpu {
	34	compatible = "arm,arm926ej-s";
	35	device_type = "cpu";
2954ff39 SG	36	};
	37	};
	38
	39	apb@80000000 {
	40	compatible = "simple-bus";
	41	#address-cells = <1>;
	42	#size-cells = <1>;
	43	reg = <0x80000000 0x80000>;
	44	ranges;
	45
	46	apbh@80000000 {
	47	compatible = "simple-bus";
	48	#address-cells = <1>;
	49	#size-cells = <1>;
	50	reg = <0x80000000 0x40000>;
	51	ranges;
	52
	53	icoll: interrupt-controller@80000000 {
83a84efc	54	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	55	interrupt-controller;
	56	#interrupt-cells = <1>;
	57	reg = <0x80000000 0x2000>;
	58	};
	59
f30fb03d	60	dma_apbh: dma-apbh@80004000 {
84f3570a	61	compatible = "fsl,imx23-dma-apbh";
640bf060	62	reg = <0x80004000 0x2000>;
f30fb03d SG	63	interrupts = <0 14 20 0
	64	13 13 13 13>;
	65	interrupt-names = "empty", "ssp0", "ssp1", "empty",
	66	"gpmi0", "gpmi1", "gpmi2", "gpmi3";
	67	#dma-cells = <1>;
	68	dma-channels = <8>;
53f9443d	69	clocks = <&clks 15>;
2954ff39 SG	70	};
	71
	72	ecc@80008000 {
640bf060	73	reg = <0x80008000 0x2000>;
2954ff39 SG	74	status = "disabled";
	75	};
	76
a217c46c	77	gpmi-nand@8000c000 {
b9f25f86 HS	78	compatible = "fsl,imx23-gpmi-nand";
	79	#address-cells = <1>;
	80	#size-cells = <1>;
640bf060	81	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86	82	reg-names = "gpmi-nand", "bch";
7f2b9288 SG	83	interrupts = <56>;
7f2b9288 SG	84	interrupt-names = "bch";
53f9443d	85	clocks = <&clks 34>;
b6442559	86	clock-names = "gpmi_io";
f30fb03d SG	87	dmas = <&dma_apbh 4>;
f30fb03d SG	88	dma-names = "rx-tx";
2954ff39 SG	89	status = "disabled";
	90	};
	91
	92	ssp0: ssp@80010000 {
640bf060	93	reg = <0x80010000 0x2000>;
7f2b9288	94	interrupts = <15>;
53f9443d	95	clocks = <&clks 33>;
f30fb03d SG	96	dmas = <&dma_apbh 1>;
f30fb03d SG	97	dma-names = "rx-tx";
2954ff39 SG	98	status = "disabled";
	99	};
	100
	101	etm@80014000 {
640bf060	102	reg = <0x80014000 0x2000>;
2954ff39 SG	103	status = "disabled";
	104	};
	105
	106	pinctrl@80018000 {
	107	#address-cells = <1>;
	108	#size-cells = <0>;
ce4c6f9b	109	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	110	reg = <0x80018000 0x2000>;
2954ff39	111
ce4c6f9b SG	112	gpio0: gpio@0 {
	113	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	114	interrupts = <16>;
	115	gpio-controller;
	116	#gpio-cells = <2>;
	117	interrupt-controller;
	118	#interrupt-cells = <2>;
	119	};
	120
	121	gpio1: gpio@1 {
	122	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	123	interrupts = <17>;
	124	gpio-controller;
	125	#gpio-cells = <2>;
	126	interrupt-controller;
	127	#interrupt-cells = <2>;
	128	};
	129
	130	gpio2: gpio@2 {
	131	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	132	interrupts = <18>;
	133	gpio-controller;
	134	#gpio-cells = <2>;
	135	interrupt-controller;
	136	#interrupt-cells = <2>;
	137	};
	138
2954ff39 SG	139	duart_pins_a: duart@0 {
2954ff39 SG	140	reg = <0>;
f14da767	141	fsl,pinmux-ids = <
bc3875f1 LW	142	MX23_PAD_PWM0__DUART_RX
bc3875f1 LW	143	MX23_PAD_PWM1__DUART_TX
f14da767	144	>;
4191c340 LW	145	fsl,drive-strength = <MXS_DRIVE_4mA>;
	146	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	147	fsl,pull-up = <MXS_PULL_DISABLE>;
2954ff39	148	};
be1ce308	149
a4508394 SG	150	auart0_pins_a: auart0@0 {
	151	reg = <0>;
	152	fsl,pinmux-ids = <
bc3875f1 LW	153	MX23_PAD_AUART1_RX__AUART1_RX
	154	MX23_PAD_AUART1_TX__AUART1_TX
	155	MX23_PAD_AUART1_CTS__AUART1_CTS
	156	MX23_PAD_AUART1_RTS__AUART1_RTS
a4508394	157	>;
4191c340 LW	158	fsl,drive-strength = <MXS_DRIVE_4mA>;
	159	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	160	fsl,pull-up = <MXS_PULL_DISABLE>;
a4508394 SG	161	};
a4508394 SG	162
98916a2f FE	163	auart0_2pins_a: auart0-2pins@0 {
	164	reg = <0>;
	165	fsl,pinmux-ids = <
bc3875f1 LW	166	MX23_PAD_I2C_SCL__AUART1_TX
bc3875f1 LW	167	MX23_PAD_I2C_SDA__AUART1_RX
98916a2f	168	>;
4191c340 LW	169	fsl,drive-strength = <MXS_DRIVE_4mA>;
	170	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	171	fsl,pull-up = <MXS_PULL_DISABLE>;
98916a2f FE	172	};
98916a2f FE	173
d33c731b MV	174	auart1_2pins_a: auart1-2pins@0 {
	175	reg = <0>;
	176	fsl,pinmux-ids = <
	177	MX23_PAD_GPMI_D14__AUART2_RX
	178	MX23_PAD_GPMI_D15__AUART2_TX
	179	>;
	180	fsl,drive-strength = <MXS_DRIVE_4mA>;
	181	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	182	fsl,pull-up = <MXS_PULL_DISABLE>;
	183	};
	184
b9f25f86 HS	185	gpmi_pins_a: gpmi-nand@0 {
	186	reg = <0>;
	187	fsl,pinmux-ids = <
bc3875f1 LW	188	MX23_PAD_GPMI_D00__GPMI_D00
	189	MX23_PAD_GPMI_D01__GPMI_D01
	190	MX23_PAD_GPMI_D02__GPMI_D02
	191	MX23_PAD_GPMI_D03__GPMI_D03
	192	MX23_PAD_GPMI_D04__GPMI_D04
	193	MX23_PAD_GPMI_D05__GPMI_D05
	194	MX23_PAD_GPMI_D06__GPMI_D06
	195	MX23_PAD_GPMI_D07__GPMI_D07
	196	MX23_PAD_GPMI_CLE__GPMI_CLE
	197	MX23_PAD_GPMI_ALE__GPMI_ALE
	198	MX23_PAD_GPMI_RDY0__GPMI_RDY0
	199	MX23_PAD_GPMI_RDY1__GPMI_RDY1
	200	MX23_PAD_GPMI_WPN__GPMI_WPN
	201	MX23_PAD_GPMI_WRN__GPMI_WRN
	202	MX23_PAD_GPMI_RDN__GPMI_RDN
	203	MX23_PAD_GPMI_CE1N__GPMI_CE1N
	204	MX23_PAD_GPMI_CE0N__GPMI_CE0N
b9f25f86	205	>;
4191c340 LW	206	fsl,drive-strength = <MXS_DRIVE_4mA>;
	207	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	208	fsl,pull-up = <MXS_PULL_DISABLE>;
b9f25f86 HS	209	};
	210
	211	gpmi_pins_fixup: gpmi-pins-fixup {
	212	fsl,pinmux-ids = <
bc3875f1 LW	213	MX23_PAD_GPMI_WPN__GPMI_WPN
	214	MX23_PAD_GPMI_WRN__GPMI_WRN
	215	MX23_PAD_GPMI_RDN__GPMI_RDN
b9f25f86	216	>;
4191c340	217	fsl,drive-strength = <MXS_DRIVE_12mA>;
b9f25f86 HS	218	};
b9f25f86 HS	219
72beabae SG	220	mmc0_4bit_pins_a: mmc0-4bit@0 {
	221	reg = <0>;
	222	fsl,pinmux-ids = <
bc3875f1 LW	223	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	224	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	225	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	226	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	227	MX23_PAD_SSP1_CMD__SSP1_CMD
	228	MX23_PAD_SSP1_SCK__SSP1_SCK
72beabae	229	>;
4191c340 LW	230	fsl,drive-strength = <MXS_DRIVE_8mA>;
	231	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	232	fsl,pull-up = <MXS_PULL_ENABLE>;
72beabae SG	233	};
72beabae SG	234
be1ce308 SG	235	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	236	reg = <0>;
f14da767	237	fsl,pinmux-ids = <
bc3875f1 LW	238	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	239	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	240	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	241	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	242	MX23_PAD_GPMI_D08__SSP1_DATA4
	243	MX23_PAD_GPMI_D09__SSP1_DATA5
	244	MX23_PAD_GPMI_D10__SSP1_DATA6
	245	MX23_PAD_GPMI_D11__SSP1_DATA7
	246	MX23_PAD_SSP1_CMD__SSP1_CMD
	247	MX23_PAD_SSP1_DETECT__SSP1_DETECT
	248	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	249	>;
4191c340 LW	250	fsl,drive-strength = <MXS_DRIVE_8mA>;
	251	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	252	fsl,pull-up = <MXS_PULL_ENABLE>;
be1ce308 SG	253	};
	254
	255	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767	256	fsl,pinmux-ids = <
bc3875f1 LW	257	MX23_PAD_SSP1_DETECT__SSP1_DETECT
bc3875f1 LW	258	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	259	>;
4191c340	260	fsl,pull-up = <MXS_PULL_DISABLE>;
be1ce308	261	};
52f7176b	262
1ebcb168 MV	263	mmc1_4bit_pins_a: mmc1-4bit@0 {
	264	reg = <0>;
	265	fsl,pinmux-ids = <
	266	MX23_PAD_GPMI_D00__SSP2_DATA0
	267	MX23_PAD_GPMI_D01__SSP2_DATA1
	268	MX23_PAD_GPMI_D02__SSP2_DATA2
	269	MX23_PAD_GPMI_D03__SSP2_DATA3
	270	MX23_PAD_GPMI_RDY1__SSP2_CMD
	271	MX23_PAD_GPMI_WRN__SSP2_SCK
	272	>;
	273	fsl,drive-strength = <MXS_DRIVE_8mA>;
	274	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	275	fsl,pull-up = <MXS_PULL_ENABLE>;
	276	};
	277
	278	mmc1_8bit_pins_a: mmc1-8bit@0 {
	279	reg = <0>;
	280	fsl,pinmux-ids = <
	281	MX23_PAD_GPMI_D00__SSP2_DATA0
	282	MX23_PAD_GPMI_D01__SSP2_DATA1
	283	MX23_PAD_GPMI_D02__SSP2_DATA2
	284	MX23_PAD_GPMI_D03__SSP2_DATA3
	285	MX23_PAD_GPMI_D04__SSP2_DATA4
	286	MX23_PAD_GPMI_D05__SSP2_DATA5
	287	MX23_PAD_GPMI_D06__SSP2_DATA6
	288	MX23_PAD_GPMI_D07__SSP2_DATA7
	289	MX23_PAD_GPMI_RDY1__SSP2_CMD
	290	MX23_PAD_GPMI_WRN__SSP2_SCK
	291	>;
	292	fsl,drive-strength = <MXS_DRIVE_8mA>;
	293	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	294	fsl,pull-up = <MXS_PULL_ENABLE>;
	295	};
	296
52f7176b SG	297	pwm2_pins_a: pwm2@0 {
	298	reg = <0>;
	299	fsl,pinmux-ids = <
bc3875f1	300	MX23_PAD_PWM2__PWM2
52f7176b	301	>;
4191c340 LW	302	fsl,drive-strength = <MXS_DRIVE_4mA>;
	303	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	304	fsl,pull-up = <MXS_PULL_DISABLE>;
52f7176b	305	};
a915ee42 SG	306
	307	lcdif_24bit_pins_a: lcdif-24bit@0 {
	308	reg = <0>;
	309	fsl,pinmux-ids = <
bc3875f1 LW	310	MX23_PAD_LCD_D00__LCD_D00
	311	MX23_PAD_LCD_D01__LCD_D01
	312	MX23_PAD_LCD_D02__LCD_D02
	313	MX23_PAD_LCD_D03__LCD_D03
	314	MX23_PAD_LCD_D04__LCD_D04
	315	MX23_PAD_LCD_D05__LCD_D05
	316	MX23_PAD_LCD_D06__LCD_D06
	317	MX23_PAD_LCD_D07__LCD_D07
	318	MX23_PAD_LCD_D08__LCD_D08
	319	MX23_PAD_LCD_D09__LCD_D09
	320	MX23_PAD_LCD_D10__LCD_D10
	321	MX23_PAD_LCD_D11__LCD_D11
	322	MX23_PAD_LCD_D12__LCD_D12
	323	MX23_PAD_LCD_D13__LCD_D13
	324	MX23_PAD_LCD_D14__LCD_D14
	325	MX23_PAD_LCD_D15__LCD_D15
	326	MX23_PAD_LCD_D16__LCD_D16
	327	MX23_PAD_LCD_D17__LCD_D17
	328	MX23_PAD_GPMI_D08__LCD_D18
	329	MX23_PAD_GPMI_D09__LCD_D19
	330	MX23_PAD_GPMI_D10__LCD_D20
	331	MX23_PAD_GPMI_D11__LCD_D21
	332	MX23_PAD_GPMI_D12__LCD_D22
	333	MX23_PAD_GPMI_D13__LCD_D23
	334	MX23_PAD_LCD_DOTCK__LCD_DOTCK
	335	MX23_PAD_LCD_ENABLE__LCD_ENABLE
	336	MX23_PAD_LCD_HSYNC__LCD_HSYNC
	337	MX23_PAD_LCD_VSYNC__LCD_VSYNC
a915ee42	338	>;
4191c340 LW	339	fsl,drive-strength = <MXS_DRIVE_4mA>;
	340	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	341	fsl,pull-up = <MXS_PULL_DISABLE>;
a915ee42	342	};
a0487864 FB	343
	344	spi2_pins_a: spi2@0 {
	345	reg = <0>;
	346	fsl,pinmux-ids = <
bc3875f1 LW	347	MX23_PAD_GPMI_WRN__SSP2_SCK
	348	MX23_PAD_GPMI_RDY1__SSP2_CMD
	349	MX23_PAD_GPMI_D00__SSP2_DATA0
	350	MX23_PAD_GPMI_D03__SSP2_DATA3
a0487864	351	>;
4191c340 LW	352	fsl,drive-strength = <MXS_DRIVE_8mA>;
	353	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	354	fsl,pull-up = <MXS_PULL_ENABLE>;
a0487864	355	};
71a34d82 HG	356
	357	i2c_pins_a: i2c@0 {
	358	reg = <0>;
	359	fsl,pinmux-ids = <
	360	MX23_PAD_I2C_SCL__I2C_SCL
	361	MX23_PAD_I2C_SDA__I2C_SDA
	362	>;
	363	fsl,drive-strength = <MXS_DRIVE_8mA>;
	364	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	365	fsl,pull-up = <MXS_PULL_ENABLE>;
	366	};
	367
	368	i2c_pins_b: i2c@1 {
	369	reg = <1>;
	370	fsl,pinmux-ids = <
	371	MX23_PAD_LCD_ENABLE__I2C_SCL
	372	MX23_PAD_LCD_HSYNC__I2C_SDA
	373	>;
	374	fsl,drive-strength = <MXS_DRIVE_8mA>;
	375	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	376	fsl,pull-up = <MXS_PULL_ENABLE>;
	377	};
	378
	379	i2c_pins_c: i2c@2 {
	380	reg = <2>;
	381	fsl,pinmux-ids = <
	382	MX23_PAD_SSP1_DATA1__I2C_SCL
	383	MX23_PAD_SSP1_DATA2__I2C_SDA
	384	>;
	385	fsl,drive-strength = <MXS_DRIVE_8mA>;
	386	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	387	fsl,pull-up = <MXS_PULL_ENABLE>;
	388	};
2954ff39 SG	389	};
	390
	391	digctl@8001c000 {
38d6590f	392	compatible = "fsl,imx23-digctl";
2954ff39 SG	393	reg = <0x8001c000 2000>;
	394	status = "disabled";
	395	};
	396
	397	emi@80020000 {
640bf060	398	reg = <0x80020000 0x2000>;
2954ff39 SG	399	status = "disabled";
	400	};
	401
f30fb03d	402	dma_apbx: dma-apbx@80024000 {
84f3570a	403	compatible = "fsl,imx23-dma-apbx";
640bf060	404	reg = <0x80024000 0x2000>;
f30fb03d SG	405	interrupts = <7 5 9 26
	406	19 0 25 23
	407	60 58 9 0
	408	0 0 0 0>;
	409	interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
	410	"saif0", "empty", "auart0-rx", "auart0-tx",
	411	"auart1-rx", "auart1-tx", "saif1", "empty",
	412	"empty", "empty", "empty", "empty";
	413	#dma-cells = <1>;
	414	dma-channels = <16>;
53f9443d	415	clocks = <&clks 16>;
2954ff39 SG	416	};
	417
	418	dcp@80028000 {
7d56a28f	419	compatible = "fsl,imx23-dcp";
640bf060	420	reg = <0x80028000 0x2000>;
7d56a28f MV	421	interrupts = <53 54>;
7d56a28f MV	422	status = "okay";
2954ff39 SG	423	};
	424
	425	pxp@8002a000 {
640bf060	426	reg = <0x8002a000 0x2000>;
2954ff39 SG	427	status = "disabled";
	428	};
	429
	430	ocotp@8002c000 {
a7be1e68 SW	431	compatible = "fsl,imx23-ocotp", "fsl,ocotp";
	432	#address-cells = <1>;
	433	#size-cells = <1>;
640bf060	434	reg = <0x8002c000 0x2000>;
a7be1e68	435	clocks = <&clks 15>;
2954ff39 SG	436	};
	437
	438	axi-ahb@8002e000 {
640bf060	439	reg = <0x8002e000 0x2000>;
2954ff39 SG	440	status = "disabled";
	441	};
	442
	443	lcdif@80030000 {
a915ee42	444	compatible = "fsl,imx23-lcdif";
2954ff39	445	reg = <0x80030000 2000>;
a915ee42	446	interrupts = <46 45>;
53f9443d	447	clocks = <&clks 38>;
2954ff39 SG	448	status = "disabled";
	449	};
	450
	451	ssp1: ssp@80034000 {
640bf060	452	reg = <0x80034000 0x2000>;
7f2b9288	453	interrupts = <2>;
53f9443d	454	clocks = <&clks 33>;
f30fb03d SG	455	dmas = <&dma_apbh 2>;
f30fb03d SG	456	dma-names = "rx-tx";
2954ff39 SG	457	status = "disabled";
	458	};
	459
	460	tvenc@80038000 {
640bf060	461	reg = <0x80038000 0x2000>;
2954ff39 SG	462	status = "disabled";
	463	};
	464	};
	465
	466	apbx@80040000 {
	467	compatible = "simple-bus";
	468	#address-cells = <1>;
	469	#size-cells = <1>;
	470	reg = <0x80040000 0x40000>;
	471	ranges;
	472
53f9443d	473	clks: clkctrl@80040000 {
8f7cf881	474	compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
640bf060	475	reg = <0x80040000 0x2000>;
53f9443d	476	#clock-cells = <1>;
2954ff39 SG	477	};
	478
	479	saif0: saif@80042000 {
640bf060	480	reg = <0x80042000 0x2000>;
f30fb03d SG	481	dmas = <&dma_apbx 4>;
f30fb03d SG	482	dma-names = "rx-tx";
2954ff39 SG	483	status = "disabled";
	484	};
	485
	486	power@80044000 {
640bf060	487	reg = <0x80044000 0x2000>;
2954ff39 SG	488	status = "disabled";
	489	};
	490
	491	saif1: saif@80046000 {
640bf060	492	reg = <0x80046000 0x2000>;
f30fb03d SG	493	dmas = <&dma_apbx 10>;
f30fb03d SG	494	dma-names = "rx-tx";
2954ff39 SG	495	status = "disabled";
	496	};
	497
	498	audio-out@80048000 {
640bf060	499	reg = <0x80048000 0x2000>;
f30fb03d SG	500	dmas = <&dma_apbx 1>;
f30fb03d SG	501	dma-names = "tx";
2954ff39 SG	502	status = "disabled";
	503	};
	504
	505	audio-in@8004c000 {
640bf060	506	reg = <0x8004c000 0x2000>;
f30fb03d SG	507	dmas = <&dma_apbx 0>;
f30fb03d SG	508	dma-names = "rx";
2954ff39 SG	509	status = "disabled";
	510	};
	511
bd798f9c	512	lradc: lradc@80050000 {
1f45188c	513	compatible = "fsl,imx23-lradc";
640bf060	514	reg = <0x80050000 0x2000>;
1f45188c	515	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39	516	status = "disabled";
18da755d	517	clocks = <&clks 26>;
e8e94ed6	518	#io-channel-cells = <1>;
2954ff39 SG	519	};
	520
	521	spdif@80054000 {
	522	reg = <0x80054000 2000>;
f30fb03d SG	523	dmas = <&dma_apbx 2>;
f30fb03d SG	524	dma-names = "tx";
2954ff39 SG	525	status = "disabled";
	526	};
	527
71a34d82 HG	528	i2c: i2c@80058000 {
	529	#address-cells = <1>;
	530	#size-cells = <0>;
	531	compatible = "fsl,imx23-i2c";
640bf060	532	reg = <0x80058000 0x2000>;
71a34d82 HG	533	interrupts = <27>;
71a34d82 HG	534	clock-frequency = <100000>;
f30fb03d SG	535	dmas = <&dma_apbx 3>;
f30fb03d SG	536	dma-names = "rx-tx";
2954ff39 SG	537	status = "disabled";
	538	};
	539
	540	rtc@8005c000 {
f98c990c	541	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	542	reg = <0x8005c000 0x2000>;
f98c990c	543	interrupts = <22>;
2954ff39 SG	544	};
2954ff39 SG	545
52f7176b SG	546	pwm: pwm@80064000 {
52f7176b SG	547	compatible = "fsl,imx23-pwm";
640bf060	548	reg = <0x80064000 0x2000>;
53f9443d	549	clocks = <&clks 30>;
52f7176b SG	550	#pwm-cells = <2>;
52f7176b SG	551	fsl,pwm-number = <5>;
2954ff39 SG	552	status = "disabled";
	553	};
	554
	555	timrot@80068000 {
eeca6e60	556	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	557	reg = <0x80068000 0x2000>;
eeca6e60	558	interrupts = <28 29 30 31>;
2efb9504	559	clocks = <&clks 28>;
2954ff39 SG	560	};
	561
	562	auart0: serial@8006c000 {
a4508394	563	compatible = "fsl,imx23-auart";
2954ff39	564	reg = <0x8006c000 0x2000>;
7f2b9288	565	interrupts = <24>;
53f9443d	566	clocks = <&clks 32>;
f30fb03d SG	567	dmas = <&dma_apbx 6>, <&dma_apbx 7>;
f30fb03d SG	568	dma-names = "rx", "tx";
2954ff39 SG	569	status = "disabled";
	570	};
	571
	572	auart1: serial@8006e000 {
a4508394	573	compatible = "fsl,imx23-auart";
2954ff39	574	reg = <0x8006e000 0x2000>;
7f2b9288	575	interrupts = <59>;
53f9443d	576	clocks = <&clks 32>;
f30fb03d SG	577	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
f30fb03d SG	578	dma-names = "rx", "tx";
2954ff39 SG	579	status = "disabled";
	580	};
	581
	582	duart: serial@80070000 {
	583	compatible = "arm,pl011", "arm,primecell";
	584	reg = <0x80070000 0x2000>;
	585	interrupts = <0>;
53f9443d SG	586	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	587	clock-names = "uart", "apb_pclk";
2954ff39 SG	588	status = "disabled";
	589	};
	590
d6475317 FE	591	usbphy0: usbphy@8007c000 {
d6475317 FE	592	compatible = "fsl,imx23-usbphy";
2954ff39	593	reg = <0x8007c000 0x2000>;
d6475317	594	clocks = <&clks 41>;
2954ff39 SG	595	status = "disabled";
	596	};
	597	};
	598	};
	599
	600	ahb@80080000 {
	601	compatible = "simple-bus";
	602	#address-cells = <1>;
	603	#size-cells = <1>;
	604	reg = <0x80080000 0x80000>;
	605	ranges;
	606
d6475317 FE	607	usb0: usb@80080000 {
d6475317 FE	608	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	609	reg = <0x80080000 0x40000>;
d6475317 FE	610	interrupts = <11>;
	611	fsl,usbphy = <&usbphy0>;
	612	clocks = <&clks 40>;
2954ff39 SG	613	status = "disabled";
	614	};
	615	};
bd798f9c	616
0b452ccc	617	iio-hwmon {
bd798f9c AB	618	compatible = "iio-hwmon";
	619	io-channels = <&lradc 8>;
	620	};
2954ff39	621	};