[deliverable/linux.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
	};

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <13>, <56>;
				interrupt-names = "gpmi-dma", "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				fsl,gpmi-dma-channel = <4>;
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15 14>;
				clocks = <&clks 33>;
				fsl,ssp-dma-channel = <1>;
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11a2 /* MX23_PAD_PWM0__DUART_RX */
						0x11b2 /* MX23_PAD_PWM1__DUART_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
						0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
						0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
						0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
						0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
						0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
						0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
						0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
						0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
						0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
						0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
						0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
						0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
						0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
						0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
						0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
						0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
						0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
						0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
						0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
						0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N	*/
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup {
					fsl,pinmux-ids = <
						0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
						0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
						0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
					>;
					fsl,drive-strength = <2>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
						0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
						0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
						0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
						0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,pull-up = <0>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11c0 /* MX23_PAD_PWM2__PWM2 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
						0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
						0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
						0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
						0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
						0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
						0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
						0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
						0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
						0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
						0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
						0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
						0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
						0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
						0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
						0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
						0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
						0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
						0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
						0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
						0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
						0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
						0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
						0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
						0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
						0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
						0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
						0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
						0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
						0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
						0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				reg = <0x80028000 0x2000>;
				status = "disabled";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				reg = <0x8002c000 0x2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2 20>;
				clocks = <&clks 33>;
				fsl,ssp-dma-channel = <2>;
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				status = "disabled";
			};

			lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				status = "disabled";
			};

			i2c@80058000 {
				reg = <0x80058000 0x2000>;
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24 25 23>;
				clocks = <&clks 32>;
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59 60 58>;
				clocks = <&clks 32>;
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	interrupt-parent = <&icoll>;
	16
ce4c6f9b SG	17	aliases {
	18	gpio0 = &gpio0;
	19	gpio1 = &gpio1;
	20	gpio2 = &gpio2;
a4508394 SG	21	serial0 = &auart0;
a4508394 SG	22	serial1 = &auart1;
ce4c6f9b SG	23	};
ce4c6f9b SG	24
2954ff39 SG	25	cpus {
	26	cpu@0 {
	27	compatible = "arm,arm926ejs";
	28	};
	29	};
	30
	31	apb@80000000 {
	32	compatible = "simple-bus";
	33	#address-cells = <1>;
	34	#size-cells = <1>;
	35	reg = <0x80000000 0x80000>;
	36	ranges;
	37
	38	apbh@80000000 {
	39	compatible = "simple-bus";
	40	#address-cells = <1>;
	41	#size-cells = <1>;
	42	reg = <0x80000000 0x40000>;
	43	ranges;
	44
	45	icoll: interrupt-controller@80000000 {
83a84efc	46	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	47	interrupt-controller;
	48	#interrupt-cells = <1>;
	49	reg = <0x80000000 0x2000>;
	50	};
	51
	52	dma-apbh@80004000 {
84f3570a	53	compatible = "fsl,imx23-dma-apbh";
640bf060	54	reg = <0x80004000 0x2000>;
53f9443d	55	clocks = <&clks 15>;
2954ff39 SG	56	};
	57
	58	ecc@80008000 {
640bf060	59	reg = <0x80008000 0x2000>;
2954ff39 SG	60	status = "disabled";
	61	};
	62
a217c46c	63	gpmi-nand@8000c000 {
b9f25f86 HS	64	compatible = "fsl,imx23-gpmi-nand";
	65	#address-cells = <1>;
	66	#size-cells = <1>;
640bf060	67	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86 HS	68	reg-names = "gpmi-nand", "bch";
	69	interrupts = <13>, <56>;
	70	interrupt-names = "gpmi-dma", "bch";
53f9443d	71	clocks = <&clks 34>;
b6442559	72	clock-names = "gpmi_io";
b9f25f86	73	fsl,gpmi-dma-channel = <4>;
2954ff39 SG	74	status = "disabled";
	75	};
	76
	77	ssp0: ssp@80010000 {
640bf060	78	reg = <0x80010000 0x2000>;
be1ce308	79	interrupts = <15 14>;
53f9443d	80	clocks = <&clks 33>;
be1ce308	81	fsl,ssp-dma-channel = <1>;
2954ff39 SG	82	status = "disabled";
	83	};
	84
	85	etm@80014000 {
640bf060	86	reg = <0x80014000 0x2000>;
2954ff39 SG	87	status = "disabled";
	88	};
	89
	90	pinctrl@80018000 {
	91	#address-cells = <1>;
	92	#size-cells = <0>;
ce4c6f9b	93	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	94	reg = <0x80018000 0x2000>;
2954ff39	95
ce4c6f9b SG	96	gpio0: gpio@0 {
	97	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	98	interrupts = <16>;
	99	gpio-controller;
	100	#gpio-cells = <2>;
	101	interrupt-controller;
	102	#interrupt-cells = <2>;
	103	};
	104
	105	gpio1: gpio@1 {
	106	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	107	interrupts = <17>;
	108	gpio-controller;
	109	#gpio-cells = <2>;
	110	interrupt-controller;
	111	#interrupt-cells = <2>;
	112	};
	113
	114	gpio2: gpio@2 {
	115	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	116	interrupts = <18>;
	117	gpio-controller;
	118	#gpio-cells = <2>;
	119	interrupt-controller;
	120	#interrupt-cells = <2>;
	121	};
	122
2954ff39 SG	123	duart_pins_a: duart@0 {
2954ff39 SG	124	reg = <0>;
f14da767 SG	125	fsl,pinmux-ids = <
	126	0x11a2 /* MX23_PAD_PWM0__DUART_RX */
	127	0x11b2 /* MX23_PAD_PWM1__DUART_TX */
	128	>;
2954ff39 SG	129	fsl,drive-strength = <0>;
	130	fsl,voltage = <1>;
	131	fsl,pull-up = <0>;
	132	};
be1ce308	133
a4508394 SG	134	auart0_pins_a: auart0@0 {
	135	reg = <0>;
	136	fsl,pinmux-ids = <
	137	0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
	138	0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
	139	0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
	140	0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
	141	>;
	142	fsl,drive-strength = <0>;
	143	fsl,voltage = <1>;
	144	fsl,pull-up = <0>;
	145	};
	146
98916a2f FE	147	auart0_2pins_a: auart0-2pins@0 {
	148	reg = <0>;
	149	fsl,pinmux-ids = <
	150	0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
	151	0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
	152	>;
	153	fsl,drive-strength = <0>;
	154	fsl,voltage = <1>;
	155	fsl,pull-up = <0>;
	156	};
	157
b9f25f86 HS	158	gpmi_pins_a: gpmi-nand@0 {
	159	reg = <0>;
	160	fsl,pinmux-ids = <
	161	0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
	162	0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
	163	0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
	164	0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
	165	0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
	166	0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
	167	0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
	168	0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
	169	0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
	170	0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
	171	0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
	172	0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
	173	0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
	174	0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
	175	0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
	176	0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
	177	0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
	178	>;
	179	fsl,drive-strength = <0>;
	180	fsl,voltage = <1>;
	181	fsl,pull-up = <0>;
	182	};
	183
	184	gpmi_pins_fixup: gpmi-pins-fixup {
	185	fsl,pinmux-ids = <
	186	0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
	187	0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
	188	0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
	189	>;
	190	fsl,drive-strength = <2>;
	191	};
	192
72beabae SG	193	mmc0_4bit_pins_a: mmc0-4bit@0 {
	194	reg = <0>;
	195	fsl,pinmux-ids = <
	196	0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
	197	0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
	198	0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
	199	0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
	200	0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
72beabae SG	201	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	202	>;
	203	fsl,drive-strength = <1>;
	204	fsl,voltage = <1>;
	205	fsl,pull-up = <1>;
	206	};
	207
be1ce308 SG	208	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	209	reg = <0>;
f14da767 SG	210	fsl,pinmux-ids = <
	211	0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
	212	0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
	213	0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
	214	0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
	215	0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
	216	0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
	217	0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
	218	0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
	219	0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
	220	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	221	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	222	>;
be1ce308 SG	223	fsl,drive-strength = <1>;
	224	fsl,voltage = <1>;
	225	fsl,pull-up = <1>;
	226	};
	227
	228	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767 SG	229	fsl,pinmux-ids = <
	230	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	231	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	232	>;
be1ce308 SG	233	fsl,pull-up = <0>;
be1ce308 SG	234	};
52f7176b SG	235
	236	pwm2_pins_a: pwm2@0 {
	237	reg = <0>;
	238	fsl,pinmux-ids = <
	239	0x11c0 /* MX23_PAD_PWM2__PWM2 */
	240	>;
	241	fsl,drive-strength = <0>;
	242	fsl,voltage = <1>;
	243	fsl,pull-up = <0>;
	244	};
a915ee42 SG	245
	246	lcdif_24bit_pins_a: lcdif-24bit@0 {
	247	reg = <0>;
	248	fsl,pinmux-ids = <
	249	0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
	250	0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
	251	0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
	252	0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
	253	0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
	254	0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
	255	0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
	256	0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
	257	0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
	258	0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
	259	0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
	260	0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
	261	0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
	262	0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
	263	0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
	264	0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
	265	0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
	266	0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
	267	0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
	268	0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
	269	0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
	270	0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
	271	0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
	272	0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
	273	0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
	274	0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
	275	0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
	276	0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
	277	>;
	278	fsl,drive-strength = <0>;
	279	fsl,voltage = <1>;
	280	fsl,pull-up = <0>;
	281	};
a0487864 FB	282
	283	spi2_pins_a: spi2@0 {
	284	reg = <0>;
	285	fsl,pinmux-ids = <
	286	0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
	287	0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
	288	0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
	289	0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
	290	>;
	291	fsl,drive-strength = <1>;
	292	fsl,voltage = <1>;
	293	fsl,pull-up = <1>;
	294	};
2954ff39 SG	295	};
	296
	297	digctl@8001c000 {
38d6590f	298	compatible = "fsl,imx23-digctl";
2954ff39 SG	299	reg = <0x8001c000 2000>;
	300	status = "disabled";
	301	};
	302
	303	emi@80020000 {
640bf060	304	reg = <0x80020000 0x2000>;
2954ff39 SG	305	status = "disabled";
	306	};
	307
	308	dma-apbx@80024000 {
84f3570a	309	compatible = "fsl,imx23-dma-apbx";
640bf060	310	reg = <0x80024000 0x2000>;
53f9443d	311	clocks = <&clks 16>;
2954ff39 SG	312	};
	313
	314	dcp@80028000 {
640bf060	315	reg = <0x80028000 0x2000>;
2954ff39 SG	316	status = "disabled";
	317	};
	318
	319	pxp@8002a000 {
640bf060	320	reg = <0x8002a000 0x2000>;
2954ff39 SG	321	status = "disabled";
	322	};
	323
	324	ocotp@8002c000 {
640bf060	325	reg = <0x8002c000 0x2000>;
2954ff39 SG	326	status = "disabled";
	327	};
	328
	329	axi-ahb@8002e000 {
640bf060	330	reg = <0x8002e000 0x2000>;
2954ff39 SG	331	status = "disabled";
	332	};
	333
	334	lcdif@80030000 {
a915ee42	335	compatible = "fsl,imx23-lcdif";
2954ff39	336	reg = <0x80030000 2000>;
a915ee42	337	interrupts = <46 45>;
53f9443d	338	clocks = <&clks 38>;
2954ff39 SG	339	status = "disabled";
	340	};
	341
	342	ssp1: ssp@80034000 {
640bf060	343	reg = <0x80034000 0x2000>;
be1ce308	344	interrupts = <2 20>;
53f9443d	345	clocks = <&clks 33>;
be1ce308	346	fsl,ssp-dma-channel = <2>;
2954ff39 SG	347	status = "disabled";
	348	};
	349
	350	tvenc@80038000 {
640bf060	351	reg = <0x80038000 0x2000>;
2954ff39 SG	352	status = "disabled";
	353	};
	354	};
	355
	356	apbx@80040000 {
	357	compatible = "simple-bus";
	358	#address-cells = <1>;
	359	#size-cells = <1>;
	360	reg = <0x80040000 0x40000>;
	361	ranges;
	362
53f9443d SG	363	clks: clkctrl@80040000 {
53f9443d SG	364	compatible = "fsl,imx23-clkctrl";
640bf060	365	reg = <0x80040000 0x2000>;
53f9443d	366	#clock-cells = <1>;
2954ff39 SG	367	};
	368
	369	saif0: saif@80042000 {
640bf060	370	reg = <0x80042000 0x2000>;
2954ff39 SG	371	status = "disabled";
	372	};
	373
	374	power@80044000 {
640bf060	375	reg = <0x80044000 0x2000>;
2954ff39 SG	376	status = "disabled";
	377	};
	378
	379	saif1: saif@80046000 {
640bf060	380	reg = <0x80046000 0x2000>;
2954ff39 SG	381	status = "disabled";
	382	};
	383
	384	audio-out@80048000 {
640bf060	385	reg = <0x80048000 0x2000>;
2954ff39 SG	386	status = "disabled";
	387	};
	388
	389	audio-in@8004c000 {
640bf060	390	reg = <0x8004c000 0x2000>;
2954ff39 SG	391	status = "disabled";
	392	};
	393
	394	lradc@80050000 {
1f45188c	395	compatible = "fsl,imx23-lradc";
640bf060	396	reg = <0x80050000 0x2000>;
1f45188c	397	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39 SG	398	status = "disabled";
	399	};
	400
	401	spdif@80054000 {
	402	reg = <0x80054000 2000>;
	403	status = "disabled";
	404	};
	405
	406	i2c@80058000 {
640bf060	407	reg = <0x80058000 0x2000>;
2954ff39 SG	408	status = "disabled";
	409	};
	410
	411	rtc@8005c000 {
f98c990c	412	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	413	reg = <0x8005c000 0x2000>;
f98c990c	414	interrupts = <22>;
2954ff39 SG	415	};
2954ff39 SG	416
52f7176b SG	417	pwm: pwm@80064000 {
52f7176b SG	418	compatible = "fsl,imx23-pwm";
640bf060	419	reg = <0x80064000 0x2000>;
53f9443d	420	clocks = <&clks 30>;
52f7176b SG	421	#pwm-cells = <2>;
52f7176b SG	422	fsl,pwm-number = <5>;
2954ff39 SG	423	status = "disabled";
	424	};
	425
	426	timrot@80068000 {
eeca6e60	427	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	428	reg = <0x80068000 0x2000>;
eeca6e60	429	interrupts = <28 29 30 31>;
2efb9504	430	clocks = <&clks 28>;
2954ff39 SG	431	};
	432
	433	auart0: serial@8006c000 {
a4508394	434	compatible = "fsl,imx23-auart";
2954ff39	435	reg = <0x8006c000 0x2000>;
a4508394	436	interrupts = <24 25 23>;
53f9443d	437	clocks = <&clks 32>;
2954ff39 SG	438	status = "disabled";
	439	};
	440
	441	auart1: serial@8006e000 {
a4508394	442	compatible = "fsl,imx23-auart";
2954ff39	443	reg = <0x8006e000 0x2000>;
a4508394	444	interrupts = <59 60 58>;
53f9443d	445	clocks = <&clks 32>;
2954ff39 SG	446	status = "disabled";
	447	};
	448
	449	duart: serial@80070000 {
	450	compatible = "arm,pl011", "arm,primecell";
	451	reg = <0x80070000 0x2000>;
	452	interrupts = <0>;
53f9443d SG	453	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	454	clock-names = "uart", "apb_pclk";
2954ff39 SG	455	status = "disabled";
	456	};
	457
d6475317 FE	458	usbphy0: usbphy@8007c000 {
d6475317 FE	459	compatible = "fsl,imx23-usbphy";
2954ff39	460	reg = <0x8007c000 0x2000>;
d6475317	461	clocks = <&clks 41>;
2954ff39 SG	462	status = "disabled";
	463	};
	464	};
	465	};
	466
	467	ahb@80080000 {
	468	compatible = "simple-bus";
	469	#address-cells = <1>;
	470	#size-cells = <1>;
	471	reg = <0x80080000 0x80000>;
	472	ranges;
	473
d6475317 FE	474	usb0: usb@80080000 {
d6475317 FE	475	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	476	reg = <0x80080000 0x40000>;
d6475317 FE	477	interrupts = <11>;
	478	fsl,usbphy = <&usbphy0>;
	479	clocks = <&clks 40>;
2954ff39 SG	480	status = "disabled";
	481	};
	482	};
	483	};