projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 632506a2 PR |
1 | /* |
| 2 | * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr> | |
| 3 | * Copyright 2012 Armadeus Systems <support@armadeus.com> | |
| 4 | * | |
| 5 | * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix | |
| 6 | * | |
| 7 | * The code contained herein is licensed under the GNU General Public | |
| 8 | * License. You may obtain a copy of the GNU General Public License | |
| 9 | * Version 2 or later at the following locations: | |
| 10 | * | |
| 11 | * http://www.opensource.org/licenses/gpl-license.html | |
| 12 | * http://www.gnu.org/copyleft/gpl.html | |
| 13 | */ | |
| 14 | ||
| 15 | /dts-v1/; | |
| 36dffd8f | 16 | #include "imx27.dtsi" |
| 632506a2 PR |
17 | |
| 18 | / { | |
| 19 | model = "Armadeus Systems APF27 module"; | |
| 20 | compatible = "armadeus,imx27-apf27", "fsl,imx27"; | |
| 21 | ||
| 22 | memory { | |
| 23 | reg = <0xa0000000 0x04000000>; | |
| 24 | }; | |
| 25 | ||
| 26 | clocks { | |
| 27 | #address-cells = <1>; | |
| 28 | #size-cells = <0>; | |
| 29 | ||
| 30 | osc26m { | |
| 31 | compatible = "fsl,imx-osc26m", "fixed-clock"; | |
| 4b2b4043 | 32 | #clock-cells = <0>; |
| 632506a2 PR |
33 | clock-frequency = <0>; |
| 34 | }; | |
| 35 | }; | |
| be4ccfce | 36 | }; |
| 632506a2 | 37 | |
| 7672d8eb GGM |
38 | &iomuxc { |
| 39 | imx27-apf27 { | |
| 40 | pinctrl_fec1: fec1grp { | |
| 41 | fsl,pins = < | |
| 42 | MX27_PAD_SD3_CMD__FEC_TXD0 0x0 | |
| 43 | MX27_PAD_SD3_CLK__FEC_TXD1 0x0 | |
| 44 | MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 | |
| 45 | MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 | |
| 46 | MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 | |
| 47 | MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 | |
| 48 | MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 | |
| 49 | MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 | |
| 50 | MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 | |
| 51 | MX27_PAD_ATA_DATA7__FEC_MDC 0x0 | |
| 52 | MX27_PAD_ATA_DATA8__FEC_CRS 0x0 | |
| 53 | MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 | |
| 54 | MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 | |
| 55 | MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 | |
| 56 | MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 | |
| 57 | MX27_PAD_ATA_DATA13__FEC_COL 0x0 | |
| 58 | MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 | |
| 59 | MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 | |
| 60 | >; | |
| 61 | }; | |
| 62 | ||
| 63 | pinctrl_uart1: uart1grp { | |
| 64 | fsl,pins = < | |
| 65 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 | |
| 66 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 | |
| 67 | >; | |
| 68 | }; | |
| 69 | }; | |
| 70 | }; | |
| 71 | ||
| be4ccfce | 72 | &uart1 { |
| 7672d8eb GGM |
73 | pinctrl-names = "default"; |
| 74 | pinctrl-0 = <&pinctrl_uart1>; | |
| be4ccfce SG |
75 | status = "okay"; |
| 76 | }; | |
| 632506a2 | 77 | |
| be4ccfce | 78 | &fec { |
| 7672d8eb GGM |
79 | pinctrl-names = "default"; |
| 80 | pinctrl-0 = <&pinctrl_fec1>; | |
| be4ccfce SG |
81 | status = "okay"; |
| 82 | }; | |
| 632506a2 | 83 | |
| be4ccfce SG |
84 | &nfc { |
| 85 | status = "okay"; | |
| 86 | nand-bus-width = <16>; | |
| 87 | nand-ecc-mode = "hw"; | |
| 88 | nand-on-flash-bbt; | |
| 632506a2 | 89 | |
| be4ccfce SG |
90 | partition@0 { |
| 91 | label = "u-boot"; | |
| 92 | reg = <0x0 0x100000>; | |
| 93 | }; | |
| 632506a2 | 94 | |
| be4ccfce SG |
95 | partition@100000 { |
| 96 | label = "env"; | |
| 97 | reg = <0x100000 0x80000>; | |
| 98 | }; | |
| 632506a2 | 99 | |
| be4ccfce SG |
100 | partition@180000 { |
| 101 | label = "env2"; | |
| 102 | reg = <0x180000 0x80000>; | |
| 103 | }; | |
| 632506a2 | 104 | |
| be4ccfce SG |
105 | partition@200000 { |
| 106 | label = "firmware"; | |
| 107 | reg = <0x200000 0x80000>; | |
| 108 | }; | |
| 632506a2 | 109 | |
| be4ccfce SG |
110 | partition@280000 { |
| 111 | label = "dtb"; | |
| 112 | reg = <0x280000 0x80000>; | |
| 113 | }; | |
| 632506a2 | 114 | |
| be4ccfce SG |
115 | partition@300000 { |
| 116 | label = "kernel"; | |
| 117 | reg = <0x300000 0x500000>; | |
| 118 | }; | |
| 632506a2 | 119 | |
| be4ccfce SG |
120 | partition@800000 { |
| 121 | label = "rootfs"; | |
| 122 | reg = <0x800000 0xf800000>; | |
| 632506a2 PR |
123 | }; |
| 124 | }; |