Commit | Line | Data |
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d8cae888 AS |
1 | /* |
2 | * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | #include "imx27-eukrea-cpuimx27.dtsi" | |
13 | ||
14 | / { | |
15 | model = "Eukrea MBIMXSD27"; | |
16 | compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27"; | |
17 | ||
18 | display0: CMO-QVGA { | |
19 | model = "CMO-QVGA"; | |
20 | native-mode = <&timing0>; | |
21 | bits-per-pixel = <16>; | |
22 | fsl,pcr = <0xfad08b80>; | |
23 | ||
24 | display-timings { | |
25 | timing0: 320x240 { | |
26 | clock-frequency = <6500000>; | |
27 | hactive = <320>; | |
28 | vactive = <240>; | |
29 | hback-porch = <20>; | |
30 | hsync-len = <30>; | |
31 | hfront-porch = <38>; | |
32 | vback-porch = <4>; | |
33 | vsync-len = <3>; | |
34 | vfront-porch = <15>; | |
35 | }; | |
36 | }; | |
37 | }; | |
38 | ||
39 | backlight { | |
40 | compatible = "gpio-backlight"; | |
41 | pinctrl-names = "default"; | |
42 | pinctrl-0 = <&pinctrl_backlight>; | |
43 | gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; | |
44 | }; | |
45 | ||
46 | leds { | |
47 | compatible = "gpio-leds"; | |
48 | pinctrl-names = "default"; | |
49 | pinctrl-0 = <&pinctrl_gpioleds>; | |
50 | ||
51 | led1 { | |
52 | label = "system::live"; | |
53 | gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; | |
54 | linux,default-trigger = "heartbeat"; | |
55 | }; | |
56 | ||
57 | led2 { | |
58 | label = "system::user"; | |
59 | gpios = <&gpio6 19 GPIO_ACTIVE_LOW>; | |
60 | }; | |
61 | }; | |
62 | ||
63 | regulators { | |
64 | #address-cells = <1>; | |
65 | #size-cells = <0>; | |
66 | compatible = "simple-bus"; | |
67 | ||
68 | reg_lcd: regulator@0 { | |
69 | pinctrl-names = "default"; | |
70 | pinctrl-0 = <&pinctrl_lcdreg>; | |
71 | compatible = "regulator-fixed"; | |
72 | reg = <0>; | |
73 | regulator-name = "LCD"; | |
74 | regulator-min-microvolt = <5000000>; | |
75 | regulator-max-microvolt = <5000000>; | |
76 | gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>; | |
77 | enable-active-high; | |
78 | }; | |
79 | }; | |
80 | }; | |
81 | ||
82 | &cspi1 { | |
83 | pinctrl-0 = <&pinctrl_cspi1>; | |
84 | fsl,spi-num-chipselects = <1>; | |
85 | cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; | |
86 | status = "okay"; | |
87 | ||
88 | ads7846 { | |
89 | compatible = "ti,ads7846"; | |
90 | pinctrl-names = "default"; | |
91 | pinctrl-0 = <&pinctrl_touch>; | |
92 | reg = <0>; | |
93 | interrupts = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>; | |
94 | spi-cpol; | |
95 | spi-max-frequency = <1500000>; | |
96 | ti,keep-vref-on; | |
97 | }; | |
98 | }; | |
99 | ||
100 | &fb { | |
101 | pinctrl-names = "default"; | |
102 | pinctrl-0 = <&pinctrl_imxfb>; | |
103 | display = <&display0>; | |
104 | lcd-supply = <®_lcd>; | |
105 | fsl,dmacr = <0x00040060>; | |
106 | fsl,lscr1 = <0x00120300>; | |
107 | fsl,lpccr = <0x00a903ff>; | |
108 | status = "okay"; | |
109 | }; | |
110 | ||
111 | &i2c1 { | |
112 | codec: codec@1a { | |
113 | compatible = "ti,tlv320aic23"; | |
114 | reg = <0x1a>; | |
115 | }; | |
116 | }; | |
117 | ||
118 | &kpp { | |
119 | linux,keymap = < | |
120 | MATRIX_KEY(0, 0, KEY_UP) | |
121 | MATRIX_KEY(0, 1, KEY_DOWN) | |
122 | MATRIX_KEY(1, 0, KEY_RIGHT) | |
123 | MATRIX_KEY(1, 1, KEY_LEFT) | |
124 | >; | |
125 | status = "okay"; | |
126 | }; | |
127 | ||
128 | &sdhci1 { | |
129 | pinctrl-names = "default"; | |
130 | pinctrl-0 = <&pinctrl_sdhc1>; | |
131 | bus-width = <4>; | |
132 | status = "okay"; | |
133 | }; | |
134 | ||
135 | &ssi1 { | |
136 | pinctrl-names = "default"; | |
137 | pinctrl-0 = <&pinctrl_ssi1>; | |
d8cae888 AS |
138 | codec-handle = <&codec>; |
139 | status = "okay"; | |
140 | }; | |
141 | ||
142 | &uart1 { | |
143 | fsl,uart-has-rtscts; | |
144 | pinctrl-names = "default"; | |
145 | pinctrl-0 = <&pinctrl_uart1>; | |
146 | status = "okay"; | |
147 | }; | |
148 | ||
149 | &uart2 { | |
150 | fsl,uart-has-rtscts; | |
151 | pinctrl-names = "default"; | |
152 | pinctrl-0 = <&pinctrl_uart2>; | |
153 | status = "okay"; | |
154 | }; | |
155 | ||
156 | &uart3 { | |
157 | fsl,uart-has-rtscts; | |
158 | pinctrl-names = "default"; | |
159 | pinctrl-0 = <&pinctrl_uart3>; | |
160 | status = "okay"; | |
161 | }; | |
162 | ||
163 | &iomuxc { | |
164 | imx27-eukrea-cpuimx27-baseboard { | |
165 | pinctrl_cspi1: cspi1grp { | |
166 | fsl,pins = < | |
167 | MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0 | |
168 | MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0 | |
169 | MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0 | |
170 | MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */ | |
171 | >; | |
172 | }; | |
173 | ||
174 | pinctrl_backlight: backlightgrp { | |
175 | fsl,pins = < | |
176 | MX27_PAD_PWMO__GPIO5_5 0x0 | |
177 | >; | |
178 | }; | |
179 | ||
180 | pinctrl_gpioleds: gpioledsgrp { | |
181 | fsl,pins = < | |
182 | MX27_PAD_PC_PWRON__GPIO6_16 0x0 | |
183 | MX27_PAD_PC_CD2_B__GPIO6_19 0x0 | |
184 | >; | |
185 | }; | |
186 | ||
187 | pinctrl_imxfb: imxfbgrp { | |
188 | fsl,pins = < | |
189 | MX27_PAD_LD0__LD0 0x0 | |
190 | MX27_PAD_LD1__LD1 0x0 | |
191 | MX27_PAD_LD2__LD2 0x0 | |
192 | MX27_PAD_LD3__LD3 0x0 | |
193 | MX27_PAD_LD4__LD4 0x0 | |
194 | MX27_PAD_LD5__LD5 0x0 | |
195 | MX27_PAD_LD6__LD6 0x0 | |
196 | MX27_PAD_LD7__LD7 0x0 | |
197 | MX27_PAD_LD8__LD8 0x0 | |
198 | MX27_PAD_LD9__LD9 0x0 | |
199 | MX27_PAD_LD10__LD10 0x0 | |
200 | MX27_PAD_LD11__LD11 0x0 | |
201 | MX27_PAD_LD12__LD12 0x0 | |
202 | MX27_PAD_LD13__LD13 0x0 | |
203 | MX27_PAD_LD14__LD14 0x0 | |
204 | MX27_PAD_LD15__LD15 0x0 | |
205 | MX27_PAD_LD16__LD16 0x0 | |
206 | MX27_PAD_LD17__LD17 0x0 | |
207 | MX27_PAD_CONTRAST__CONTRAST 0x0 | |
208 | MX27_PAD_OE_ACD__OE_ACD 0x0 | |
209 | MX27_PAD_HSYNC__HSYNC 0x0 | |
210 | MX27_PAD_VSYNC__VSYNC 0x0 | |
211 | >; | |
212 | }; | |
213 | ||
214 | pinctrl_lcdreg: lcdreggrp { | |
215 | fsl,pins = < | |
216 | MX27_PAD_CLS__GPIO1_25 0x0 | |
217 | >; | |
218 | }; | |
219 | ||
220 | pinctrl_sdhc1: sdhc1grp { | |
221 | fsl,pins = < | |
222 | MX27_PAD_SD1_CLK__SD1_CLK 0x0 | |
223 | MX27_PAD_SD1_CMD__SD1_CMD 0x0 | |
224 | MX27_PAD_SD1_D0__SD1_D0 0x0 | |
225 | MX27_PAD_SD1_D1__SD1_D1 0x0 | |
226 | MX27_PAD_SD1_D2__SD1_D2 0x0 | |
227 | MX27_PAD_SD1_D3__SD1_D3 0x0 | |
228 | >; | |
229 | }; | |
230 | ||
231 | pinctrl_ssi1: ssi1grp { | |
232 | fsl,pins = < | |
233 | MX27_PAD_SSI4_CLK__SSI4_CLK 0x0 | |
234 | MX27_PAD_SSI4_FS__SSI4_FS 0x0 | |
235 | MX27_PAD_SSI4_RXDAT__SSI4_RXDAT 0x1 | |
236 | MX27_PAD_SSI4_TXDAT__SSI4_TXDAT 0x1 | |
237 | >; | |
238 | }; | |
239 | ||
240 | pinctrl_touch: touchgrp { | |
241 | fsl,pins = < | |
242 | MX27_PAD_CSPI1_RDY__GPIO4_25 0x0 /* IRQ */ | |
243 | >; | |
244 | }; | |
245 | ||
246 | pinctrl_uart1: uart1grp { | |
247 | fsl,pins = < | |
248 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 | |
249 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 | |
250 | MX27_PAD_UART1_CTS__UART1_CTS 0x0 | |
251 | MX27_PAD_UART1_RTS__UART1_RTS 0x0 | |
252 | >; | |
253 | }; | |
254 | ||
255 | pinctrl_uart2: uart2grp { | |
256 | fsl,pins = < | |
257 | MX27_PAD_UART2_TXD__UART2_TXD 0x0 | |
258 | MX27_PAD_UART2_RXD__UART2_RXD 0x0 | |
259 | MX27_PAD_UART2_CTS__UART2_CTS 0x0 | |
260 | MX27_PAD_UART2_RTS__UART2_RTS 0x0 | |
261 | >; | |
262 | }; | |
263 | ||
264 | pinctrl_uart3: uart3grp { | |
265 | fsl,pins = < | |
266 | MX27_PAD_UART3_TXD__UART3_TXD 0x0 | |
267 | MX27_PAD_UART3_RXD__UART3_RXD 0x0 | |
268 | MX27_PAD_UART3_CTS__UART3_CTS 0x0 | |
269 | MX27_PAD_UART3_RTS__UART3_RTS 0x0 | |
270 | >; | |
271 | }; | |
272 | }; | |
273 | }; |