Commit | Line | Data |
---|---|---|
9f0749e3 SH |
1 | /* |
2 | * Copyright 2012 Sascha Hauer, Pengutronix | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | aliases { | |
16 | serial0 = &uart1; | |
17 | serial1 = &uart2; | |
18 | serial2 = &uart3; | |
19 | serial3 = &uart4; | |
20 | serial4 = &uart5; | |
21 | serial5 = &uart6; | |
5230f8fe SG |
22 | gpio0 = &gpio1; |
23 | gpio1 = &gpio2; | |
24 | gpio2 = &gpio3; | |
25 | gpio3 = &gpio4; | |
26 | gpio4 = &gpio5; | |
27 | gpio5 = &gpio6; | |
9f0749e3 SH |
28 | }; |
29 | ||
30 | avic: avic-interrupt-controller@e0000000 { | |
31 | compatible = "fsl,imx27-avic", "fsl,avic"; | |
32 | interrupt-controller; | |
33 | #interrupt-cells = <1>; | |
34 | reg = <0x10040000 0x1000>; | |
35 | }; | |
36 | ||
37 | clocks { | |
38 | #address-cells = <1>; | |
39 | #size-cells = <0>; | |
40 | ||
41 | osc26m { | |
42 | compatible = "fsl,imx-osc26m", "fixed-clock"; | |
43 | clock-frequency = <26000000>; | |
44 | }; | |
45 | }; | |
46 | ||
47 | soc { | |
48 | #address-cells = <1>; | |
49 | #size-cells = <1>; | |
50 | compatible = "simple-bus"; | |
51 | interrupt-parent = <&avic>; | |
52 | ranges; | |
53 | ||
54 | aipi@10000000 { /* AIPI1 */ | |
55 | compatible = "fsl,aipi-bus", "simple-bus"; | |
56 | #address-cells = <1>; | |
57 | #size-cells = <1>; | |
3e24b05b | 58 | reg = <0x10000000 0x20000>; |
9f0749e3 SH |
59 | ranges; |
60 | ||
7b7d6727 | 61 | wdog: wdog@10002000 { |
9f0749e3 SH |
62 | compatible = "fsl,imx27-wdt", "fsl,imx21-wdt"; |
63 | reg = <0x10002000 0x4000>; | |
64 | interrupts = <27>; | |
9f0749e3 SH |
65 | }; |
66 | ||
0c456cfa | 67 | uart1: serial@1000a000 { |
9f0749e3 SH |
68 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
69 | reg = <0x1000a000 0x1000>; | |
70 | interrupts = <20>; | |
71 | status = "disabled"; | |
72 | }; | |
73 | ||
0c456cfa | 74 | uart2: serial@1000b000 { |
9f0749e3 SH |
75 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
76 | reg = <0x1000b000 0x1000>; | |
77 | interrupts = <19>; | |
78 | status = "disabled"; | |
79 | }; | |
80 | ||
0c456cfa | 81 | uart3: serial@1000c000 { |
9f0749e3 SH |
82 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
83 | reg = <0x1000c000 0x1000>; | |
84 | interrupts = <18>; | |
85 | status = "disabled"; | |
86 | }; | |
87 | ||
0c456cfa | 88 | uart4: serial@1000d000 { |
9f0749e3 SH |
89 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
90 | reg = <0x1000d000 0x1000>; | |
91 | interrupts = <17>; | |
92 | status = "disabled"; | |
93 | }; | |
94 | ||
95 | cspi1: cspi@1000e000 { | |
96 | #address-cells = <1>; | |
97 | #size-cells = <0>; | |
98 | compatible = "fsl,imx27-cspi"; | |
99 | reg = <0x1000e000 0x1000>; | |
100 | interrupts = <16>; | |
101 | status = "disabled"; | |
102 | }; | |
103 | ||
104 | cspi2: cspi@1000f000 { | |
105 | #address-cells = <1>; | |
106 | #size-cells = <0>; | |
107 | compatible = "fsl,imx27-cspi"; | |
108 | reg = <0x1000f000 0x1000>; | |
109 | interrupts = <15>; | |
110 | status = "disabled"; | |
111 | }; | |
112 | ||
113 | i2c1: i2c@10012000 { | |
114 | #address-cells = <1>; | |
115 | #size-cells = <0>; | |
5bdfba29 | 116 | compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; |
9f0749e3 SH |
117 | reg = <0x10012000 0x1000>; |
118 | interrupts = <12>; | |
119 | status = "disabled"; | |
120 | }; | |
121 | ||
122 | gpio1: gpio@10015000 { | |
123 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
124 | reg = <0x10015000 0x100>; | |
125 | interrupts = <8>; | |
126 | gpio-controller; | |
127 | #gpio-cells = <2>; | |
128 | interrupt-controller; | |
88cde8b7 | 129 | #interrupt-cells = <2>; |
9f0749e3 SH |
130 | }; |
131 | ||
132 | gpio2: gpio@10015100 { | |
133 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
134 | reg = <0x10015100 0x100>; | |
135 | interrupts = <8>; | |
136 | gpio-controller; | |
137 | #gpio-cells = <2>; | |
138 | interrupt-controller; | |
88cde8b7 | 139 | #interrupt-cells = <2>; |
9f0749e3 SH |
140 | }; |
141 | ||
142 | gpio3: gpio@10015200 { | |
143 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
144 | reg = <0x10015200 0x100>; | |
145 | interrupts = <8>; | |
146 | gpio-controller; | |
147 | #gpio-cells = <2>; | |
148 | interrupt-controller; | |
88cde8b7 | 149 | #interrupt-cells = <2>; |
9f0749e3 SH |
150 | }; |
151 | ||
152 | gpio4: gpio@10015300 { | |
153 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
154 | reg = <0x10015300 0x100>; | |
155 | interrupts = <8>; | |
156 | gpio-controller; | |
157 | #gpio-cells = <2>; | |
158 | interrupt-controller; | |
88cde8b7 | 159 | #interrupt-cells = <2>; |
9f0749e3 SH |
160 | }; |
161 | ||
162 | gpio5: gpio@10015400 { | |
163 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
164 | reg = <0x10015400 0x100>; | |
165 | interrupts = <8>; | |
166 | gpio-controller; | |
167 | #gpio-cells = <2>; | |
168 | interrupt-controller; | |
88cde8b7 | 169 | #interrupt-cells = <2>; |
9f0749e3 SH |
170 | }; |
171 | ||
172 | gpio6: gpio@10015500 { | |
173 | compatible = "fsl,imx27-gpio", "fsl,imx21-gpio"; | |
174 | reg = <0x10015500 0x100>; | |
175 | interrupts = <8>; | |
176 | gpio-controller; | |
177 | #gpio-cells = <2>; | |
178 | interrupt-controller; | |
88cde8b7 | 179 | #interrupt-cells = <2>; |
9f0749e3 SH |
180 | }; |
181 | ||
182 | cspi3: cspi@10017000 { | |
183 | #address-cells = <1>; | |
184 | #size-cells = <0>; | |
185 | compatible = "fsl,imx27-cspi"; | |
186 | reg = <0x10017000 0x1000>; | |
187 | interrupts = <6>; | |
188 | status = "disabled"; | |
189 | }; | |
190 | ||
0c456cfa | 191 | uart5: serial@1001b000 { |
9f0749e3 SH |
192 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
193 | reg = <0x1001b000 0x1000>; | |
194 | interrupts = <49>; | |
195 | status = "disabled"; | |
196 | }; | |
197 | ||
0c456cfa | 198 | uart6: serial@1001c000 { |
9f0749e3 SH |
199 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
200 | reg = <0x1001c000 0x1000>; | |
201 | interrupts = <48>; | |
202 | status = "disabled"; | |
203 | }; | |
204 | ||
205 | i2c2: i2c@1001d000 { | |
206 | #address-cells = <1>; | |
207 | #size-cells = <0>; | |
5bdfba29 | 208 | compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; |
9f0749e3 SH |
209 | reg = <0x1001d000 0x1000>; |
210 | interrupts = <1>; | |
211 | status = "disabled"; | |
212 | }; | |
213 | ||
3e24b05b FE |
214 | }; |
215 | ||
216 | aipi@10020000 { /* AIPI2 */ | |
217 | compatible = "fsl,aipi-bus", "simple-bus"; | |
218 | #address-cells = <1>; | |
219 | #size-cells = <1>; | |
220 | reg = <0x10020000 0x20000>; | |
221 | ranges; | |
222 | ||
0c456cfa | 223 | fec: ethernet@1002b000 { |
9f0749e3 SH |
224 | compatible = "fsl,imx27-fec"; |
225 | reg = <0x1002b000 0x4000>; | |
226 | interrupts = <50>; | |
227 | status = "disabled"; | |
228 | }; | |
229 | }; | |
7b7d6727 SH |
230 | |
231 | nfc: nand@d8000000 { | |
37787360 UKK |
232 | #address-cells = <1>; |
233 | #size-cells = <1>; | |
234 | ||
235 | compatible = "fsl,imx27-nand"; | |
236 | reg = <0xd8000000 0x1000>; | |
237 | interrupts = <29>; | |
238 | status = "disabled"; | |
239 | }; | |
9f0749e3 SH |
240 | }; |
241 | }; |