Commit | Line | Data |
---|---|---|
bc3a59c1 DA |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
25fc228e | 12 | #include <dt-bindings/gpio/gpio.h> |
bc3875f1 LW |
13 | #include "skeleton.dtsi" |
14 | #include "imx28-pinfunc.h" | |
bc3a59c1 DA |
15 | |
16 | / { | |
17 | interrupt-parent = <&icoll>; | |
18 | ||
ce4c6f9b | 19 | aliases { |
6bf6eb09 FE |
20 | ethernet0 = &mac0; |
21 | ethernet1 = &mac1; | |
ce4c6f9b SG |
22 | gpio0 = &gpio0; |
23 | gpio1 = &gpio1; | |
24 | gpio2 = &gpio2; | |
25 | gpio3 = &gpio3; | |
26 | gpio4 = &gpio4; | |
530f1d41 SG |
27 | saif0 = &saif0; |
28 | saif1 = &saif1; | |
80d969e4 FE |
29 | serial0 = &auart0; |
30 | serial1 = &auart1; | |
31 | serial2 = &auart2; | |
32 | serial3 = &auart3; | |
33 | serial4 = &auart4; | |
6bf6eb09 FE |
34 | spi0 = &ssp1; |
35 | spi1 = &ssp2; | |
1f35cc6a PC |
36 | usbphy0 = &usbphy0; |
37 | usbphy1 = &usbphy1; | |
ce4c6f9b SG |
38 | }; |
39 | ||
bc3a59c1 | 40 | cpus { |
7925e89f LP |
41 | #address-cells = <0>; |
42 | #size-cells = <0>; | |
43 | ||
44 | cpu { | |
45 | compatible = "arm,arm926ej-s"; | |
46 | device_type = "cpu"; | |
bc3a59c1 DA |
47 | }; |
48 | }; | |
49 | ||
50 | apb@80000000 { | |
51 | compatible = "simple-bus"; | |
52 | #address-cells = <1>; | |
53 | #size-cells = <1>; | |
54 | reg = <0x80000000 0x80000>; | |
55 | ranges; | |
56 | ||
57 | apbh@80000000 { | |
58 | compatible = "simple-bus"; | |
59 | #address-cells = <1>; | |
60 | #size-cells = <1>; | |
61 | reg = <0x80000000 0x3c900>; | |
62 | ranges; | |
63 | ||
64 | icoll: interrupt-controller@80000000 { | |
83a84efc | 65 | compatible = "fsl,imx28-icoll", "fsl,icoll"; |
bc3a59c1 DA |
66 | interrupt-controller; |
67 | #interrupt-cells = <1>; | |
68 | reg = <0x80000000 0x2000>; | |
69 | }; | |
70 | ||
296f8cd3 | 71 | hsadc: hsadc@80002000 { |
0f06cde7 | 72 | reg = <0x80002000 0x2000>; |
7f2b9288 | 73 | interrupts = <13>; |
f30fb03d SG |
74 | dmas = <&dma_apbh 12>; |
75 | dma-names = "rx"; | |
bc3a59c1 DA |
76 | status = "disabled"; |
77 | }; | |
78 | ||
f30fb03d | 79 | dma_apbh: dma-apbh@80004000 { |
84f3570a | 80 | compatible = "fsl,imx28-dma-apbh"; |
0f06cde7 | 81 | reg = <0x80004000 0x2000>; |
f30fb03d SG |
82 | interrupts = <82 83 84 85 |
83 | 88 88 88 88 | |
84 | 88 88 88 88 | |
85 | 87 86 0 0>; | |
86 | interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3", | |
87 | "gpmi0", "gmpi1", "gpmi2", "gmpi3", | |
88 | "gpmi4", "gmpi5", "gpmi6", "gmpi7", | |
89 | "hsadc", "lcdif", "empty", "empty"; | |
90 | #dma-cells = <1>; | |
91 | dma-channels = <16>; | |
b598b9f3 | 92 | clocks = <&clks 25>; |
bc3a59c1 DA |
93 | }; |
94 | ||
296f8cd3 | 95 | perfmon: perfmon@80006000 { |
0f06cde7 | 96 | reg = <0x80006000 0x800>; |
bc3a59c1 DA |
97 | interrupts = <27>; |
98 | status = "disabled"; | |
99 | }; | |
100 | ||
296f8cd3 | 101 | gpmi: gpmi-nand@8000c000 { |
7a8e5149 HS |
102 | compatible = "fsl,imx28-gpmi-nand"; |
103 | #address-cells = <1>; | |
104 | #size-cells = <1>; | |
0f06cde7 | 105 | reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; |
7a8e5149 | 106 | reg-names = "gpmi-nand", "bch"; |
7f2b9288 SG |
107 | interrupts = <41>; |
108 | interrupt-names = "bch"; | |
b598b9f3 | 109 | clocks = <&clks 50>; |
b6442559 | 110 | clock-names = "gpmi_io"; |
f30fb03d SG |
111 | dmas = <&dma_apbh 4>; |
112 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
113 | status = "disabled"; |
114 | }; | |
115 | ||
116 | ssp0: ssp@80010000 { | |
41bf5706 MR |
117 | #address-cells = <1>; |
118 | #size-cells = <0>; | |
0f06cde7 | 119 | reg = <0x80010000 0x2000>; |
7f2b9288 | 120 | interrupts = <96>; |
b598b9f3 | 121 | clocks = <&clks 46>; |
f30fb03d SG |
122 | dmas = <&dma_apbh 0>; |
123 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
124 | status = "disabled"; |
125 | }; | |
126 | ||
127 | ssp1: ssp@80012000 { | |
41bf5706 MR |
128 | #address-cells = <1>; |
129 | #size-cells = <0>; | |
0f06cde7 | 130 | reg = <0x80012000 0x2000>; |
7f2b9288 | 131 | interrupts = <97>; |
b598b9f3 | 132 | clocks = <&clks 47>; |
f30fb03d SG |
133 | dmas = <&dma_apbh 1>; |
134 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
135 | status = "disabled"; |
136 | }; | |
137 | ||
138 | ssp2: ssp@80014000 { | |
41bf5706 MR |
139 | #address-cells = <1>; |
140 | #size-cells = <0>; | |
0f06cde7 | 141 | reg = <0x80014000 0x2000>; |
7f2b9288 | 142 | interrupts = <98>; |
b598b9f3 | 143 | clocks = <&clks 48>; |
f30fb03d SG |
144 | dmas = <&dma_apbh 2>; |
145 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
146 | status = "disabled"; |
147 | }; | |
148 | ||
149 | ssp3: ssp@80016000 { | |
41bf5706 MR |
150 | #address-cells = <1>; |
151 | #size-cells = <0>; | |
0f06cde7 | 152 | reg = <0x80016000 0x2000>; |
7f2b9288 | 153 | interrupts = <99>; |
b598b9f3 | 154 | clocks = <&clks 49>; |
f30fb03d SG |
155 | dmas = <&dma_apbh 3>; |
156 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
157 | status = "disabled"; |
158 | }; | |
159 | ||
296f8cd3 | 160 | pinctrl: pinctrl@80018000 { |
bc3a59c1 DA |
161 | #address-cells = <1>; |
162 | #size-cells = <0>; | |
ce4c6f9b | 163 | compatible = "fsl,imx28-pinctrl", "simple-bus"; |
0f06cde7 | 164 | reg = <0x80018000 0x2000>; |
bc3a59c1 | 165 | |
ce4c6f9b SG |
166 | gpio0: gpio@0 { |
167 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
e57609aa | 168 | reg = <0>; |
ce4c6f9b SG |
169 | interrupts = <127>; |
170 | gpio-controller; | |
171 | #gpio-cells = <2>; | |
172 | interrupt-controller; | |
173 | #interrupt-cells = <2>; | |
174 | }; | |
175 | ||
176 | gpio1: gpio@1 { | |
177 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
e57609aa | 178 | reg = <1>; |
ce4c6f9b SG |
179 | interrupts = <126>; |
180 | gpio-controller; | |
181 | #gpio-cells = <2>; | |
182 | interrupt-controller; | |
183 | #interrupt-cells = <2>; | |
184 | }; | |
185 | ||
186 | gpio2: gpio@2 { | |
187 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
e57609aa | 188 | reg = <2>; |
ce4c6f9b SG |
189 | interrupts = <125>; |
190 | gpio-controller; | |
191 | #gpio-cells = <2>; | |
192 | interrupt-controller; | |
193 | #interrupt-cells = <2>; | |
194 | }; | |
195 | ||
196 | gpio3: gpio@3 { | |
197 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
e57609aa | 198 | reg = <3>; |
ce4c6f9b SG |
199 | interrupts = <124>; |
200 | gpio-controller; | |
201 | #gpio-cells = <2>; | |
202 | interrupt-controller; | |
203 | #interrupt-cells = <2>; | |
204 | }; | |
205 | ||
206 | gpio4: gpio@4 { | |
207 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
e57609aa | 208 | reg = <4>; |
ce4c6f9b SG |
209 | interrupts = <123>; |
210 | gpio-controller; | |
211 | #gpio-cells = <2>; | |
212 | interrupt-controller; | |
213 | #interrupt-cells = <2>; | |
214 | }; | |
215 | ||
bc3a59c1 DA |
216 | duart_pins_a: duart@0 { |
217 | reg = <0>; | |
f14da767 | 218 | fsl,pinmux-ids = < |
bc3875f1 LW |
219 | MX28_PAD_PWM0__DUART_RX |
220 | MX28_PAD_PWM1__DUART_TX | |
f14da767 | 221 | >; |
4191c340 LW |
222 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
223 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
224 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
bc3a59c1 DA |
225 | }; |
226 | ||
8385e7c1 MR |
227 | duart_pins_b: duart@1 { |
228 | reg = <1>; | |
f14da767 | 229 | fsl,pinmux-ids = < |
bc3875f1 LW |
230 | MX28_PAD_AUART0_CTS__DUART_RX |
231 | MX28_PAD_AUART0_RTS__DUART_TX | |
f14da767 | 232 | >; |
4191c340 LW |
233 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
234 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
235 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
8385e7c1 MR |
236 | }; |
237 | ||
e1a4d18f SG |
238 | duart_4pins_a: duart-4pins@0 { |
239 | reg = <0>; | |
240 | fsl,pinmux-ids = < | |
bc3875f1 LW |
241 | MX28_PAD_AUART0_CTS__DUART_RX |
242 | MX28_PAD_AUART0_RTS__DUART_TX | |
243 | MX28_PAD_AUART0_RX__DUART_CTS | |
244 | MX28_PAD_AUART0_TX__DUART_RTS | |
e1a4d18f | 245 | >; |
4191c340 LW |
246 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
247 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
248 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
e1a4d18f SG |
249 | }; |
250 | ||
7a8e5149 HS |
251 | gpmi_pins_a: gpmi-nand@0 { |
252 | reg = <0>; | |
f14da767 | 253 | fsl,pinmux-ids = < |
bc3875f1 LW |
254 | MX28_PAD_GPMI_D00__GPMI_D0 |
255 | MX28_PAD_GPMI_D01__GPMI_D1 | |
256 | MX28_PAD_GPMI_D02__GPMI_D2 | |
257 | MX28_PAD_GPMI_D03__GPMI_D3 | |
258 | MX28_PAD_GPMI_D04__GPMI_D4 | |
259 | MX28_PAD_GPMI_D05__GPMI_D5 | |
260 | MX28_PAD_GPMI_D06__GPMI_D6 | |
261 | MX28_PAD_GPMI_D07__GPMI_D7 | |
262 | MX28_PAD_GPMI_CE0N__GPMI_CE0N | |
263 | MX28_PAD_GPMI_RDY0__GPMI_READY0 | |
264 | MX28_PAD_GPMI_RDN__GPMI_RDN | |
265 | MX28_PAD_GPMI_WRN__GPMI_WRN | |
266 | MX28_PAD_GPMI_ALE__GPMI_ALE | |
267 | MX28_PAD_GPMI_CLE__GPMI_CLE | |
268 | MX28_PAD_GPMI_RESETN__GPMI_RESETN | |
f14da767 | 269 | >; |
4191c340 LW |
270 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
271 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
272 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
7a8e5149 HS |
273 | }; |
274 | ||
275 | gpmi_status_cfg: gpmi-status-cfg { | |
f14da767 | 276 | fsl,pinmux-ids = < |
bc3875f1 LW |
277 | MX28_PAD_GPMI_RDN__GPMI_RDN |
278 | MX28_PAD_GPMI_WRN__GPMI_WRN | |
279 | MX28_PAD_GPMI_RESETN__GPMI_RESETN | |
f14da767 | 280 | >; |
4191c340 | 281 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
7a8e5149 HS |
282 | }; |
283 | ||
80d969e4 FE |
284 | auart0_pins_a: auart0@0 { |
285 | reg = <0>; | |
f14da767 | 286 | fsl,pinmux-ids = < |
bc3875f1 LW |
287 | MX28_PAD_AUART0_RX__AUART0_RX |
288 | MX28_PAD_AUART0_TX__AUART0_TX | |
289 | MX28_PAD_AUART0_CTS__AUART0_CTS | |
290 | MX28_PAD_AUART0_RTS__AUART0_RTS | |
f14da767 | 291 | >; |
4191c340 LW |
292 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
293 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
294 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
8fa62e11 MV |
295 | }; |
296 | ||
297 | auart0_2pins_a: auart0-2pins@0 { | |
298 | reg = <0>; | |
299 | fsl,pinmux-ids = < | |
bc3875f1 LW |
300 | MX28_PAD_AUART0_RX__AUART0_RX |
301 | MX28_PAD_AUART0_TX__AUART0_TX | |
8fa62e11 | 302 | >; |
4191c340 LW |
303 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
304 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
305 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
80d969e4 FE |
306 | }; |
307 | ||
e1a4d18f SG |
308 | auart1_pins_a: auart1@0 { |
309 | reg = <0>; | |
310 | fsl,pinmux-ids = < | |
bc3875f1 LW |
311 | MX28_PAD_AUART1_RX__AUART1_RX |
312 | MX28_PAD_AUART1_TX__AUART1_TX | |
313 | MX28_PAD_AUART1_CTS__AUART1_CTS | |
314 | MX28_PAD_AUART1_RTS__AUART1_RTS | |
e1a4d18f | 315 | >; |
4191c340 LW |
316 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
317 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
318 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
e1a4d18f SG |
319 | }; |
320 | ||
3143bbb4 SG |
321 | auart1_2pins_a: auart1-2pins@0 { |
322 | reg = <0>; | |
323 | fsl,pinmux-ids = < | |
bc3875f1 LW |
324 | MX28_PAD_AUART1_RX__AUART1_RX |
325 | MX28_PAD_AUART1_TX__AUART1_TX | |
3143bbb4 | 326 | >; |
4191c340 LW |
327 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
328 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
329 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
3143bbb4 SG |
330 | }; |
331 | ||
332 | auart2_2pins_a: auart2-2pins@0 { | |
333 | reg = <0>; | |
334 | fsl,pinmux-ids = < | |
bc3875f1 LW |
335 | MX28_PAD_SSP2_SCK__AUART2_RX |
336 | MX28_PAD_SSP2_MOSI__AUART2_TX | |
3143bbb4 | 337 | >; |
4191c340 LW |
338 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
339 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
340 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
3143bbb4 SG |
341 | }; |
342 | ||
f8040cf5 EB |
343 | auart2_2pins_b: auart2-2pins@1 { |
344 | reg = <1>; | |
345 | fsl,pinmux-ids = < | |
bc3875f1 LW |
346 | MX28_PAD_AUART2_RX__AUART2_RX |
347 | MX28_PAD_AUART2_TX__AUART2_TX | |
f8040cf5 | 348 | >; |
4191c340 LW |
349 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
350 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
351 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
f8040cf5 EB |
352 | }; |
353 | ||
cd0214c3 AM |
354 | auart2_pins_a: auart2-pins@0 { |
355 | reg = <0>; | |
356 | fsl,pinmux-ids = < | |
357 | MX28_PAD_AUART2_RX__AUART2_RX | |
358 | MX28_PAD_AUART2_TX__AUART2_TX | |
359 | MX28_PAD_AUART2_CTS__AUART2_CTS | |
360 | MX28_PAD_AUART2_RTS__AUART2_RTS | |
361 | >; | |
362 | fsl,drive-strength = <MXS_DRIVE_4mA>; | |
363 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
364 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
365 | }; | |
366 | ||
80d969e4 FE |
367 | auart3_pins_a: auart3@0 { |
368 | reg = <0>; | |
f14da767 | 369 | fsl,pinmux-ids = < |
bc3875f1 LW |
370 | MX28_PAD_AUART3_RX__AUART3_RX |
371 | MX28_PAD_AUART3_TX__AUART3_TX | |
372 | MX28_PAD_AUART3_CTS__AUART3_CTS | |
373 | MX28_PAD_AUART3_RTS__AUART3_RTS | |
f14da767 | 374 | >; |
4191c340 LW |
375 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
376 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
377 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
80d969e4 FE |
378 | }; |
379 | ||
3143bbb4 SG |
380 | auart3_2pins_a: auart3-2pins@0 { |
381 | reg = <0>; | |
382 | fsl,pinmux-ids = < | |
bc3875f1 LW |
383 | MX28_PAD_SSP2_MISO__AUART3_RX |
384 | MX28_PAD_SSP2_SS0__AUART3_TX | |
3143bbb4 | 385 | >; |
4191c340 LW |
386 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
387 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
388 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
3143bbb4 SG |
389 | }; |
390 | ||
4812e746 EB |
391 | auart3_2pins_b: auart3-2pins@1 { |
392 | reg = <1>; | |
393 | fsl,pinmux-ids = < | |
bc3875f1 LW |
394 | MX28_PAD_AUART3_RX__AUART3_RX |
395 | MX28_PAD_AUART3_TX__AUART3_TX | |
4812e746 | 396 | >; |
4191c340 LW |
397 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
398 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
399 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
4812e746 EB |
400 | }; |
401 | ||
33678d12 EB |
402 | auart4_2pins_a: auart4@0 { |
403 | reg = <0>; | |
404 | fsl,pinmux-ids = < | |
bc3875f1 LW |
405 | MX28_PAD_SSP3_SCK__AUART4_TX |
406 | MX28_PAD_SSP3_MOSI__AUART4_RX | |
33678d12 | 407 | >; |
4191c340 LW |
408 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
409 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
410 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
33678d12 EB |
411 | }; |
412 | ||
cfa1dd99 MR |
413 | auart4_2pins_b: auart4@1 { |
414 | reg = <1>; | |
415 | fsl,pinmux-ids = < | |
416 | MX28_PAD_AUART0_CTS__AUART4_RX | |
417 | MX28_PAD_AUART0_RTS__AUART4_TX | |
418 | >; | |
419 | fsl,drive-strength = <MXS_DRIVE_4mA>; | |
420 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
421 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
422 | }; | |
423 | ||
bc3a59c1 DA |
424 | mac0_pins_a: mac0@0 { |
425 | reg = <0>; | |
f14da767 | 426 | fsl,pinmux-ids = < |
bc3875f1 LW |
427 | MX28_PAD_ENET0_MDC__ENET0_MDC |
428 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | |
429 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | |
430 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | |
431 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | |
432 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | |
433 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | |
434 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | |
435 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | |
f14da767 | 436 | >; |
4191c340 LW |
437 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
438 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
439 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
bc3a59c1 DA |
440 | }; |
441 | ||
9eb7db1c UKK |
442 | mac0_pins_b: mac0@1 { |
443 | reg = <1>; | |
444 | fsl,pinmux-ids = < | |
445 | MX28_PAD_ENET0_MDC__ENET0_MDC | |
446 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | |
447 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | |
448 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | |
449 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | |
450 | MX28_PAD_ENET0_RXD2__ENET0_RXD2 | |
451 | MX28_PAD_ENET0_RXD3__ENET0_RXD3 | |
452 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | |
453 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | |
454 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | |
455 | MX28_PAD_ENET0_TXD2__ENET0_TXD2 | |
456 | MX28_PAD_ENET0_TXD3__ENET0_TXD3 | |
457 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | |
458 | MX28_PAD_ENET0_COL__ENET0_COL | |
459 | MX28_PAD_ENET0_CRS__ENET0_CRS | |
460 | MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK | |
461 | MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK | |
462 | >; | |
463 | fsl,drive-strength = <MXS_DRIVE_8mA>; | |
464 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
465 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
466 | }; | |
467 | ||
bc3a59c1 DA |
468 | mac1_pins_a: mac1@0 { |
469 | reg = <0>; | |
f14da767 | 470 | fsl,pinmux-ids = < |
bc3875f1 LW |
471 | MX28_PAD_ENET0_CRS__ENET1_RX_EN |
472 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 | |
473 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 | |
474 | MX28_PAD_ENET0_COL__ENET1_TX_EN | |
475 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 | |
476 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 | |
f14da767 | 477 | >; |
4191c340 LW |
478 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
479 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
480 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
bc3a59c1 | 481 | }; |
35d23047 SG |
482 | |
483 | mmc0_8bit_pins_a: mmc0-8bit@0 { | |
484 | reg = <0>; | |
f14da767 | 485 | fsl,pinmux-ids = < |
bc3875f1 LW |
486 | MX28_PAD_SSP0_DATA0__SSP0_D0 |
487 | MX28_PAD_SSP0_DATA1__SSP0_D1 | |
488 | MX28_PAD_SSP0_DATA2__SSP0_D2 | |
489 | MX28_PAD_SSP0_DATA3__SSP0_D3 | |
490 | MX28_PAD_SSP0_DATA4__SSP0_D4 | |
491 | MX28_PAD_SSP0_DATA5__SSP0_D5 | |
492 | MX28_PAD_SSP0_DATA6__SSP0_D6 | |
493 | MX28_PAD_SSP0_DATA7__SSP0_D7 | |
494 | MX28_PAD_SSP0_CMD__SSP0_CMD | |
495 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | |
496 | MX28_PAD_SSP0_SCK__SSP0_SCK | |
f14da767 | 497 | >; |
4191c340 LW |
498 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
499 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
500 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
35d23047 SG |
501 | }; |
502 | ||
8385e7c1 MR |
503 | mmc0_4bit_pins_a: mmc0-4bit@0 { |
504 | reg = <0>; | |
f14da767 | 505 | fsl,pinmux-ids = < |
bc3875f1 LW |
506 | MX28_PAD_SSP0_DATA0__SSP0_D0 |
507 | MX28_PAD_SSP0_DATA1__SSP0_D1 | |
508 | MX28_PAD_SSP0_DATA2__SSP0_D2 | |
509 | MX28_PAD_SSP0_DATA3__SSP0_D3 | |
510 | MX28_PAD_SSP0_CMD__SSP0_CMD | |
511 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | |
512 | MX28_PAD_SSP0_SCK__SSP0_SCK | |
f14da767 | 513 | >; |
4191c340 LW |
514 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
515 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
516 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
8385e7c1 MR |
517 | }; |
518 | ||
35d23047 | 519 | mmc0_cd_cfg: mmc0-cd-cfg { |
f14da767 | 520 | fsl,pinmux-ids = < |
bc3875f1 | 521 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
f14da767 | 522 | >; |
4191c340 | 523 | fsl,pull-up = <MXS_PULL_DISABLE>; |
35d23047 SG |
524 | }; |
525 | ||
526 | mmc0_sck_cfg: mmc0-sck-cfg { | |
f14da767 | 527 | fsl,pinmux-ids = < |
bc3875f1 | 528 | MX28_PAD_SSP0_SCK__SSP0_SCK |
f14da767 | 529 | >; |
4191c340 LW |
530 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
531 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
35d23047 | 532 | }; |
2a96e391 | 533 | |
77d6386b MKB |
534 | mmc1_4bit_pins_a: mmc1-4bit@0 { |
535 | reg = <0>; | |
536 | fsl,pinmux-ids = < | |
537 | MX28_PAD_GPMI_D00__SSP1_D0 | |
538 | MX28_PAD_GPMI_D01__SSP1_D1 | |
539 | MX28_PAD_GPMI_D02__SSP1_D2 | |
540 | MX28_PAD_GPMI_D03__SSP1_D3 | |
541 | MX28_PAD_GPMI_RDY1__SSP1_CMD | |
542 | MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT | |
543 | MX28_PAD_GPMI_WRN__SSP1_SCK | |
544 | >; | |
545 | fsl,drive-strength = <MXS_DRIVE_8mA>; | |
546 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
547 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
548 | }; | |
549 | ||
550 | mmc1_cd_cfg: mmc1-cd-cfg { | |
551 | fsl,pinmux-ids = < | |
552 | MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT | |
553 | >; | |
554 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
555 | }; | |
556 | ||
557 | mmc1_sck_cfg: mmc1-sck-cfg { | |
558 | fsl,pinmux-ids = < | |
559 | MX28_PAD_GPMI_WRN__SSP1_SCK | |
560 | >; | |
561 | fsl,drive-strength = <MXS_DRIVE_12mA>; | |
562 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
563 | }; | |
564 | ||
565 | ||
5550e8e9 MV |
566 | mmc2_4bit_pins_a: mmc2-4bit@0 { |
567 | reg = <0>; | |
568 | fsl,pinmux-ids = < | |
569 | MX28_PAD_SSP0_DATA4__SSP2_D0 | |
570 | MX28_PAD_SSP1_SCK__SSP2_D1 | |
571 | MX28_PAD_SSP1_CMD__SSP2_D2 | |
572 | MX28_PAD_SSP0_DATA5__SSP2_D3 | |
573 | MX28_PAD_SSP0_DATA6__SSP2_CMD | |
574 | MX28_PAD_AUART1_RX__SSP2_CARD_DETECT | |
575 | MX28_PAD_SSP0_DATA7__SSP2_SCK | |
576 | >; | |
577 | fsl,drive-strength = <MXS_DRIVE_8mA>; | |
578 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
579 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
580 | }; | |
581 | ||
582 | mmc2_cd_cfg: mmc2-cd-cfg { | |
583 | fsl,pinmux-ids = < | |
584 | MX28_PAD_AUART1_RX__SSP2_CARD_DETECT | |
585 | >; | |
586 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
587 | }; | |
588 | ||
589 | mmc2_sck_cfg: mmc2-sck-cfg { | |
590 | fsl,pinmux-ids = < | |
591 | MX28_PAD_SSP0_DATA7__SSP2_SCK | |
592 | >; | |
593 | fsl,drive-strength = <MXS_DRIVE_12mA>; | |
594 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
35d23047 | 595 | }; |
2a96e391 SG |
596 | |
597 | i2c0_pins_a: i2c0@0 { | |
598 | reg = <0>; | |
f14da767 | 599 | fsl,pinmux-ids = < |
bc3875f1 LW |
600 | MX28_PAD_I2C0_SCL__I2C0_SCL |
601 | MX28_PAD_I2C0_SDA__I2C0_SDA | |
f14da767 | 602 | >; |
4191c340 LW |
603 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
604 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
605 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
2a96e391 | 606 | }; |
530f1d41 | 607 | |
5c697ea2 MR |
608 | i2c0_pins_b: i2c0@1 { |
609 | reg = <1>; | |
610 | fsl,pinmux-ids = < | |
bc3875f1 LW |
611 | MX28_PAD_AUART0_RX__I2C0_SCL |
612 | MX28_PAD_AUART0_TX__I2C0_SDA | |
5c697ea2 | 613 | >; |
4191c340 LW |
614 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
615 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
616 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
5c697ea2 MR |
617 | }; |
618 | ||
de7e934f MR |
619 | i2c1_pins_a: i2c1@0 { |
620 | reg = <0>; | |
621 | fsl,pinmux-ids = < | |
bc3875f1 LW |
622 | MX28_PAD_PWM0__I2C1_SCL |
623 | MX28_PAD_PWM1__I2C1_SDA | |
de7e934f | 624 | >; |
4191c340 LW |
625 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
626 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
627 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
de7e934f MR |
628 | }; |
629 | ||
17c63dd0 UKK |
630 | i2c1_pins_b: i2c1@1 { |
631 | reg = <1>; | |
632 | fsl,pinmux-ids = < | |
633 | MX28_PAD_AUART2_CTS__I2C1_SCL | |
634 | MX28_PAD_AUART2_RTS__I2C1_SDA | |
635 | >; | |
636 | fsl,drive-strength = <MXS_DRIVE_8mA>; | |
637 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
638 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
639 | }; | |
640 | ||
530f1d41 SG |
641 | saif0_pins_a: saif0@0 { |
642 | reg = <0>; | |
f14da767 | 643 | fsl,pinmux-ids = < |
bc3875f1 LW |
644 | MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
645 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK | |
646 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK | |
647 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 | |
f14da767 | 648 | >; |
4191c340 LW |
649 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
650 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
651 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
530f1d41 SG |
652 | }; |
653 | ||
2e1dd9fc LW |
654 | saif0_pins_b: saif0@1 { |
655 | reg = <1>; | |
656 | fsl,pinmux-ids = < | |
bc3875f1 LW |
657 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
658 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK | |
659 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 | |
2e1dd9fc | 660 | >; |
4191c340 LW |
661 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
662 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
663 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
2e1dd9fc LW |
664 | }; |
665 | ||
530f1d41 SG |
666 | saif1_pins_a: saif1@0 { |
667 | reg = <0>; | |
f14da767 | 668 | fsl,pinmux-ids = < |
bc3875f1 | 669 | MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
f14da767 | 670 | >; |
4191c340 LW |
671 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
672 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
673 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
530f1d41 | 674 | }; |
52f7176b | 675 | |
e1a4d18f SG |
676 | pwm0_pins_a: pwm0@0 { |
677 | reg = <0>; | |
678 | fsl,pinmux-ids = < | |
bc3875f1 | 679 | MX28_PAD_PWM0__PWM_0 |
e1a4d18f | 680 | >; |
4191c340 LW |
681 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
682 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
683 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
e1a4d18f SG |
684 | }; |
685 | ||
52f7176b SG |
686 | pwm2_pins_a: pwm2@0 { |
687 | reg = <0>; | |
688 | fsl,pinmux-ids = < | |
bc3875f1 | 689 | MX28_PAD_PWM2__PWM_2 |
52f7176b | 690 | >; |
4191c340 LW |
691 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
692 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
693 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
52f7176b | 694 | }; |
a915ee42 | 695 | |
2bde51cb JB |
696 | pwm3_pins_a: pwm3@0 { |
697 | reg = <0>; | |
698 | fsl,pinmux-ids = < | |
bc3875f1 | 699 | MX28_PAD_PWM3__PWM_3 |
2bde51cb | 700 | >; |
4191c340 LW |
701 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
702 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
703 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
2bde51cb JB |
704 | }; |
705 | ||
d248620c MR |
706 | pwm3_pins_b: pwm3@1 { |
707 | reg = <1>; | |
708 | fsl,pinmux-ids = < | |
bc3875f1 | 709 | MX28_PAD_SAIF0_MCLK__PWM_3 |
d248620c | 710 | >; |
4191c340 LW |
711 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
712 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
713 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
d248620c MR |
714 | }; |
715 | ||
2f44211f MR |
716 | pwm4_pins_a: pwm4@0 { |
717 | reg = <0>; | |
718 | fsl,pinmux-ids = < | |
bc3875f1 | 719 | MX28_PAD_PWM4__PWM_4 |
2f44211f | 720 | >; |
4191c340 LW |
721 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
722 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
723 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
2f44211f MR |
724 | }; |
725 | ||
a915ee42 SG |
726 | lcdif_24bit_pins_a: lcdif-24bit@0 { |
727 | reg = <0>; | |
728 | fsl,pinmux-ids = < | |
bc3875f1 LW |
729 | MX28_PAD_LCD_D00__LCD_D0 |
730 | MX28_PAD_LCD_D01__LCD_D1 | |
731 | MX28_PAD_LCD_D02__LCD_D2 | |
732 | MX28_PAD_LCD_D03__LCD_D3 | |
733 | MX28_PAD_LCD_D04__LCD_D4 | |
734 | MX28_PAD_LCD_D05__LCD_D5 | |
735 | MX28_PAD_LCD_D06__LCD_D6 | |
736 | MX28_PAD_LCD_D07__LCD_D7 | |
737 | MX28_PAD_LCD_D08__LCD_D8 | |
738 | MX28_PAD_LCD_D09__LCD_D9 | |
739 | MX28_PAD_LCD_D10__LCD_D10 | |
740 | MX28_PAD_LCD_D11__LCD_D11 | |
741 | MX28_PAD_LCD_D12__LCD_D12 | |
742 | MX28_PAD_LCD_D13__LCD_D13 | |
743 | MX28_PAD_LCD_D14__LCD_D14 | |
744 | MX28_PAD_LCD_D15__LCD_D15 | |
745 | MX28_PAD_LCD_D16__LCD_D16 | |
746 | MX28_PAD_LCD_D17__LCD_D17 | |
747 | MX28_PAD_LCD_D18__LCD_D18 | |
748 | MX28_PAD_LCD_D19__LCD_D19 | |
749 | MX28_PAD_LCD_D20__LCD_D20 | |
750 | MX28_PAD_LCD_D21__LCD_D21 | |
751 | MX28_PAD_LCD_D22__LCD_D22 | |
752 | MX28_PAD_LCD_D23__LCD_D23 | |
a915ee42 | 753 | >; |
4191c340 LW |
754 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
755 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
756 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
a915ee42 | 757 | }; |
6ca44acf | 758 | |
ec985eb2 DC |
759 | lcdif_18bit_pins_a: lcdif-18bit@0 { |
760 | reg = <0>; | |
761 | fsl,pinmux-ids = < | |
762 | MX28_PAD_LCD_D00__LCD_D0 | |
763 | MX28_PAD_LCD_D01__LCD_D1 | |
764 | MX28_PAD_LCD_D02__LCD_D2 | |
765 | MX28_PAD_LCD_D03__LCD_D3 | |
766 | MX28_PAD_LCD_D04__LCD_D4 | |
767 | MX28_PAD_LCD_D05__LCD_D5 | |
768 | MX28_PAD_LCD_D06__LCD_D6 | |
769 | MX28_PAD_LCD_D07__LCD_D7 | |
770 | MX28_PAD_LCD_D08__LCD_D8 | |
771 | MX28_PAD_LCD_D09__LCD_D9 | |
772 | MX28_PAD_LCD_D10__LCD_D10 | |
773 | MX28_PAD_LCD_D11__LCD_D11 | |
774 | MX28_PAD_LCD_D12__LCD_D12 | |
775 | MX28_PAD_LCD_D13__LCD_D13 | |
776 | MX28_PAD_LCD_D14__LCD_D14 | |
777 | MX28_PAD_LCD_D15__LCD_D15 | |
778 | MX28_PAD_LCD_D16__LCD_D16 | |
779 | MX28_PAD_LCD_D17__LCD_D17 | |
780 | >; | |
781 | fsl,drive-strength = <MXS_DRIVE_4mA>; | |
782 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
783 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
784 | }; | |
785 | ||
4ced2a40 GGM |
786 | lcdif_16bit_pins_a: lcdif-16bit@0 { |
787 | reg = <0>; | |
788 | fsl,pinmux-ids = < | |
bc3875f1 LW |
789 | MX28_PAD_LCD_D00__LCD_D0 |
790 | MX28_PAD_LCD_D01__LCD_D1 | |
791 | MX28_PAD_LCD_D02__LCD_D2 | |
792 | MX28_PAD_LCD_D03__LCD_D3 | |
793 | MX28_PAD_LCD_D04__LCD_D4 | |
794 | MX28_PAD_LCD_D05__LCD_D5 | |
795 | MX28_PAD_LCD_D06__LCD_D6 | |
796 | MX28_PAD_LCD_D07__LCD_D7 | |
797 | MX28_PAD_LCD_D08__LCD_D8 | |
798 | MX28_PAD_LCD_D09__LCD_D9 | |
799 | MX28_PAD_LCD_D10__LCD_D10 | |
800 | MX28_PAD_LCD_D11__LCD_D11 | |
801 | MX28_PAD_LCD_D12__LCD_D12 | |
802 | MX28_PAD_LCD_D13__LCD_D13 | |
803 | MX28_PAD_LCD_D14__LCD_D14 | |
804 | MX28_PAD_LCD_D15__LCD_D15 | |
4ced2a40 | 805 | >; |
4191c340 LW |
806 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
807 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
808 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
4ced2a40 GGM |
809 | }; |
810 | ||
23ad6f65 LW |
811 | lcdif_sync_pins_a: lcdif-sync@0 { |
812 | reg = <0>; | |
813 | fsl,pinmux-ids = < | |
bc3875f1 LW |
814 | MX28_PAD_LCD_RS__LCD_DOTCLK |
815 | MX28_PAD_LCD_CS__LCD_ENABLE | |
816 | MX28_PAD_LCD_RD_E__LCD_VSYNC | |
817 | MX28_PAD_LCD_WR_RWN__LCD_HSYNC | |
23ad6f65 | 818 | >; |
4191c340 LW |
819 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
820 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
821 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
23ad6f65 LW |
822 | }; |
823 | ||
6ca44acf SG |
824 | can0_pins_a: can0@0 { |
825 | reg = <0>; | |
826 | fsl,pinmux-ids = < | |
bc3875f1 LW |
827 | MX28_PAD_GPMI_RDY2__CAN0_TX |
828 | MX28_PAD_GPMI_RDY3__CAN0_RX | |
6ca44acf | 829 | >; |
4191c340 LW |
830 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
831 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
832 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
6ca44acf SG |
833 | }; |
834 | ||
835 | can1_pins_a: can1@0 { | |
836 | reg = <0>; | |
837 | fsl,pinmux-ids = < | |
bc3875f1 LW |
838 | MX28_PAD_GPMI_CE2N__CAN1_TX |
839 | MX28_PAD_GPMI_CE3N__CAN1_RX | |
6ca44acf | 840 | >; |
4191c340 LW |
841 | fsl,drive-strength = <MXS_DRIVE_4mA>; |
842 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
843 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
6ca44acf | 844 | }; |
7f122213 MV |
845 | |
846 | spi2_pins_a: spi2@0 { | |
847 | reg = <0>; | |
848 | fsl,pinmux-ids = < | |
bc3875f1 LW |
849 | MX28_PAD_SSP2_SCK__SSP2_SCK |
850 | MX28_PAD_SSP2_MOSI__SSP2_CMD | |
851 | MX28_PAD_SSP2_MISO__SSP2_D0 | |
852 | MX28_PAD_SSP2_SS0__SSP2_D3 | |
7f122213 | 853 | >; |
4191c340 LW |
854 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
855 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
856 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
7f122213 | 857 | }; |
bb2f1261 | 858 | |
3314d2be LW |
859 | spi3_pins_a: spi3@0 { |
860 | reg = <0>; | |
861 | fsl,pinmux-ids = < | |
bc3875f1 LW |
862 | MX28_PAD_AUART2_RX__SSP3_D4 |
863 | MX28_PAD_AUART2_TX__SSP3_D5 | |
864 | MX28_PAD_SSP3_SCK__SSP3_SCK | |
865 | MX28_PAD_SSP3_MOSI__SSP3_CMD | |
866 | MX28_PAD_SSP3_MISO__SSP3_D0 | |
867 | MX28_PAD_SSP3_SS0__SSP3_D3 | |
3314d2be | 868 | >; |
4191c340 LW |
869 | fsl,drive-strength = <MXS_DRIVE_8mA>; |
870 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
871 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
3314d2be LW |
872 | }; |
873 | ||
8f0b07a4 UKK |
874 | spi3_pins_b: spi3@1 { |
875 | reg = <1>; | |
876 | fsl,pinmux-ids = < | |
877 | MX28_PAD_SSP3_SCK__SSP3_SCK | |
878 | MX28_PAD_SSP3_MOSI__SSP3_CMD | |
879 | MX28_PAD_SSP3_MISO__SSP3_D0 | |
880 | MX28_PAD_SSP3_SS0__SSP3_D3 | |
881 | >; | |
882 | fsl,drive-strength = <MXS_DRIVE_8mA>; | |
883 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
884 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
885 | }; | |
886 | ||
c8e42bc9 | 887 | usb0_pins_a: usb0@0 { |
bb2f1261 MV |
888 | reg = <0>; |
889 | fsl,pinmux-ids = < | |
bc3875f1 | 890 | MX28_PAD_SSP2_SS2__USB0_OVERCURRENT |
bb2f1261 | 891 | >; |
4191c340 LW |
892 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
893 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
894 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
bb2f1261 MV |
895 | }; |
896 | ||
c8e42bc9 | 897 | usb0_pins_b: usb0@1 { |
bb2f1261 MV |
898 | reg = <1>; |
899 | fsl,pinmux-ids = < | |
bc3875f1 | 900 | MX28_PAD_AUART1_CTS__USB0_OVERCURRENT |
bb2f1261 | 901 | >; |
4191c340 LW |
902 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
903 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
904 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
bb2f1261 MV |
905 | }; |
906 | ||
c8e42bc9 | 907 | usb1_pins_a: usb1@0 { |
bb2f1261 MV |
908 | reg = <0>; |
909 | fsl,pinmux-ids = < | |
bc3875f1 | 910 | MX28_PAD_SSP2_SS1__USB1_OVERCURRENT |
bb2f1261 | 911 | >; |
4191c340 LW |
912 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
913 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
914 | fsl,pull-up = <MXS_PULL_DISABLE>; | |
bb2f1261 | 915 | }; |
69c02f95 FE |
916 | |
917 | usb0_id_pins_a: usb0id@0 { | |
918 | reg = <0>; | |
919 | fsl,pinmux-ids = < | |
e96e1782 | 920 | MX28_PAD_AUART1_RTS__USB0_ID |
bb2f1261 | 921 | >; |
e96e1782 LW |
922 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
923 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
924 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
bb2f1261 | 925 | }; |
bb89b8d2 DC |
926 | |
927 | usb0_id_pins_b: usb0id1@0 { | |
928 | reg = <0>; | |
929 | fsl,pinmux-ids = < | |
930 | MX28_PAD_PWM2__USB0_ID | |
931 | >; | |
932 | fsl,drive-strength = <MXS_DRIVE_12mA>; | |
933 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | |
934 | fsl,pull-up = <MXS_PULL_ENABLE>; | |
935 | }; | |
936 | ||
bc3a59c1 DA |
937 | }; |
938 | ||
296f8cd3 | 939 | digctl: digctl@8001c000 { |
115581cf | 940 | compatible = "fsl,imx28-digctl", "fsl,imx23-digctl"; |
0f06cde7 | 941 | reg = <0x8001c000 0x2000>; |
bc3a59c1 DA |
942 | interrupts = <89>; |
943 | status = "disabled"; | |
944 | }; | |
945 | ||
296f8cd3 | 946 | etm: etm@80022000 { |
0f06cde7 | 947 | reg = <0x80022000 0x2000>; |
bc3a59c1 DA |
948 | status = "disabled"; |
949 | }; | |
950 | ||
f30fb03d | 951 | dma_apbx: dma-apbx@80024000 { |
84f3570a | 952 | compatible = "fsl,imx28-dma-apbx"; |
0f06cde7 | 953 | reg = <0x80024000 0x2000>; |
f30fb03d SG |
954 | interrupts = <78 79 66 0 |
955 | 80 81 68 69 | |
956 | 70 71 72 73 | |
957 | 74 75 76 77>; | |
4ada77e3 | 958 | interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty", |
f30fb03d SG |
959 | "saif0", "saif1", "i2c0", "i2c1", |
960 | "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", | |
961 | "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; | |
962 | #dma-cells = <1>; | |
963 | dma-channels = <16>; | |
b598b9f3 | 964 | clocks = <&clks 26>; |
bc3a59c1 DA |
965 | }; |
966 | ||
296f8cd3 | 967 | dcp: dcp@80028000 { |
7d56a28f | 968 | compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; |
0f06cde7 | 969 | reg = <0x80028000 0x2000>; |
bc3a59c1 | 970 | interrupts = <52 53 54>; |
7d56a28f | 971 | status = "okay"; |
bc3a59c1 DA |
972 | }; |
973 | ||
296f8cd3 | 974 | pxp: pxp@8002a000 { |
0f06cde7 | 975 | reg = <0x8002a000 0x2000>; |
bc3a59c1 DA |
976 | interrupts = <39>; |
977 | status = "disabled"; | |
978 | }; | |
979 | ||
296f8cd3 | 980 | ocotp: ocotp@8002c000 { |
a7be1e68 SW |
981 | compatible = "fsl,imx28-ocotp", "fsl,ocotp"; |
982 | #address-cells = <1>; | |
983 | #size-cells = <1>; | |
0f06cde7 | 984 | reg = <0x8002c000 0x2000>; |
a7be1e68 | 985 | clocks = <&clks 25>; |
bc3a59c1 DA |
986 | }; |
987 | ||
988 | axi-ahb@8002e000 { | |
0f06cde7 | 989 | reg = <0x8002e000 0x2000>; |
bc3a59c1 DA |
990 | status = "disabled"; |
991 | }; | |
992 | ||
296f8cd3 | 993 | lcdif: lcdif@80030000 { |
a915ee42 | 994 | compatible = "fsl,imx28-lcdif"; |
0f06cde7 | 995 | reg = <0x80030000 0x2000>; |
7f2b9288 | 996 | interrupts = <38>; |
b598b9f3 | 997 | clocks = <&clks 55>; |
f30fb03d SG |
998 | dmas = <&dma_apbh 13>; |
999 | dma-names = "rx"; | |
bc3a59c1 DA |
1000 | status = "disabled"; |
1001 | }; | |
1002 | ||
1003 | can0: can@80032000 { | |
6ca44acf | 1004 | compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; |
0f06cde7 | 1005 | reg = <0x80032000 0x2000>; |
bc3a59c1 | 1006 | interrupts = <8>; |
b598b9f3 SG |
1007 | clocks = <&clks 58>, <&clks 58>; |
1008 | clock-names = "ipg", "per"; | |
bc3a59c1 DA |
1009 | status = "disabled"; |
1010 | }; | |
1011 | ||
1012 | can1: can@80034000 { | |
6ca44acf | 1013 | compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; |
0f06cde7 | 1014 | reg = <0x80034000 0x2000>; |
bc3a59c1 | 1015 | interrupts = <9>; |
b598b9f3 SG |
1016 | clocks = <&clks 59>, <&clks 59>; |
1017 | clock-names = "ipg", "per"; | |
bc3a59c1 DA |
1018 | status = "disabled"; |
1019 | }; | |
1020 | ||
296f8cd3 | 1021 | simdbg: simdbg@8003c000 { |
0f06cde7 | 1022 | reg = <0x8003c000 0x200>; |
bc3a59c1 DA |
1023 | status = "disabled"; |
1024 | }; | |
1025 | ||
296f8cd3 | 1026 | simgpmisel: simgpmisel@8003c200 { |
0f06cde7 | 1027 | reg = <0x8003c200 0x100>; |
bc3a59c1 DA |
1028 | status = "disabled"; |
1029 | }; | |
1030 | ||
296f8cd3 | 1031 | simsspsel: simsspsel@8003c300 { |
0f06cde7 | 1032 | reg = <0x8003c300 0x100>; |
bc3a59c1 DA |
1033 | status = "disabled"; |
1034 | }; | |
1035 | ||
296f8cd3 | 1036 | simmemsel: simmemsel@8003c400 { |
0f06cde7 | 1037 | reg = <0x8003c400 0x100>; |
bc3a59c1 DA |
1038 | status = "disabled"; |
1039 | }; | |
1040 | ||
296f8cd3 | 1041 | gpiomon: gpiomon@8003c500 { |
0f06cde7 | 1042 | reg = <0x8003c500 0x100>; |
bc3a59c1 DA |
1043 | status = "disabled"; |
1044 | }; | |
1045 | ||
296f8cd3 | 1046 | simenet: simenet@8003c700 { |
0f06cde7 | 1047 | reg = <0x8003c700 0x100>; |
bc3a59c1 DA |
1048 | status = "disabled"; |
1049 | }; | |
1050 | ||
296f8cd3 | 1051 | armjtag: armjtag@8003c800 { |
0f06cde7 | 1052 | reg = <0x8003c800 0x100>; |
bc3a59c1 DA |
1053 | status = "disabled"; |
1054 | }; | |
07a3ce7f | 1055 | }; |
bc3a59c1 DA |
1056 | |
1057 | apbx@80040000 { | |
1058 | compatible = "simple-bus"; | |
1059 | #address-cells = <1>; | |
1060 | #size-cells = <1>; | |
1061 | reg = <0x80040000 0x40000>; | |
1062 | ranges; | |
1063 | ||
b598b9f3 | 1064 | clks: clkctrl@80040000 { |
8f7cf881 | 1065 | compatible = "fsl,imx28-clkctrl", "fsl,clkctrl"; |
0f06cde7 | 1066 | reg = <0x80040000 0x2000>; |
b598b9f3 | 1067 | #clock-cells = <1>; |
bc3a59c1 DA |
1068 | }; |
1069 | ||
1070 | saif0: saif@80042000 { | |
530f1d41 | 1071 | compatible = "fsl,imx28-saif"; |
0f06cde7 | 1072 | reg = <0x80042000 0x2000>; |
7f2b9288 | 1073 | interrupts = <59>; |
66acaf3f | 1074 | #clock-cells = <0>; |
b598b9f3 | 1075 | clocks = <&clks 53>; |
f30fb03d SG |
1076 | dmas = <&dma_apbx 4>; |
1077 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
1078 | status = "disabled"; |
1079 | }; | |
1080 | ||
296f8cd3 | 1081 | power: power@80044000 { |
0f06cde7 | 1082 | reg = <0x80044000 0x2000>; |
bc3a59c1 DA |
1083 | status = "disabled"; |
1084 | }; | |
1085 | ||
1086 | saif1: saif@80046000 { | |
530f1d41 | 1087 | compatible = "fsl,imx28-saif"; |
0f06cde7 | 1088 | reg = <0x80046000 0x2000>; |
7f2b9288 | 1089 | interrupts = <58>; |
b598b9f3 | 1090 | clocks = <&clks 54>; |
f30fb03d SG |
1091 | dmas = <&dma_apbx 5>; |
1092 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
1093 | status = "disabled"; |
1094 | }; | |
1095 | ||
296f8cd3 | 1096 | lradc: lradc@80050000 { |
aef35104 | 1097 | compatible = "fsl,imx28-lradc"; |
0f06cde7 | 1098 | reg = <0x80050000 0x2000>; |
aef35104 MV |
1099 | interrupts = <10 14 15 16 17 18 19 |
1100 | 20 21 22 23 24 25>; | |
bc3a59c1 | 1101 | status = "disabled"; |
18da755d | 1102 | clocks = <&clks 41>; |
40dde681 | 1103 | #io-channel-cells = <1>; |
bc3a59c1 DA |
1104 | }; |
1105 | ||
296f8cd3 | 1106 | spdif: spdif@80054000 { |
0f06cde7 | 1107 | reg = <0x80054000 0x2000>; |
7f2b9288 | 1108 | interrupts = <45>; |
f30fb03d SG |
1109 | dmas = <&dma_apbx 2>; |
1110 | dma-names = "tx"; | |
bc3a59c1 DA |
1111 | status = "disabled"; |
1112 | }; | |
1113 | ||
296f8cd3 | 1114 | mxs_rtc: rtc@80056000 { |
f98c990c | 1115 | compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; |
0f06cde7 | 1116 | reg = <0x80056000 0x2000>; |
f98c990c | 1117 | interrupts = <29>; |
bc3a59c1 DA |
1118 | }; |
1119 | ||
1120 | i2c0: i2c@80058000 { | |
2a96e391 SG |
1121 | #address-cells = <1>; |
1122 | #size-cells = <0>; | |
1123 | compatible = "fsl,imx28-i2c"; | |
0f06cde7 | 1124 | reg = <0x80058000 0x2000>; |
7f2b9288 | 1125 | interrupts = <111>; |
cd4f2d4a | 1126 | clock-frequency = <100000>; |
f30fb03d SG |
1127 | dmas = <&dma_apbx 6>; |
1128 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
1129 | status = "disabled"; |
1130 | }; | |
1131 | ||
1132 | i2c1: i2c@8005a000 { | |
2a96e391 SG |
1133 | #address-cells = <1>; |
1134 | #size-cells = <0>; | |
1135 | compatible = "fsl,imx28-i2c"; | |
0f06cde7 | 1136 | reg = <0x8005a000 0x2000>; |
7f2b9288 | 1137 | interrupts = <110>; |
cd4f2d4a | 1138 | clock-frequency = <100000>; |
f30fb03d SG |
1139 | dmas = <&dma_apbx 7>; |
1140 | dma-names = "rx-tx"; | |
bc3a59c1 DA |
1141 | status = "disabled"; |
1142 | }; | |
1143 | ||
52f7176b SG |
1144 | pwm: pwm@80064000 { |
1145 | compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; | |
0f06cde7 | 1146 | reg = <0x80064000 0x2000>; |
b598b9f3 | 1147 | clocks = <&clks 44>; |
52f7176b SG |
1148 | #pwm-cells = <2>; |
1149 | fsl,pwm-number = <8>; | |
bc3a59c1 DA |
1150 | status = "disabled"; |
1151 | }; | |
1152 | ||
296f8cd3 | 1153 | timer: timrot@80068000 { |
eeca6e60 | 1154 | compatible = "fsl,imx28-timrot", "fsl,timrot"; |
0f06cde7 | 1155 | reg = <0x80068000 0x2000>; |
eeca6e60 | 1156 | interrupts = <48 49 50 51>; |
2efb9504 | 1157 | clocks = <&clks 26>; |
bc3a59c1 DA |
1158 | }; |
1159 | ||
1160 | auart0: serial@8006a000 { | |
80d969e4 | 1161 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 1162 | reg = <0x8006a000 0x2000>; |
7f2b9288 | 1163 | interrupts = <112>; |
f30fb03d SG |
1164 | dmas = <&dma_apbx 8>, <&dma_apbx 9>; |
1165 | dma-names = "rx", "tx"; | |
b598b9f3 | 1166 | clocks = <&clks 45>; |
bc3a59c1 DA |
1167 | status = "disabled"; |
1168 | }; | |
1169 | ||
1170 | auart1: serial@8006c000 { | |
80d969e4 | 1171 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 1172 | reg = <0x8006c000 0x2000>; |
7f2b9288 | 1173 | interrupts = <113>; |
f30fb03d SG |
1174 | dmas = <&dma_apbx 10>, <&dma_apbx 11>; |
1175 | dma-names = "rx", "tx"; | |
b598b9f3 | 1176 | clocks = <&clks 45>; |
bc3a59c1 DA |
1177 | status = "disabled"; |
1178 | }; | |
1179 | ||
1180 | auart2: serial@8006e000 { | |
80d969e4 | 1181 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 1182 | reg = <0x8006e000 0x2000>; |
7f2b9288 | 1183 | interrupts = <114>; |
f30fb03d SG |
1184 | dmas = <&dma_apbx 12>, <&dma_apbx 13>; |
1185 | dma-names = "rx", "tx"; | |
b598b9f3 | 1186 | clocks = <&clks 45>; |
bc3a59c1 DA |
1187 | status = "disabled"; |
1188 | }; | |
1189 | ||
1190 | auart3: serial@80070000 { | |
80d969e4 | 1191 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 1192 | reg = <0x80070000 0x2000>; |
7f2b9288 | 1193 | interrupts = <115>; |
f30fb03d SG |
1194 | dmas = <&dma_apbx 14>, <&dma_apbx 15>; |
1195 | dma-names = "rx", "tx"; | |
b598b9f3 | 1196 | clocks = <&clks 45>; |
bc3a59c1 DA |
1197 | status = "disabled"; |
1198 | }; | |
1199 | ||
1200 | auart4: serial@80072000 { | |
80d969e4 | 1201 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
bc3a59c1 | 1202 | reg = <0x80072000 0x2000>; |
7f2b9288 | 1203 | interrupts = <116>; |
f30fb03d SG |
1204 | dmas = <&dma_apbx 0>, <&dma_apbx 1>; |
1205 | dma-names = "rx", "tx"; | |
b598b9f3 | 1206 | clocks = <&clks 45>; |
bc3a59c1 DA |
1207 | status = "disabled"; |
1208 | }; | |
1209 | ||
1210 | duart: serial@80074000 { | |
1211 | compatible = "arm,pl011", "arm,primecell"; | |
1212 | reg = <0x80074000 0x1000>; | |
1213 | interrupts = <47>; | |
b598b9f3 SG |
1214 | clocks = <&clks 45>, <&clks 26>; |
1215 | clock-names = "uart", "apb_pclk"; | |
bc3a59c1 DA |
1216 | status = "disabled"; |
1217 | }; | |
1218 | ||
1219 | usbphy0: usbphy@8007c000 { | |
5da01270 | 1220 | compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy"; |
bc3a59c1 | 1221 | reg = <0x8007c000 0x2000>; |
b598b9f3 | 1222 | clocks = <&clks 62>; |
bc3a59c1 DA |
1223 | status = "disabled"; |
1224 | }; | |
1225 | ||
1226 | usbphy1: usbphy@8007e000 { | |
5da01270 | 1227 | compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy"; |
bc3a59c1 | 1228 | reg = <0x8007e000 0x2000>; |
b598b9f3 | 1229 | clocks = <&clks 63>; |
bc3a59c1 DA |
1230 | status = "disabled"; |
1231 | }; | |
1232 | }; | |
1233 | }; | |
1234 | ||
1235 | ahb@80080000 { | |
1236 | compatible = "simple-bus"; | |
1237 | #address-cells = <1>; | |
1238 | #size-cells = <1>; | |
1239 | reg = <0x80080000 0x80000>; | |
1240 | ranges; | |
1241 | ||
5da01270 RZ |
1242 | usb0: usb@80080000 { |
1243 | compatible = "fsl,imx28-usb", "fsl,imx27-usb"; | |
bc3a59c1 | 1244 | reg = <0x80080000 0x10000>; |
5da01270 | 1245 | interrupts = <93>; |
b598b9f3 | 1246 | clocks = <&clks 60>; |
5da01270 | 1247 | fsl,usbphy = <&usbphy0>; |
bc3a59c1 DA |
1248 | status = "disabled"; |
1249 | }; | |
1250 | ||
5da01270 RZ |
1251 | usb1: usb@80090000 { |
1252 | compatible = "fsl,imx28-usb", "fsl,imx27-usb"; | |
bc3a59c1 | 1253 | reg = <0x80090000 0x10000>; |
5da01270 | 1254 | interrupts = <92>; |
b598b9f3 | 1255 | clocks = <&clks 61>; |
5da01270 | 1256 | fsl,usbphy = <&usbphy1>; |
3ec481ed | 1257 | dr_mode = "host"; |
bc3a59c1 DA |
1258 | status = "disabled"; |
1259 | }; | |
1260 | ||
296f8cd3 | 1261 | dflpt: dflpt@800c0000 { |
bc3a59c1 DA |
1262 | reg = <0x800c0000 0x10000>; |
1263 | status = "disabled"; | |
1264 | }; | |
1265 | ||
1266 | mac0: ethernet@800f0000 { | |
1267 | compatible = "fsl,imx28-fec"; | |
1268 | reg = <0x800f0000 0x4000>; | |
1269 | interrupts = <101>; | |
f231a9fe WS |
1270 | clocks = <&clks 57>, <&clks 57>, <&clks 64>; |
1271 | clock-names = "ipg", "ahb", "enet_out"; | |
bc3a59c1 DA |
1272 | status = "disabled"; |
1273 | }; | |
1274 | ||
1275 | mac1: ethernet@800f4000 { | |
1276 | compatible = "fsl,imx28-fec"; | |
1277 | reg = <0x800f4000 0x4000>; | |
1278 | interrupts = <102>; | |
b598b9f3 SG |
1279 | clocks = <&clks 57>, <&clks 57>; |
1280 | clock-names = "ipg", "ahb"; | |
bc3a59c1 DA |
1281 | status = "disabled"; |
1282 | }; | |
1283 | ||
296f8cd3 | 1284 | etn_switch: switch@800f8000 { |
bc3a59c1 DA |
1285 | reg = <0x800f8000 0x8000>; |
1286 | status = "disabled"; | |
1287 | }; | |
bc3a59c1 | 1288 | }; |
f92dfb02 | 1289 | |
0b452ccc | 1290 | iio-hwmon { |
f92dfb02 AB |
1291 | compatible = "iio-hwmon"; |
1292 | io-channels = <&lradc 8>; | |
1293 | }; | |
bc3a59c1 | 1294 | }; |