ARM: clk-imx31: Add dummy clock
[deliverable/linux.git] / arch / arm / boot / dts / imx31.dtsi
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1/*
2 * Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 aliases {
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 serial3 = &uart4;
20 serial4 = &uart5;
21 };
22
23 avic: avic-interrupt-controller@60000000 {
24 compatible = "fsl,imx31-avic", "fsl,avic";
25 interrupt-controller;
26 #interrupt-cells = <1>;
27 reg = <0x60000000 0x100000>;
28 };
29
30 soc {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "simple-bus";
34 interrupt-parent = <&avic>;
35 ranges;
36
37 aips@43f00000 { /* AIPS1 */
38 compatible = "fsl,aips-bus", "simple-bus";
39 #address-cells = <1>;
40 #size-cells = <1>;
41 reg = <0x43f00000 0x100000>;
42 ranges;
43
44 uart1: serial@43f90000 {
45 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
46 reg = <0x43f90000 0x4000>;
47 interrupts = <45>;
48 status = "disabled";
49 };
50
51 uart2: serial@43f94000 {
52 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
53 reg = <0x43f94000 0x4000>;
54 interrupts = <32>;
55 status = "disabled";
56 };
57
58 uart4: serial@43fb0000 {
59 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
60 reg = <0x43fb0000 0x4000>;
61 interrupts = <46>;
62 status = "disabled";
63 };
64
65 uart5: serial@43fb4000 {
66 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
67 reg = <0x43fb4000 0x4000>;
68 interrupts = <47>;
69 status = "disabled";
70 };
71 };
72
73 spba@50000000 {
74 compatible = "fsl,spba-bus", "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 reg = <0x50000000 0x100000>;
78 ranges;
79
80 uart3: serial@5000c000 {
81 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
82 reg = <0x5000c000 0x4000>;
83 interrupts = <18>;
84 status = "disabled";
85 };
86 };
87 };
88};
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