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Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-fixes
[deliverable/linux.git] / arch / arm / boot / dts / imx51-babbage.dts
CommitLineData
9daaf31a
SG		 1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
36dffd8f 14#include "imx51.dtsi"
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SG		 15
16/ {
17 model = "Freescale i.MX51 Babbage Board";
18 compatible = "fsl,imx51-babbage", "fsl,imx51";
19
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SG		 20 memory {
21 reg = <0x90000000 0x20000000>;
22 };
23
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SG		 24 display@di0 {
25 compatible = "fsl,imx-parallel-display";
26 crtcs = <&ipu 0>;
27 interface-pix-fmt = "rgb24";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
30 };
a15d9f89 31
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SG		 32 display@di1 {
33 compatible = "fsl,imx-parallel-display";
34 crtcs = <&ipu 1>;
35 interface-pix-fmt = "rgb565";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
9daaf31a
SG		 38 };
39
40 gpio-keys {
41 compatible = "gpio-keys";
42
43 power {
44 label = "Power Button";
4d191868 45 gpios = <&gpio2 21 0>;
9daaf31a
SG		 46 linux,code = <116>; /* KEY_POWER */
47 gpio-key,wakeup;
48 };
49 };
a15d9f89
SG		 50
51 sound {
52 compatible = "fsl,imx51-babbage-sgtl5000",
53 "fsl,imx-audio-sgtl5000";
54 model = "imx51-babbage-sgtl5000";
55 ssi-controller = <&ssi2>;
56 audio-codec = <&sgtl5000>;
57 audio-routing =
58 "MIC_IN", "Mic Jack",
59 "Mic Jack", "Mic Bias",
60 "Headphone Jack", "HP_OUT";
61 mux-int-port = <2>;
62 mux-ext-port = <3>;
63 };
84bb0847
FE		 64
65 clocks {
66 clk_26M: codec_clock {
67 compatible = "fixed-clock";
68 reg=<0>;
69 #clock-cells = <0>;
70 clock-frequency = <26000000>;
71 gpios = <&gpio4 26 1>;
72 };
73 };
9daaf31a 74};
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SG		 75
76&esdhc1 {
77 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_esdhc1_1>;
79 fsl,cd-controller;
80 fsl,wp-controller;
81 status = "okay";
82};
83
84&esdhc2 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_esdhc2_1>;
87 cd-gpios = <&gpio1 6 0>;
88 wp-gpios = <&gpio1 5 0>;
89 status = "okay";
90};
91
92&uart3 {
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_uart3_1>;
95 fsl,uart-has-rtscts;
96 status = "okay";
97};
98
99&ecspi1 {
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_ecspi1_1>;
102 fsl,spi-num-chipselects = <2>;
103 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
104 status = "okay";
105
106 pmic: mc13892@0 {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 compatible = "fsl,mc13892";
110 spi-max-frequency = <6000000>;
111 reg = <0>;
112 interrupt-parent = <&gpio1>;
113 interrupts = <8 0x4>;
114
115 regulators {
116 sw1_reg: sw1 {
117 regulator-min-microvolt = <600000>;
118 regulator-max-microvolt = <1375000>;
119 regulator-boot-on;
120 regulator-always-on;
121 };
122
123 sw2_reg: sw2 {
124 regulator-min-microvolt = <900000>;
125 regulator-max-microvolt = <1850000>;
126 regulator-boot-on;
127 regulator-always-on;
128 };
129
130 sw3_reg: sw3 {
131 regulator-min-microvolt = <1100000>;
132 regulator-max-microvolt = <1850000>;
133 regulator-boot-on;
134 regulator-always-on;
135 };
136
137 sw4_reg: sw4 {
138 regulator-min-microvolt = <1100000>;
139 regulator-max-microvolt = <1850000>;
140 regulator-boot-on;
141 regulator-always-on;
142 };
143
144 vpll_reg: vpll {
145 regulator-min-microvolt = <1050000>;
146 regulator-max-microvolt = <1800000>;
147 regulator-boot-on;
148 regulator-always-on;
149 };
150
151 vdig_reg: vdig {
152 regulator-min-microvolt = <1650000>;
153 regulator-max-microvolt = <1650000>;
154 regulator-boot-on;
155 };
156
157 vsd_reg: vsd {
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <3150000>;
160 };
161
162 vusb2_reg: vusb2 {
163 regulator-min-microvolt = <2400000>;
164 regulator-max-microvolt = <2775000>;
165 regulator-boot-on;
166 regulator-always-on;
167 };
168
169 vvideo_reg: vvideo {
170 regulator-min-microvolt = <2775000>;
171 regulator-max-microvolt = <2775000>;
172 };
173
174 vaudio_reg: vaudio {
175 regulator-min-microvolt = <2300000>;
176 regulator-max-microvolt = <3000000>;
177 };
178
179 vcam_reg: vcam {
180 regulator-min-microvolt = <2500000>;
181 regulator-max-microvolt = <3000000>;
182 };
183
184 vgen1_reg: vgen1 {
185 regulator-min-microvolt = <1200000>;
186 regulator-max-microvolt = <1200000>;
187 };
188
189 vgen2_reg: vgen2 {
190 regulator-min-microvolt = <1200000>;
191 regulator-max-microvolt = <3150000>;
192 regulator-always-on;
193 };
194
195 vgen3_reg: vgen3 {
196 regulator-min-microvolt = <1800000>;
197 regulator-max-microvolt = <2900000>;
198 regulator-always-on;
199 };
200 };
201 };
202
203 flash: at45db321d@1 {
204 #address-cells = <1>;
205 #size-cells = <1>;
206 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
207 spi-max-frequency = <25000000>;
208 reg = <1>;
209
210 partition@0 {
211 label = "U-Boot";
212 reg = <0x0 0x40000>;
213 read-only;
214 };
215
216 partition@40000 {
217 label = "Kernel";
218 reg = <0x40000 0x3c0000>;
219 };
220 };
221};
222
223&ssi2 {
224 fsl,mode = "i2s-slave";
225 status = "okay";
226};
227
228&iomuxc {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_hog>;
231
232 hog {
233 pinctrl_hog: hoggrp {
234 fsl,pins = <
e1641531
SG		 235 MX51_PAD_GPIO1_0__SD1_CD 0x20d5
236 MX51_PAD_GPIO1_1__SD1_WP 0x20d5
237 MX51_PAD_GPIO1_5__GPIO1_5 0x100
238 MX51_PAD_GPIO1_6__GPIO1_6 0x100
239 MX51_PAD_EIM_A27__GPIO2_21 0x5
240 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
241 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
84bb0847 242 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
be4ccfce
SG		 243 >;
244 };
245 };
246};
247
248&uart1 {
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_uart1_1>;
251 fsl,uart-has-rtscts;
252 status = "okay";
253};
254
255&uart2 {
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_uart2_1>;
258 status = "okay";
259};
260
261&i2c2 {
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_i2c2_1>;
264 status = "okay";
265
266 sgtl5000: codec@0a {
267 compatible = "fsl,sgtl5000";
268 reg = <0x0a>;
84bb0847 269 clocks = <&clk_26M>;
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SG		 270 VDDA-supply = <&vdig_reg>;
271 VDDIO-supply = <&vvideo_reg>;
272 };
273};
274
275&audmux {
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_audmux_1>;
278 status = "okay";
279};
280
281&fec {
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_fec_1>;
284 phy-mode = "mii";
285 status = "okay";
286};
67eb7c0b
LY		 287
288&kpp {
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_kpp_1>;
291 linux,keymap = <0x00000067 /* KEY_UP */
292 0x0001006c /* KEY_DOWN */
293 0x00020072 /* KEY_VOLUMEDOWN */
294 0x00030066 /* KEY_HOME */
295 0x0100006a /* KEY_RIGHT */
296 0x01010069 /* KEY_LEFT */
297 0x0102001c /* KEY_ENTER */
298 0x01030073 /* KEY_VOLUMEUP */
299 0x02000040 /* KEY_F6 */
300 0x02010042 /* KEY_F8 */
301 0x02020043 /* KEY_F9 */
302 0x02030044 /* KEY_F10 */
303 0x0300003b /* KEY_F1 */
304 0x0301003c /* KEY_F2 */
305 0x0302003d /* KEY_F3 */
306 0x03030074>; /* KEY_POWER */
307 status = "okay";
308};
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