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ARM: dts: imx6ul-14x14-evk: Add audio support
[deliverable/linux.git] / arch / arm / boot / dts / imx53-m53evk.dts
CommitLineData
051124e5
MV		 1/*
2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
18e8499b 13#include "imx53-m53.dtsi"
051124e5
MV		 14
15/ {
16 model = "DENX M53EVK";
17 compatible = "denx,imx53-m53evk", "fsl,imx53";
18
be149c75
MV		 19 display1: display@di1 {
20 compatible = "fsl,imx-parallel-display";
21 interface-pix-fmt = "bgr666";
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_ipu_disp1>;
051124e5 24
be149c75
MV		 25 display-timings {
26 800x480p60 {
27 native-mode;
28 clock-frequency = <31500000>;
29 hactive = <800>;
30 vactive = <480>;
31 hfront-porch = <40>;
32 hback-porch = <88>;
33 hsync-len = <128>;
34 vback-porch = <33>;
35 vfront-porch = <9>;
36 vsync-len = <3>;
37 vsync-active = <1>;
051124e5 38 };
be149c75 39 };
e05c8c9a 40
be149c75
MV		 41 port {
42 display1_in: endpoint {
43 remote-endpoint = <&ipu_di1_disp1>;
e05c8c9a
PZ		 44 };
45 };
051124e5
MV		 46 };
47
48 backlight {
49 compatible = "pwm-backlight";
50 pwms = <&pwm1 0 3000>;
51 brightness-levels = <0 4 8 16 32 64 128 255>;
52 default-brightness-level = <6>;
40b1708f 53 power-supply = <&reg_backlight>;
051124e5
MV		 54 };
55
56 leds {
57 compatible = "gpio-leds";
58 pinctrl-names = "default";
59 pinctrl-0 = <&led_pin_gpio>;
60
61 user1 {
62 label = "user1";
63 gpios = <&gpio2 8 0>;
64 linux,default-trigger = "heartbeat";
65 };
66
67 user2 {
68 label = "user2";
69 gpios = <&gpio2 9 0>;
70 linux,default-trigger = "heartbeat";
71 };
72 };
73
74 regulators {
75 compatible = "simple-bus";
352d318c
SG		 76 #address-cells = <1>;
77 #size-cells = <0>;
051124e5 78
64b07f0a
MV		 79 reg_usbh1_vbus: regulator@3 {
80 compatible = "regulator-fixed";
81 reg = <3>;
82 regulator-name = "vbus";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
85 gpio = <&gpio1 2 0>;
64b07f0a 86 };
051124e5
MV		 87 };
88
89 sound {
90 compatible = "fsl,imx53-m53evk-sgtl5000",
91 "fsl,imx-audio-sgtl5000";
92 model = "imx53-m53evk-sgtl5000";
93 ssi-controller = <&ssi2>;
94 audio-codec = <&sgtl5000>;
95 audio-routing =
96 "MIC_IN", "Mic Jack",
97 "Mic Jack", "Mic Bias",
98 "LINE_IN", "Line In Jack",
99 "Headphone Jack", "HP_OUT",
100 "Ext Spk", "LINE_OUT";
101 mux-int-port = <2>;
102 mux-ext-port = <4>;
103 };
104};
105
106&audmux {
107 pinctrl-names = "default";
7ac0f700 108 pinctrl-0 = <&pinctrl_audmux>;
051124e5
MV		 109 status = "okay";
110};
111
112&can1 {
113 pinctrl-names = "default";
7ac0f700 114 pinctrl-0 = <&pinctrl_can1>;
051124e5
MV		 115 status = "okay";
116};
117
118&can2 {
119 pinctrl-names = "default";
7ac0f700 120 pinctrl-0 = <&pinctrl_can2>;
051124e5
MV		 121 status = "okay";
122};
123
124&esdhc1 {
125 pinctrl-names = "default";
7ac0f700 126 pinctrl-0 = <&pinctrl_esdhc1>;
94d76946
DA		 127 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
128 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
051124e5
MV		 129 status = "okay";
130};
131
132&fec {
133 pinctrl-names = "default";
7ac0f700 134 pinctrl-0 = <&pinctrl_fec>;
051124e5
MV		 135 phy-mode = "rmii";
136 status = "okay";
137};
138
139&i2c1 {
140 pinctrl-names = "default";
7ac0f700 141 pinctrl-0 = <&pinctrl_i2c1>;
051124e5
MV		 142 status = "okay";
143
144 sgtl5000: codec@0a {
145 compatible = "fsl,sgtl5000";
146 reg = <0x0a>;
147 VDDA-supply = <&reg_3p2v>;
148 VDDIO-supply = <&reg_3p2v>;
564695dd 149 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
051124e5
MV		 150 };
151};
152
051124e5
MV		 153&i2c3 {
154 pinctrl-names = "default";
7ac0f700 155 pinctrl-0 = <&pinctrl_i2c3>;
051124e5
MV		 156 status = "okay";
157};
158
159&iomuxc {
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_hog>;
162
7ac0f700 163 imx53-m53evk {
18e8499b 164 pinctrl_usb: usbgrp {
051124e5 165 fsl,pins = <
64b07f0a
MV		 166 MX53_PAD_GPIO_2__GPIO1_2 0x80000000
167 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000
051124e5
MV		 168 >;
169 };
170
171 led_pin_gpio: led_gpio@0 {
172 fsl,pins = <
173 MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000
174 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000
175 >;
176 };
7ac0f700
SG		 177
178 pinctrl_audmux: audmuxgrp {
179 fsl,pins = <
180 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000
181 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000
182 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000
183 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000
184 >;
185 };
186
187 pinctrl_can1: can1grp {
188 fsl,pins = <
189 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
190 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
191 >;
192 };
193
194 pinctrl_can2: can2grp {
195 fsl,pins = <
196 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
197 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
198 >;
199 };
200
201 pinctrl_esdhc1: esdhc1grp {
202 fsl,pins = <
203 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
204 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
205 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
206 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
207 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
208 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
209 >;
210 };
211
212 pinctrl_fec: fecgrp {
213 fsl,pins = <
214 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
215 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
216 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
217 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
218 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
219 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
220 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
221 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
222 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
223 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
224 >;
225 };
226
227 pinctrl_i2c1: i2c1grp {
228 fsl,pins = <
229 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
230 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
231 >;
232 };
233
7ac0f700
SG		 234 pinctrl_i2c3: i2c3grp {
235 fsl,pins = <
236 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
237 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
238 >;
239 };
240
19b529e9 241 pinctrl_ipu_disp1: ipudisp1grp {
7ac0f700 242 fsl,pins = <
19b529e9
MV		 243 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5
244 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5
245 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5
246 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5
247 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5
248 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5
249 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5
250 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5
251 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5
252 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5
253 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5
254 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5
255 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5
256 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5
257 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5
258 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5
259 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5
260 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5
261 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5
262 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5
263 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5
264 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5
265 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5
266 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5
267 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5
268 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5
269 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5
270 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5
271 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5
272 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5
273 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5
274 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5
7ac0f700
SG		 275 >;
276 };
277
7ac0f700
SG		 278 pinctrl_pwm1: pwm1grp {
279 fsl,pins = <
280 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5
281 >;
282 };
283
284 pinctrl_uart1: uart1grp {
285 fsl,pins = <
286 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
287 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
288 >;
289 };
290
291 pinctrl_uart2: uart2grp {
292 fsl,pins = <
293 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
294 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
295 >;
296 };
297
298 pinctrl_uart3: uart3grp {
299 fsl,pins = <
300 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
301 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
302 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
303 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
304 >;
305 };
051124e5
MV		 306 };
307};
308
e05c8c9a
PZ		 309&ipu_di1_disp1 {
310 remote-endpoint = <&display1_in>;
311};
312
051124e5
MV		 313&pwm1 {
314 pinctrl-names = "default";
7ac0f700 315 pinctrl-0 = <&pinctrl_pwm1>;
051124e5
MV		 316 status = "okay";
317};
318
1e728b3a 319&sata {
051124e5
MV		 320 status = "okay";
321};
322
323&ssi2 {
051124e5
MV		 324 status = "okay";
325};
326
327&uart1 {
328 pinctrl-names = "default";
7ac0f700 329 pinctrl-0 = <&pinctrl_uart1>;
051124e5
MV		 330 status = "okay";
331};
332
333&uart2 {
334 pinctrl-names = "default";
7ac0f700 335 pinctrl-0 = <&pinctrl_uart2>;
051124e5
MV		 336 status = "okay";
337};
338
339&uart3 {
340 pinctrl-names = "default";
7ac0f700 341 pinctrl-0 = <&pinctrl_uart3>;
051124e5
MV		 342 status = "okay";
343};
64b07f0a
MV		 344
345&usbh1 {
18e8499b
MV		 346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_usb>;
64b07f0a
MV		 348 vbus-supply = <&reg_usbh1_vbus>;
349 phy_type = "utmi";
350 status = "okay";
351};
352
353&usbotg {
354 dr_mode = "peripheral";
051124e5
MV		 355 status = "okay";
356};
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