projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| be3a568d ST |
1 | /* |
| 2 | * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 3 | * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix | |
| 4 | * | |
| 5 | * The code contained herein is licensed under the GNU General Public | |
| 6 | * License. You may obtain a copy of the GNU General Public License | |
| 7 | * Version 2 or later at the following locations: | |
| 8 | * | |
| 9 | * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | * http://www.gnu.org/copyleft/gpl.html | |
| 11 | */ | |
| 12 | ||
| 13 | /dts-v1/; | |
| 36dffd8f | 14 | #include "imx53-tqma53.dtsi" |
| be3a568d ST |
15 | |
| 16 | / { | |
| 17 | model = "TQ MBa53 starter kit"; | |
| 18 | compatible = "tq,mba53", "tq,tqma53", "fsl,imx53"; | |
| 19 | }; | |
| 20 | ||
| 21 | &iomuxc { | |
| 22 | lvds1 { | |
| 23 | pinctrl_lvds1_1: lvds1-grp1 { | |
| e1641531 SG |
24 | fsl,pins = < |
| 25 | MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x10000 | |
| 26 | MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x10000 | |
| 27 | MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x10000 | |
| 28 | MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x10000 | |
| 29 | MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x10000 | |
| 30 | >; | |
| be3a568d ST |
31 | }; |
| 32 | ||
| 33 | pinctrl_lvds1_2: lvds1-grp2 { | |
| e1641531 SG |
34 | fsl,pins = < |
| 35 | MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x10000 | |
| 36 | MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x10000 | |
| 37 | MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x10000 | |
| 38 | MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x10000 | |
| 39 | MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x10000 | |
| 40 | >; | |
| be3a568d ST |
41 | }; |
| 42 | }; | |
| 43 | ||
| 44 | disp1 { | |
| 45 | pinctrl_disp1_1: disp1-grp1 { | |
| e1641531 SG |
46 | fsl,pins = < |
| 47 | MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x10000 /* DISP1_DRDY */ | |
| 48 | MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x10000 /* DISP1_HSYNC */ | |
| 49 | MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x10000 /* DISP1_VSYNC */ | |
| 50 | MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x10000 | |
| 51 | MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x10000 | |
| 52 | MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x10000 | |
| 53 | MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x10000 | |
| 54 | MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x10000 | |
| 55 | MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x10000 | |
| 56 | MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x10000 | |
| 57 | MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x10000 | |
| 58 | MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x10000 | |
| 59 | MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x10000 | |
| 60 | MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x10000 | |
| 61 | MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x10000 | |
| 62 | MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x10000 | |
| 63 | MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x10000 | |
| 64 | MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x10000 | |
| 65 | MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x10000 | |
| 66 | MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x10000 | |
| 67 | MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x10000 | |
| 68 | MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x10000 | |
| 69 | MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x10000 | |
| 70 | MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x10000 | |
| 71 | MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x10000 | |
| 72 | MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x10000 | |
| 73 | MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x10000 | |
| 74 | >; | |
| be3a568d ST |
75 | }; |
| 76 | }; | |
| 77 | }; | |
| 78 | ||
| 79 | &cspi { | |
| 80 | status = "okay"; | |
| 81 | }; | |
| 82 | ||
| 83 | &i2c2 { | |
| 84 | codec: sgtl5000@a { | |
| 85 | compatible = "fsl,sgtl5000"; | |
| 86 | reg = <0x0a>; | |
| 87 | }; | |
| 88 | ||
| 89 | expander: pca9554@20 { | |
| 90 | compatible = "pca9554"; | |
| 91 | reg = <0x20>; | |
| 92 | interrupts = <109>; | |
| 93 | }; | |
| 94 | ||
| 95 | sensor2: lm75@49 { | |
| 96 | compatible = "lm75"; | |
| 97 | reg = <0x49>; | |
| 98 | }; | |
| 99 | }; | |
| 100 | ||
| 101 | &fec { | |
| 102 | status = "okay"; | |
| 103 | }; | |
| 104 | ||
| 105 | &esdhc2 { | |
| 106 | status = "okay"; | |
| 107 | }; | |
| 108 | ||
| 109 | &uart3 { | |
| 110 | status = "okay"; | |
| 111 | }; | |
| 112 | ||
| 113 | &ecspi1 { | |
| 114 | status = "okay"; | |
| 115 | }; | |
| 116 | ||
| 3b1a0f23 MO |
117 | &usbotg { |
| 118 | dr_mode = "host"; | |
| 119 | status = "okay"; | |
| 120 | }; | |
| 121 | ||
| 122 | &usbh1 { | |
| 123 | status = "okay"; | |
| 124 | }; | |
| 125 | ||
| be3a568d ST |
126 | &uart1 { |
| 127 | status = "okay"; | |
| 128 | }; | |
| 129 | ||
| 130 | &uart2 { | |
| 131 | status = "okay"; | |
| 132 | }; | |
| 133 | ||
| 134 | &can1 { | |
| 135 | status = "okay"; | |
| 136 | }; | |
| 137 | ||
| 138 | &can2 { | |
| 139 | status = "okay"; | |
| 140 | }; | |
| 141 | ||
| 142 | &i2c3 { | |
| 143 | status = "okay"; | |
| 144 | }; |