ARM i.MX53: dts: add oftree for MBa53 baseboard
[deliverable/linux.git] / arch / arm / boot / dts / imx53-mba53.dts
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1/*
2 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53-tqma53.dtsi"
15
16/ {
17 model = "TQ MBa53 starter kit";
18 compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
19};
20
21&iomuxc {
22 lvds1 {
23 pinctrl_lvds1_1: lvds1-grp1 {
24 fsl,pins = <730 0x10000 /* LVDS0_TX3 */
25 732 0x10000 /* LVDS0_CLK */
26 734 0x10000 /* LVDS0_TX2 */
27 736 0x10000 /* LVDS0_TX1 */
28 738 0x10000>; /* LVDS0_TX0 */
29 };
30
31 pinctrl_lvds1_2: lvds1-grp2 {
32 fsl,pins = <720 0x10000 /* LVDS1_TX3 */
33 722 0x10000 /* LVDS1_TX2 */
34 724 0x10000 /* LVDS1_CLK */
35 726 0x10000 /* LVDS1_TX1 */
36 728 0x10000>; /* LVDS1_TX0 */
37 };
38 };
39
40 disp1 {
41 pinctrl_disp1_1: disp1-grp1 {
42 fsl,pins = <689 0x10000 /* DISP1_DRDY */
43 482 0x10000 /* DISP1_HSYNC */
44 489 0x10000 /* DISP1_VSYNC */
45 684 0x10000 /* DISP1_DAT_0 */
46 515 0x10000 /* DISP1_DAT_22 */
47 523 0x10000 /* DISP1_DAT_23 */
48 543 0x10000 /* DISP1_DAT_21 */
49 553 0x10000 /* DISP1_DAT_20 */
50 558 0x10000 /* DISP1_DAT_19 */
51 564 0x10000 /* DISP1_DAT_18 */
52 570 0x10000 /* DISP1_DAT_17 */
53 575 0x10000 /* DISP1_DAT_16 */
54 580 0x10000 /* DISP1_DAT_15 */
55 585 0x10000 /* DISP1_DAT_14 */
56 590 0x10000 /* DISP1_DAT_13 */
57 595 0x10000 /* DISP1_DAT_12 */
58 628 0x10000 /* DISP1_DAT_11 */
59 634 0x10000 /* DISP1_DAT_10 */
60 639 0x10000 /* DISP1_DAT_9 */
61 644 0x10000 /* DISP1_DAT_8 */
62 649 0x10000 /* DISP1_DAT_7 */
63 654 0x10000 /* DISP1_DAT_6 */
64 659 0x10000 /* DISP1_DAT_5 */
65 664 0x10000 /* DISP1_DAT_4 */
66 669 0x10000 /* DISP1_DAT_3 */
67 674 0x10000 /* DISP1_DAT_2 */
68 679 0x10000 /* DISP1_DAT_1 */
69 684 0x10000>; /* DISP1_DAT_0 */
70 };
71 };
72};
73
74&cspi {
75 status = "okay";
76};
77
78&i2c2 {
79 codec: sgtl5000@a {
80 compatible = "fsl,sgtl5000";
81 reg = <0x0a>;
82 };
83
84 expander: pca9554@20 {
85 compatible = "pca9554";
86 reg = <0x20>;
87 interrupts = <109>;
88 };
89
90 sensor2: lm75@49 {
91 compatible = "lm75";
92 reg = <0x49>;
93 };
94};
95
96&fec {
97 status = "okay";
98};
99
100&esdhc2 {
101 status = "okay";
102};
103
104&uart3 {
105 status = "okay";
106};
107
108&ecspi1 {
109 status = "okay";
110};
111
112&uart1 {
113 status = "okay";
114};
115
116&uart2 {
117 status = "okay";
118};
119
120&can1 {
121 status = "okay";
122};
123
124&can2 {
125 status = "okay";
126};
127
128&i2c3 {
129 status = "okay";
130};
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