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73d2b4cd SG |
1 | /* |
2 | * Copyright 2011 Freescale Semiconductor, Inc. | |
3 | * Copyright 2011 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | /dts-v1/; | |
36dffd8f | 14 | #include "imx53.dtsi" |
73d2b4cd SG |
15 | |
16 | / { | |
17 | model = "Freescale i.MX53 Smart Mobile Reference Design Board"; | |
18 | compatible = "fsl,imx53-smd", "fsl,imx53"; | |
19 | ||
73d2b4cd SG |
20 | memory { |
21 | reg = <0x70000000 0x40000000>; | |
22 | }; | |
23 | ||
73d2b4cd SG |
24 | gpio-keys { |
25 | compatible = "gpio-keys"; | |
26 | ||
27 | volume-up { | |
28 | label = "Volume Up"; | |
4d191868 | 29 | gpios = <&gpio2 14 0>; |
73d2b4cd SG |
30 | linux,code = <115>; /* KEY_VOLUMEUP */ |
31 | }; | |
32 | ||
33 | volume-down { | |
34 | label = "Volume Down"; | |
4d191868 | 35 | gpios = <&gpio2 15 0>; |
73d2b4cd SG |
36 | linux,code = <114>; /* KEY_VOLUMEDOWN */ |
37 | }; | |
38 | }; | |
39 | }; | |
be4ccfce SG |
40 | |
41 | &esdhc1 { | |
42 | pinctrl-names = "default"; | |
7ac0f700 | 43 | pinctrl-0 = <&pinctrl_esdhc1>; |
94d76946 DA |
44 | cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; |
45 | wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; | |
be4ccfce SG |
46 | status = "okay"; |
47 | }; | |
48 | ||
49 | &esdhc2 { | |
50 | pinctrl-names = "default"; | |
7ac0f700 | 51 | pinctrl-0 = <&pinctrl_esdhc2>; |
be4ccfce SG |
52 | non-removable; |
53 | status = "okay"; | |
54 | }; | |
55 | ||
56 | &uart3 { | |
57 | pinctrl-names = "default"; | |
7ac0f700 | 58 | pinctrl-0 = <&pinctrl_uart3>; |
be4ccfce SG |
59 | fsl,uart-has-rtscts; |
60 | status = "okay"; | |
61 | }; | |
62 | ||
63 | &ecspi1 { | |
64 | pinctrl-names = "default"; | |
7ac0f700 | 65 | pinctrl-0 = <&pinctrl_ecspi1>; |
be4ccfce SG |
66 | fsl,spi-num-chipselects = <2>; |
67 | cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; | |
68 | status = "okay"; | |
69 | ||
70 | zigbee: mc1323@0 { | |
71 | compatible = "fsl,mc1323"; | |
72 | spi-max-frequency = <8000000>; | |
73 | reg = <0>; | |
74 | }; | |
75 | ||
76 | flash: m25p32@1 { | |
77 | #address-cells = <1>; | |
78 | #size-cells = <1>; | |
79826ac6 | 79 | compatible = "st,m25p32", "st,m25p", "jedec,spi-nor"; |
be4ccfce SG |
80 | spi-max-frequency = <20000000>; |
81 | reg = <1>; | |
82 | ||
83 | partition@0 { | |
84 | label = "U-Boot"; | |
85 | reg = <0x0 0x40000>; | |
86 | read-only; | |
87 | }; | |
88 | ||
89 | partition@40000 { | |
90 | label = "Kernel"; | |
91 | reg = <0x40000 0x3c0000>; | |
92 | }; | |
93 | }; | |
94 | }; | |
95 | ||
96 | &esdhc3 { | |
97 | pinctrl-names = "default"; | |
7ac0f700 | 98 | pinctrl-0 = <&pinctrl_esdhc3>; |
be4ccfce SG |
99 | non-removable; |
100 | status = "okay"; | |
101 | }; | |
102 | ||
103 | &iomuxc { | |
104 | pinctrl-names = "default"; | |
105 | pinctrl-0 = <&pinctrl_hog>; | |
106 | ||
7ac0f700 | 107 | imx53-smd { |
be4ccfce SG |
108 | pinctrl_hog: hoggrp { |
109 | fsl,pins = < | |
e1641531 SG |
110 | MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 |
111 | MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 | |
112 | MX53_PAD_EIM_EB2__GPIO2_30 0x80000000 | |
113 | MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 | |
114 | MX53_PAD_EIM_D19__GPIO3_19 0x80000000 | |
115 | MX53_PAD_KEY_ROW2__GPIO4_11 0x80000000 | |
116 | MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 | |
be4ccfce SG |
117 | >; |
118 | }; | |
7ac0f700 SG |
119 | |
120 | pinctrl_ecspi1: ecspi1grp { | |
121 | fsl,pins = < | |
122 | MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 | |
123 | MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 | |
124 | MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 | |
125 | >; | |
126 | }; | |
127 | ||
128 | pinctrl_esdhc1: esdhc1grp { | |
129 | fsl,pins = < | |
130 | MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 | |
131 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 | |
132 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 | |
133 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 | |
134 | MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 | |
135 | MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 | |
136 | >; | |
137 | }; | |
138 | ||
139 | pinctrl_esdhc2: esdhc2grp { | |
140 | fsl,pins = < | |
141 | MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 | |
142 | MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 | |
143 | MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 | |
144 | MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 | |
145 | MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 | |
146 | MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 | |
147 | >; | |
148 | }; | |
149 | ||
150 | pinctrl_esdhc3: esdhc3grp { | |
151 | fsl,pins = < | |
152 | MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 | |
153 | MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 | |
154 | MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 | |
155 | MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 | |
156 | MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 | |
157 | MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 | |
158 | MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 | |
159 | MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 | |
160 | MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 | |
161 | MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 | |
162 | >; | |
163 | }; | |
164 | ||
165 | pinctrl_fec: fecgrp { | |
166 | fsl,pins = < | |
167 | MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 | |
168 | MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 | |
169 | MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 | |
170 | MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 | |
171 | MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 | |
172 | MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 | |
173 | MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 | |
174 | MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 | |
175 | MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 | |
176 | MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 | |
177 | >; | |
178 | }; | |
179 | ||
180 | pinctrl_i2c1: i2c1grp { | |
181 | fsl,pins = < | |
182 | MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000 | |
183 | MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000 | |
184 | >; | |
185 | }; | |
186 | ||
187 | pinctrl_i2c2: i2c2grp { | |
188 | fsl,pins = < | |
189 | MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 | |
190 | MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 | |
191 | >; | |
192 | }; | |
193 | ||
194 | pinctrl_uart1: uart1grp { | |
195 | fsl,pins = < | |
196 | MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4 | |
197 | MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4 | |
198 | >; | |
199 | }; | |
200 | ||
201 | pinctrl_uart2: uart2grp { | |
202 | fsl,pins = < | |
203 | MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 | |
204 | MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 | |
205 | >; | |
206 | }; | |
207 | ||
208 | pinctrl_uart3: uart3grp { | |
209 | fsl,pins = < | |
210 | MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 | |
211 | MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 | |
212 | MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4 | |
213 | MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4 | |
214 | >; | |
215 | }; | |
be4ccfce SG |
216 | }; |
217 | }; | |
218 | ||
219 | &uart1 { | |
220 | pinctrl-names = "default"; | |
7ac0f700 | 221 | pinctrl-0 = <&pinctrl_uart1>; |
be4ccfce SG |
222 | status = "okay"; |
223 | }; | |
224 | ||
225 | &uart2 { | |
226 | pinctrl-names = "default"; | |
7ac0f700 | 227 | pinctrl-0 = <&pinctrl_uart2>; |
be4ccfce SG |
228 | status = "okay"; |
229 | }; | |
230 | ||
231 | &i2c2 { | |
232 | pinctrl-names = "default"; | |
7ac0f700 | 233 | pinctrl-0 = <&pinctrl_i2c2>; |
be4ccfce SG |
234 | status = "okay"; |
235 | ||
236 | codec: sgtl5000@0a { | |
237 | compatible = "fsl,sgtl5000"; | |
238 | reg = <0x0a>; | |
239 | }; | |
240 | ||
241 | magnetometer: mag3110@0e { | |
242 | compatible = "fsl,mag3110"; | |
243 | reg = <0x0e>; | |
244 | }; | |
245 | ||
246 | touchkey: mpr121@5a { | |
247 | compatible = "fsl,mpr121"; | |
248 | reg = <0x5a>; | |
249 | }; | |
250 | }; | |
251 | ||
252 | &i2c1 { | |
253 | pinctrl-names = "default"; | |
7ac0f700 | 254 | pinctrl-0 = <&pinctrl_i2c1>; |
be4ccfce SG |
255 | status = "okay"; |
256 | ||
257 | accelerometer: mma8450@1c { | |
258 | compatible = "fsl,mma8450"; | |
259 | reg = <0x1c>; | |
260 | }; | |
261 | ||
262 | camera: ov5642@3c { | |
263 | compatible = "ovti,ov5642"; | |
264 | reg = <0x3c>; | |
265 | }; | |
266 | ||
267 | pmic: dialog@48 { | |
bd597f47 | 268 | compatible = "dlg,da9053", "dlg,da9052"; |
be4ccfce SG |
269 | reg = <0x48>; |
270 | }; | |
271 | }; | |
272 | ||
273 | &fec { | |
274 | pinctrl-names = "default"; | |
7ac0f700 | 275 | pinctrl-0 = <&pinctrl_fec>; |
be4ccfce SG |
276 | phy-mode = "rmii"; |
277 | phy-reset-gpios = <&gpio7 6 0>; | |
278 | status = "okay"; | |
279 | }; |