Commit | Line | Data |
---|---|---|
420127e5 SH |
1 | / { |
2 | regulators { | |
3 | compatible = "simple-bus"; | |
4 | #address-cells = <1>; | |
5 | #size-cells = <0>; | |
6 | ||
7 | dummy_reg: regulator@0 { | |
8 | compatible = "regulator-fixed"; | |
9 | reg = <0>; | |
10 | regulator-name = "dummy-supply"; | |
11 | }; | |
12 | ||
13 | reg_usb_otg_vbus: regulator@1 { | |
14 | compatible = "regulator-fixed"; | |
15 | reg = <1>; | |
16 | regulator-name = "usb_otg_vbus"; | |
17 | regulator-min-microvolt = <5000000>; | |
18 | regulator-max-microvolt = <5000000>; | |
19 | gpio = <&gpio3 22 0>; | |
20 | enable-active-high; | |
21 | }; | |
22 | }; | |
23 | ||
24 | chosen { | |
48f51963 | 25 | stdout-path = &uart1; |
420127e5 SH |
26 | }; |
27 | }; | |
28 | ||
29 | &ecspi3 { | |
30 | fsl,spi-num-chipselects = <1>; | |
31 | cs-gpios = <&gpio4 24 0>; | |
32 | pinctrl-names = "default"; | |
33 | pinctrl-0 = <&pinctrl_ecspi3>; | |
34 | status = "okay"; | |
35 | ||
36 | flash: m25p80@0 { | |
37 | #address-cells = <1>; | |
38 | #size-cells = <1>; | |
39 | compatible = "sst,sst25vf040b", "m25p80"; | |
40 | spi-max-frequency = <20000000>; | |
41 | reg = <0>; | |
42 | }; | |
43 | }; | |
44 | ||
45 | &fec { | |
46 | pinctrl-names = "default"; | |
47 | pinctrl-0 = <&pinctrl_enet>; | |
48 | status = "okay"; | |
49 | phy-mode = "rgmii"; | |
50 | }; | |
51 | ||
52 | &iomuxc { | |
53 | pinctrl-names = "default"; | |
54 | pinctrl-0 = <&pinctrl_hog>; | |
55 | ||
56 | imx6qdl-dfi-fs700-m60 { | |
57 | pinctrl_hog: hoggrp { | |
58 | fsl,pins = < | |
59 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000 | |
60 | MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */ | |
61 | MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */ | |
62 | MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */ | |
63 | >; | |
64 | }; | |
65 | ||
66 | pinctrl_enet: enetgrp { | |
67 | fsl,pins = < | |
68 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | |
69 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | |
70 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | |
71 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | |
72 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | |
73 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | |
74 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | |
75 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | |
76 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | |
77 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | |
78 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | |
79 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | |
80 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | |
81 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | |
82 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | |
83 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | |
84 | >; | |
85 | }; | |
86 | ||
87 | pinctrl_i2c2: i2c2grp { | |
88 | fsl,pins = < | |
89 | MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 | |
90 | MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 | |
91 | >; | |
92 | }; | |
93 | ||
94 | pinctrl_uart1: uart1grp { | |
95 | fsl,pins = < | |
96 | MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 | |
97 | MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 | |
98 | >; | |
99 | }; | |
100 | ||
101 | pinctrl_usbotg: usbotggrp { | |
102 | fsl,pins = < | |
103 | MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 | |
104 | >; | |
105 | }; | |
106 | ||
107 | pinctrl_usdhc2: usdhc2grp { | |
108 | fsl,pins = < | |
109 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 | |
110 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 | |
111 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 | |
112 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 | |
113 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 | |
114 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 | |
115 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */ | |
116 | >; | |
117 | }; | |
118 | ||
119 | pinctrl_usdhc3: usdhc3grp { | |
120 | fsl,pins = < | |
121 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 | |
122 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 | |
123 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 | |
124 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 | |
125 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 | |
126 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 | |
127 | >; | |
128 | }; | |
129 | ||
130 | pinctrl_usdhc4: usdhc4grp { | |
131 | fsl,pins = < | |
132 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 | |
133 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 | |
134 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 | |
135 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 | |
136 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 | |
137 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 | |
138 | MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 | |
139 | MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 | |
140 | MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 | |
141 | MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 | |
142 | >; | |
143 | }; | |
144 | ||
145 | pinctrl_ecspi3: ecspi3grp { | |
146 | fsl,pins = < | |
147 | MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 | |
148 | MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 | |
149 | MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 | |
150 | MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */ | |
151 | >; | |
152 | }; | |
153 | }; | |
154 | }; | |
155 | ||
156 | &i2c2 { | |
157 | pinctrl-names = "default"; | |
158 | pinctrl-0 = <&pinctrl_i2c2>; | |
159 | status = "okay"; | |
160 | }; | |
161 | ||
162 | &uart1 { | |
163 | pinctrl-names = "default"; | |
164 | pinctrl-0 = <&pinctrl_uart1>; | |
165 | status = "okay"; | |
166 | }; | |
167 | ||
168 | &usbh1 { | |
169 | status = "okay"; | |
170 | }; | |
171 | ||
172 | &usbotg { | |
173 | vbus-supply = <®_usb_otg_vbus>; | |
174 | pinctrl-names = "default"; | |
175 | pinctrl-0 = <&pinctrl_usbotg>; | |
176 | disable-over-current; | |
177 | dr_mode = "host"; | |
178 | status = "okay"; | |
179 | }; | |
180 | ||
181 | &usdhc2 { /* module slot */ | |
182 | pinctrl-names = "default"; | |
183 | pinctrl-0 = <&pinctrl_usdhc2>; | |
184 | cd-gpios = <&gpio2 2 0>; | |
185 | status = "okay"; | |
186 | }; | |
187 | ||
188 | &usdhc3 { /* baseboard slot */ | |
189 | pinctrl-names = "default"; | |
190 | pinctrl-0 = <&pinctrl_usdhc3>; | |
191 | }; | |
192 | ||
193 | &usdhc4 { /* eMMC */ | |
194 | pinctrl-names = "default"; | |
195 | pinctrl-0 = <&pinctrl_usdhc4>; | |
196 | bus-width = <8>; | |
197 | non-removable; | |
198 | status = "okay"; | |
199 | }; |