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7ed47ef1 PZ |
1 | /* |
2 | * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
8fa91c8e DL |
12 | #include <dt-bindings/sound/fsl-imx-audmux.h> |
13 | ||
057b3d3c PZ |
14 | / { |
15 | chosen { | |
16 | linux,stdout-path = &uart4; | |
17 | }; | |
8fa91c8e DL |
18 | |
19 | regulators { | |
20 | sound_1v8: regulator@2 { | |
21 | compatible = "regulator-fixed"; | |
22 | reg = <2>; | |
23 | regulator-name = "i2s-audio-1v8"; | |
24 | regulator-min-microvolt = <1800000>; | |
25 | regulator-max-microvolt = <1800000>; | |
26 | }; | |
27 | ||
28 | sound_3v3: regulator@3 { | |
29 | compatible = "regulator-fixed"; | |
30 | reg = <3>; | |
31 | regulator-name = "i2s-audio-3v3"; | |
32 | regulator-min-microvolt = <3300000>; | |
33 | regulator-max-microvolt = <3300000>; | |
34 | }; | |
35 | }; | |
36 | ||
37 | tlv320_mclk: oscillator { | |
38 | compatible = "fixed-clock"; | |
39 | #clock-cells = <0>; | |
40 | clock-frequency = <19200000>; | |
41 | clock-output-names = "tlv320-mclk"; | |
42 | }; | |
43 | ||
44 | sound { | |
45 | compatible = "simple-audio-card"; | |
46 | simple-audio-card,name = "OnboardTLV320AIC3007"; | |
47 | simple-audio-card,format = "i2s"; | |
48 | simple-audio-card,bitclock-master = <&dailink_master>; | |
49 | simple-audio-card,frame-master = <&dailink_master>; | |
50 | simple-audio-card,widgets = | |
51 | "Microphone", "Mic Jack", | |
52 | "Line", "Line In", | |
53 | "Line", "Line Out", | |
54 | "Speaker", "Speaker", | |
55 | "Headphone", "Headphone Jack"; | |
56 | simple-audio-card,routing = | |
57 | "Line Out", "LLOUT", | |
58 | "Line Out", "RLOUT", | |
59 | "Speaker", "SPOP", | |
60 | "Speaker", "SPOM", | |
61 | "Headphone Jack", "HPLOUT", | |
62 | "Headphone Jack", "HPROUT", | |
63 | "MIC3L", "Mic Jack", | |
64 | "MIC3R", "Mic Jack", | |
65 | "Mic Jack", "Mic Bias", | |
66 | "LINE1L", "Line In", | |
67 | "LINE1R", "Line In"; | |
68 | ||
69 | simple-audio-card,cpu { | |
70 | sound-dai = <&ssi2>; | |
71 | }; | |
72 | ||
73 | dailink_master: simple-audio-card,codec { | |
74 | sound-dai = <&codec>; | |
75 | clocks = <&tlv320_mclk>; | |
76 | }; | |
77 | }; | |
78 | ||
79 | }; | |
80 | ||
81 | &audmux { | |
82 | status = "okay"; | |
83 | ||
84 | ssi2 { | |
85 | fsl,audmux-port = <1>; | |
86 | fsl,port-config = < | |
87 | (IMX_AUDMUX_V2_PTCR_TFSDIR | | |
88 | IMX_AUDMUX_V2_PTCR_TFSEL(4) | | |
89 | IMX_AUDMUX_V2_PTCR_TCLKDIR | | |
90 | IMX_AUDMUX_V2_PTCR_TCSEL(4)) | |
91 | IMX_AUDMUX_V2_PDCR_RXDSEL(4) | |
92 | >; | |
93 | }; | |
94 | ||
95 | pins5 { | |
96 | fsl,audmux-port = <4>; | |
97 | fsl,port-config = < | |
98 | 0x00000000 | |
99 | IMX_AUDMUX_V2_PDCR_RXDSEL(1) | |
100 | >; | |
101 | }; | |
057b3d3c PZ |
102 | }; |
103 | ||
1b61feea CH |
104 | &can1 { |
105 | status = "okay"; | |
106 | }; | |
107 | ||
7ed47ef1 PZ |
108 | &fec { |
109 | status = "okay"; | |
110 | }; | |
111 | ||
25c349c4 PZ |
112 | &hdmi { |
113 | status = "okay"; | |
114 | }; | |
115 | ||
c3a09406 | 116 | &i2c2 { |
c3a09406 | 117 | status = "okay"; |
bcdd3343 | 118 | |
8fa91c8e DL |
119 | codec: tlv320@18 { |
120 | compatible = "ti,tlv320aic3007"; | |
121 | #sound-dai-cells = <0>; | |
bcdd3343 | 122 | reg = <0x18>; |
8fa91c8e DL |
123 | ai3x-micbias-vg = <2>; |
124 | ||
125 | AVDD-supply = <&sound_3v3>; | |
126 | IOVDD-supply = <&sound_3v3>; | |
127 | DRVDD-supply = <&sound_3v3>; | |
128 | DVDD-supply = <&sound_1v8>; | |
bcdd3343 PZ |
129 | }; |
130 | ||
131 | stmpe@41 { | |
132 | compatible = "st,stmpe811"; | |
133 | reg = <0x41>; | |
134 | }; | |
135 | ||
136 | rtc@51 { | |
137 | compatible = "nxp,rtc8564"; | |
138 | reg = <0x51>; | |
139 | }; | |
140 | ||
141 | adc@64 { | |
142 | compatible = "maxim,max1037"; | |
143 | reg = <0x64>; | |
144 | }; | |
c3a09406 PZ |
145 | }; |
146 | ||
147 | &i2c3 { | |
c3a09406 PZ |
148 | status = "okay"; |
149 | }; | |
150 | ||
9924546b CH |
151 | &pcie { |
152 | status = "okay"; | |
153 | }; | |
154 | ||
8fa91c8e DL |
155 | &ssi2 { |
156 | status = "okay"; | |
157 | }; | |
158 | ||
b6b9439b PZ |
159 | &uart3 { |
160 | status = "okay"; | |
161 | }; | |
162 | ||
7ed47ef1 PZ |
163 | &uart4 { |
164 | status = "okay"; | |
165 | }; | |
166 | ||
167 | &usbh1 { | |
168 | status = "okay"; | |
169 | }; | |
170 | ||
171 | &usbotg { | |
172 | status = "okay"; | |
173 | }; | |
174 | ||
175 | &usdhc2 { | |
176 | status = "okay"; | |
177 | }; | |
178 | ||
179 | &usdhc3 { | |
180 | status = "okay"; | |
181 | }; |