Commit | Line | Data |
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082d33d0 SG |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * Copyright 2011 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | / { | |
14 | memory { | |
15 | reg = <0x10000000 0x80000000>; | |
16 | }; | |
17 | }; | |
18 | ||
faacc290 HS |
19 | &ecspi1 { |
20 | fsl,spi-num-chipselects = <1>; | |
21 | cs-gpios = <&gpio3 19 0>; | |
22 | pinctrl-names = "default"; | |
72eb4cca | 23 | pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>; |
faacc290 HS |
24 | status = "disabled"; /* pin conflict with WEIM NOR */ |
25 | ||
26 | flash: m25p80@0 { | |
27 | #address-cells = <1>; | |
28 | #size-cells = <1>; | |
29 | compatible = "st,m25p32"; | |
30 | spi-max-frequency = <20000000>; | |
31 | reg = <0>; | |
32 | }; | |
33 | }; | |
34 | ||
082d33d0 SG |
35 | &fec { |
36 | pinctrl-names = "default"; | |
37 | pinctrl-0 = <&pinctrl_enet_2>; | |
38 | phy-mode = "rgmii"; | |
39 | status = "okay"; | |
40 | }; | |
41 | ||
82726931 HS |
42 | &gpmi { |
43 | pinctrl-names = "default"; | |
44 | pinctrl-0 = <&pinctrl_gpmi_nand_1>; | |
45 | status = "okay"; | |
46 | }; | |
47 | ||
082d33d0 SG |
48 | &uart4 { |
49 | pinctrl-names = "default"; | |
50 | pinctrl-0 = <&pinctrl_uart4_1>; | |
51 | status = "okay"; | |
52 | }; | |
53 | ||
54 | &usdhc3 { | |
55 | pinctrl-names = "default"; | |
56 | pinctrl-0 = <&pinctrl_usdhc3_1>; | |
57 | cd-gpios = <&gpio6 15 0>; | |
58 | wp-gpios = <&gpio1 13 0>; | |
59 | status = "okay"; | |
60 | }; | |
50fe0e90 HS |
61 | |
62 | &weim { | |
63 | pinctrl-names = "default"; | |
64 | pinctrl-0 = <&pinctrl_weim_nor_1 &pinctrl_weim_cs0_1>; | |
65 | #address-cells = <2>; | |
66 | #size-cells = <1>; | |
67 | ranges = <0 0 0x08000000 0x08000000>; | |
68 | status = "disabled"; /* pin conflict with SPI NOR */ | |
69 | ||
70 | nor@0,0 { | |
71 | compatible = "cfi-flash"; | |
72 | reg = <0 0 0x02000000>; | |
73 | #address-cells = <1>; | |
74 | #size-cells = <1>; | |
75 | bank-width = <2>; | |
76 | fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 | |
77 | 0x0000c000 0x1404a38e 0x00000000>; | |
78 | }; | |
79 | }; |