[deliverable/linux.git] / arch / arm / boot / dts / imx6qdl-udoo.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * Author: Fabio Estevam <fabio.estevam@freescale.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

/ {
	aliases {
		backlight = &backlight;
		panelchan = &panelchan;
		panel7 = &panel7;
		touchscreenp7 = &touchscreenp7;
	};

	chosen {
		stdout-path = &uart2;
	};

	backlight: backlight {
		compatible = "gpio-backlight";
		gpios = <&gpio1 4 0>;
		default-on;
		status = "disabled";
	};

	memory {
		reg = <0x10000000 0x40000000>;
	};

	panel7: panel7 {
		/*
		 * in reality it is a -20t (parallel) model,
		 * but with LVDS bridge chip attached,
		 * so it is equivalent to -19t model in drive
		 * characteristics
		 */
		compatible = "urt,umsh-8596md-19t";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_panel>;
		power-supply = <&reg_panel>;
		backlight = <&backlight>;
		status = "disabled";

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb_h1_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
			gpio = <&gpio7 12 0>;
		};

		reg_panel: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "lcd_panel";
			enable-active-high;
			gpio = <&gpio1 2 0>;
		};
	};

	sound {
		compatible = "fsl,imx6q-udoo-ac97",
			     "fsl,imx-audio-ac97";
		model = "fsl,imx6q-udoo-ac97";
		audio-cpu = <&ssi1>;
		audio-routing =
			"RX", "Mic Jack",
			"Headphone Jack", "TX";
		mux-int-port = <1>;
		mux-ext-port = <6>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	status = "okay";
};

&hdmi {
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touchscreenp7: touchscreenp7@55 {
		compatible = "sitronix,st1232";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_touchscreenp7>;
		reg = <0x55>;
		interrupt-parent = <&gpio1>;
		interrupts = <13 8>;
		gpios = <&gpio1 15 0>;
		status = "disabled";
	};
};

&iomuxc {
	imx6q-udoo {
		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001f8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001f8b1
			>;
		};

		pinctrl_panel: panelgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x70
				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x70
			>;
		};

		pinctrl_touchscreenp7: touchscreenp7grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15		0x70
				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13		0x1b0b0
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
			>;
		};

		pinctrl_usbh: usbhgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
			>;
		};

		pinctrl_ac97_running: ac97running {
			fsl,pins = <
				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0
				MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x1b0b0
				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x1b0b0
				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x1b0b0
				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
			>;
		};

		pinctrl_ac97_warm_reset: ac97warmreset {
			fsl,pins = <
				MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x1b0b0
				MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0
				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x1b0b0
				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x1b0b0
				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
			>;
		};

		pinctrl_ac97_reset: ac97reset {
			fsl,pins = <
				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x1b0b0
				MX6QDL_PAD_DI0_PIN3__GPIO4_IO19		0x1b0b0
				MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x1b0b0
				MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x1b0b0
				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
			>;
		};
	};
};

&ldb {
	status = "okay";

	panelchan: lvds-channel@0 {
		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh>;
	vbus-supply = <&reg_usb_h1_vbus>;
	clocks = <&clks IMX6QDL_CLK_CKO>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	non-removable;
	status = "okay";
};

&audmux {
	status = "okay";
};

&ssi1 {
	cell-index = <0>;
	fsl,mode = "ac97-slave";
	pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
	pinctrl-0 = <&pinctrl_ac97_running>;
	pinctrl-1 = <&pinctrl_ac97_reset>;
	pinctrl-2 = <&pinctrl_ac97_warm_reset>;
	ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
	status = "okay";
};
Commit	Line	Data
cbd54fe0 RN	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* Author: Fabio Estevam <fabio.estevam@freescale.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
	12	/ {
880e1509 MS	13	aliases {
	14	backlight = &backlight;
	15	panelchan = &panelchan;
	16	panel7 = &panel7;
	17	touchscreenp7 = &touchscreenp7;
	18	};
	19
cbd54fe0 RN	20	chosen {
	21	stdout-path = &uart2;
	22	};
	23
880e1509 MS	24	backlight: backlight {
	25	compatible = "gpio-backlight";
	26	gpios = <&gpio1 4 0>;
	27	default-on;
	28	status = "disabled";
	29	};
	30
cbd54fe0 RN	31	memory {
	32	reg = <0x10000000 0x40000000>;
	33	};
	34
880e1509 MS	35	panel7: panel7 {
	36	/*
	37	* in reality it is a -20t (parallel) model,
	38	* but with LVDS bridge chip attached,
	39	* so it is equivalent to -19t model in drive
	40	* characteristics
	41	*/
	42	compatible = "urt,umsh-8596md-19t";
	43	pinctrl-names = "default";
	44	pinctrl-0 = <&pinctrl_panel>;
	45	power-supply = <&reg_panel>;
	46	backlight = <&backlight>;
	47	status = "disabled";
	48
	49	port {
	50	panel_in: endpoint {
	51	remote-endpoint = <&lvds0_out>;
	52	};
	53	};
	54	};
	55
cbd54fe0 RN	56	regulators {
	57	compatible = "simple-bus";
	58	#address-cells = <1>;
	59	#size-cells = <0>;
	60
	61	reg_usb_h1_vbus: regulator@0 {
	62	compatible = "regulator-fixed";
	63	reg = <0>;
	64	regulator-name = "usb_h1_vbus";
	65	regulator-min-microvolt = <5000000>;
	66	regulator-max-microvolt = <5000000>;
	67	enable-active-high;
	68	startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
	69	gpio = <&gpio7 12 0>;
	70	};
880e1509 MS	71
	72	reg_panel: regulator@1 {
	73	compatible = "regulator-fixed";
	74	reg = <1>;
	75	regulator-name = "lcd_panel";
	76	enable-active-high;
	77	gpio = <&gpio1 2 0>;
	78	};
cbd54fe0	79	};
f9047419 MS	80
	81	sound {
	82	compatible = "fsl,imx6q-udoo-ac97",
	83	"fsl,imx-audio-ac97";
	84	model = "fsl,imx6q-udoo-ac97";
	85	audio-cpu = <&ssi1>;
	86	audio-routing =
	87	"RX", "Mic Jack",
	88	"Headphone Jack", "TX";
	89	mux-int-port = <1>;
	90	mux-ext-port = <6>;
	91	};
cbd54fe0 RN	92	};
	93
	94	&fec {
	95	pinctrl-names = "default";
	96	pinctrl-0 = <&pinctrl_enet>;
	97	phy-mode = "rgmii";
	98	status = "okay";
	99	};
	100
	101	&hdmi {
	102	ddc-i2c-bus = <&i2c2>;
	103	status = "okay";
	104	};
	105
	106	&i2c2 {
	107	clock-frequency = <100000>;
	108	pinctrl-names = "default";
	109	pinctrl-0 = <&pinctrl_i2c2>;
	110	status = "okay";
	111	};
	112
880e1509 MS	113	&i2c3 {
	114	clock-frequency = <100000>;
	115	pinctrl-names = "default";
	116	pinctrl-0 = <&pinctrl_i2c3>;
	117	status = "okay";
	118
	119	touchscreenp7: touchscreenp7@55 {
	120	compatible = "sitronix,st1232";
	121	pinctrl-names = "default";
	122	pinctrl-0 = <&pinctrl_touchscreenp7>;
	123	reg = <0x55>;
	124	interrupt-parent = <&gpio1>;
	125	interrupts = <13 8>;
	126	gpios = <&gpio1 15 0>;
	127	status = "disabled";
	128	};
	129	};
	130
cbd54fe0 RN	131	&iomuxc {
	132	imx6q-udoo {
	133	pinctrl_enet: enetgrp {
	134	fsl,pins = <
	135	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
	136	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
	137	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
	138	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
	139	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
	140	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
	141	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
	142	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
	143	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
	144	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
	145	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
	146	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
	147	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	148	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	149	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	150	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	151	>;
	152	};
	153
	154	pinctrl_i2c2: i2c2grp {
	155	fsl,pins = <
	156	MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
	157	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	158	>;
	159	};
	160
880e1509 MS	161	pinctrl_i2c3: i2c3grp {
	162	fsl,pins = <
	163	MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1
	164	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1
	165	>;
	166	};
	167
	168	pinctrl_panel: panelgrp {
	169	fsl,pins = <
	170	MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x70
	171	MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70
	172	>;
	173	};
	174
	175	pinctrl_touchscreenp7: touchscreenp7grp {
	176	fsl,pins = <
	177	MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70
	178	MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
	179	>;
	180	};
	181
cbd54fe0 RN	182	pinctrl_uart2: uart2grp {
	183	fsl,pins = <
	184	MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
	185	MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
	186	>;
	187	};
	188
	189	pinctrl_usbh: usbhgrp {
	190	fsl,pins = <
	191	MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
	192	MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
	193	>;
	194	};
	195
	196	pinctrl_usdhc3: usdhc3grp {
	197	fsl,pins = <
	198	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
	199	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
	200	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
	201	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
	202	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
	203	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
	204	>;
	205	};
f9047419 MS	206
	207	pinctrl_ac97_running: ac97running {
	208	fsl,pins = <
	209	MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
	210	MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
	211	MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
	212	MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
	213	MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
	214	>;
	215	};
	216
	217	pinctrl_ac97_warm_reset: ac97warmreset {
	218	fsl,pins = <
	219	MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
	220	MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
	221	MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
	222	MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
	223	MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
	224	>;
	225	};
	226
	227	pinctrl_ac97_reset: ac97reset {
	228	fsl,pins = <
	229	MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
	230	MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
	231	MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
	232	MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
	233	MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
	234	>;
	235	};
cbd54fe0 RN	236	};
	237	};
	238
880e1509 MS	239	&ldb {
	240	status = "okay";
	241
	242	panelchan: lvds-channel@0 {
	243	port@4 {
	244	reg = <4>;
	245
	246	lvds0_out: endpoint {
	247	remote-endpoint = <&panel_in>;
	248	};
	249	};
	250	};
	251	};
	252
cbd54fe0 RN	253	&uart2 {
	254	pinctrl-names = "default";
	255	pinctrl-0 = <&pinctrl_uart2>;
	256	status = "okay";
	257	};
	258
	259	&usbh1 {
	260	pinctrl-names = "default";
	261	pinctrl-0 = <&pinctrl_usbh>;
	262	vbus-supply = <&reg_usb_h1_vbus>;
b26a68c1	263	clocks = <&clks IMX6QDL_CLK_CKO>;
cbd54fe0 RN	264	status = "okay";
	265	};
	266
	267	&usdhc3 {
	268	pinctrl-names = "default";
	269	pinctrl-0 = <&pinctrl_usdhc3>;
	270	non-removable;
	271	status = "okay";
	272	};
f9047419 MS	273
	274	&audmux {
	275	status = "okay";
	276	};
	277
	278	&ssi1 {
	279	cell-index = <0>;
	280	fsl,mode = "ac97-slave";
	281	pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
	282	pinctrl-0 = <&pinctrl_ac97_running>;
	283	pinctrl-1 = <&pinctrl_ac97_reset>;
	284	pinctrl-2 = <&pinctrl_ac97_warm_reset>;
	285	ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
	286	status = "okay";
	287	};