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687c2767 TL |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License version 2 as | |
4 | * published by the Free Software Foundation. | |
5 | */ | |
6 | ||
7 | #include <dt-bindings/input/input.h> | |
8 | ||
9 | / { | |
10 | cpus { | |
11 | cpu@0 { | |
12 | cpu0-supply = <&vcc>; | |
13 | }; | |
14 | }; | |
15 | ||
16 | leds { | |
17 | compatible = "gpio-leds"; | |
18 | user0 { | |
19 | label = "user0"; | |
20 | gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */ | |
21 | linux,default-trigger = "none"; | |
22 | }; | |
23 | }; | |
24 | ||
25 | wl12xx_vmmc: wl12xx_vmmc { | |
26 | compatible = "regulator-fixed"; | |
27 | regulator-name = "vwl1271"; | |
28 | regulator-min-microvolt = <1800000>; | |
29 | regulator-max-microvolt = <1800000>; | |
30 | gpio = <&gpio5 29 0>; /* gpio157 */ | |
31 | startup-delay-us = <70000>; | |
32 | enable-active-high; | |
33 | vin-supply = <&vmmc2>; | |
34 | }; | |
35 | }; | |
36 | ||
37 | &gpmc { | |
44e47164 | 38 | ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ |
687c2767 TL |
39 | |
40 | nand@0,0 { | |
44e47164 | 41 | compatible = "ti,omap2-nand"; |
687c2767 | 42 | reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ |
44e47164 RQ |
43 | interrupt-parent = <&gpmc>; |
44 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ | |
45 | <1 IRQ_TYPE_NONE>; /* termcount */ | |
46 | linux,mtd-name = "micron,mt29f4g16abbda3w"; | |
687c2767 TL |
47 | nand-bus-width = <16>; |
48 | ti,nand-ecc-opt = "bch8"; | |
49 | gpmc,sync-clk-ps = <0>; | |
50 | gpmc,cs-on-ns = <0>; | |
51 | gpmc,cs-rd-off-ns = <44>; | |
52 | gpmc,cs-wr-off-ns = <44>; | |
53 | gpmc,adv-on-ns = <6>; | |
54 | gpmc,adv-rd-off-ns = <34>; | |
55 | gpmc,adv-wr-off-ns = <44>; | |
56 | gpmc,we-off-ns = <40>; | |
57 | gpmc,oe-off-ns = <54>; | |
58 | gpmc,access-ns = <64>; | |
59 | gpmc,rd-cycle-ns = <82>; | |
60 | gpmc,wr-cycle-ns = <82>; | |
61 | gpmc,wr-access-ns = <40>; | |
62 | gpmc,wr-data-mux-bus-ns = <0>; | |
63 | gpmc,device-width = <2>; | |
64 | #address-cells = <1>; | |
65 | #size-cells = <1>; | |
66 | ||
67 | /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */ | |
68 | ||
69 | x-loader@0 { | |
70 | label = "x-loader"; | |
71 | reg = <0 0x80000>; | |
72 | }; | |
73 | ||
74 | bootloaders@80000 { | |
75 | label = "u-boot"; | |
76 | reg = <0x80000 0x1e0000>; | |
77 | }; | |
78 | ||
79 | bootloaders_env@260000 { | |
80 | label = "u-boot-env"; | |
81 | reg = <0x260000 0x20000>; | |
82 | }; | |
83 | ||
84 | kernel@280000 { | |
85 | label = "kernel"; | |
86 | reg = <0x280000 0x400000>; | |
87 | }; | |
88 | ||
89 | filesystem@680000 { | |
90 | label = "fs"; | |
91 | reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */ | |
92 | }; | |
93 | }; | |
94 | }; | |
95 | ||
96 | &i2c1 { | |
97 | clock-frequency = <2600000>; | |
98 | ||
99 | twl: twl@48 { | |
100 | reg = <0x48>; | |
101 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | |
102 | interrupt-parent = <&intc>; | |
f81902e4 AF |
103 | twl_audio: audio { |
104 | compatible = "ti,twl4030-audio"; | |
105 | codec { | |
106 | }; | |
107 | }; | |
687c2767 TL |
108 | }; |
109 | }; | |
110 | ||
6b3d42c6 AF |
111 | &i2c2 { |
112 | clock-frequency = <400000>; | |
113 | }; | |
114 | ||
115 | &i2c3 { | |
116 | clock-frequency = <400000>; | |
5e3447a2 AF |
117 | at24@50 { |
118 | compatible = "at24,24c02"; | |
119 | readonly; | |
120 | reg = <0x50>; | |
121 | }; | |
6b3d42c6 AF |
122 | }; |
123 | ||
687c2767 TL |
124 | /* |
125 | * Only found on the wireless SOM. For the SOM without wireless, the pins for | |
126 | * MMC3 can be routed with jumpers to the second MMC slot on the devkit and | |
127 | * gpio157 is not connected. So this should be OK to keep common for now, | |
128 | * probably device tree overlays is the way to go with the various SOM and | |
129 | * jumpering combinations for the long run. | |
130 | */ | |
131 | &mmc3 { | |
132 | interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; | |
133 | pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>; | |
134 | pinctrl-names = "default"; | |
135 | vmmc-supply = <&wl12xx_vmmc>; | |
136 | non-removable; | |
137 | bus-width = <4>; | |
138 | cap-power-off-card; | |
139 | #address-cells = <1>; | |
140 | #size-cells = <0>; | |
141 | wlcore: wlcore@2 { | |
142 | compatible = "ti,wl1283"; | |
143 | reg = <2>; | |
144 | interrupt-parent = <&gpio5>; | |
145 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ | |
146 | ref-clock-frequency = <26000000>; | |
0ea24daa | 147 | tcxo-clock-frequency = <26000000>; |
687c2767 TL |
148 | }; |
149 | }; | |
150 | ||
151 | &omap3_pmx_core { | |
152 | mmc3_pins: pinmux_mm3_pins { | |
153 | pinctrl-single,pins = < | |
154 | OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */ | |
155 | OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */ | |
156 | OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */ | |
157 | OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */ | |
158 | OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */ | |
159 | OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr.gpio_157 */ | |
160 | >; | |
161 | }; | |
f81902e4 AF |
162 | mcbsp2_pins: pinmux_mcbsp2_pins { |
163 | pinctrl-single,pins = < | |
164 | OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */ | |
165 | OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */ | |
166 | OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */ | |
167 | OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */ | |
168 | >; | |
169 | }; | |
9ff502f5 AF |
170 | uart2_pins: pinmux_uart2_pins { |
171 | pinctrl-single,pins = < | |
172 | OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ | |
173 | OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ | |
174 | OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ | |
175 | OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ | |
176 | OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */ | |
177 | >; | |
178 | }; | |
40d5cb20 AF |
179 | mcspi1_pins: pinmux_mcspi1_pins { |
180 | pinctrl-single,pins = < | |
181 | OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ | |
182 | OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ | |
183 | OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ | |
184 | OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ | |
185 | >; | |
186 | }; | |
b4cc2b75 AF |
187 | hsusb_otg_pins: pinmux_hsusb_otg_pins { |
188 | pinctrl-single,pins = < | |
189 | OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ | |
190 | OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ | |
191 | OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ | |
192 | OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ | |
193 | ||
194 | OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ | |
195 | OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ | |
196 | OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ | |
197 | OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ | |
198 | OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ | |
199 | OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ | |
200 | OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ | |
201 | OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ | |
202 | >; | |
203 | }; | |
9ff502f5 AF |
204 | }; |
205 | ||
206 | &uart2 { | |
207 | interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; | |
208 | pinctrl-names = "default"; | |
209 | pinctrl-0 = <&uart2_pins>; | |
687c2767 TL |
210 | }; |
211 | ||
40d5cb20 AF |
212 | &mcspi1 { |
213 | pinctrl-names = "default"; | |
214 | pinctrl-0 = <&mcspi1_pins>; | |
215 | }; | |
216 | ||
687c2767 TL |
217 | &omap3_pmx_core2 { |
218 | mmc3_core2_pins: pinmux_mmc3_core2_pins { | |
219 | pinctrl-single,pins = < | |
220 | OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */ | |
221 | OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */ | |
222 | >; | |
223 | }; | |
224 | }; | |
225 | ||
226 | #include "twl4030.dtsi" | |
227 | #include "twl4030_omap3.dtsi" | |
228 | ||
229 | &twl { | |
230 | twl_power: power { | |
231 | compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle"; | |
232 | ti,use_poweroff; | |
233 | }; | |
234 | }; | |
235 | ||
236 | &twl_gpio { | |
237 | ti,use-leds; | |
238 | }; |