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7239280c JL |
1 | /* |
2 | * Copyright 2013-2014 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This file is dual-licensed: you can use it either under the terms | |
5 | * of the GPL or the X11 license, at your option. Note that this dual | |
6 | * licensing only applies to this file, and not this project as a | |
7 | * whole. | |
8 | * | |
9 | * a) This file is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This file is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public | |
20 | * License along with this file; if not, write to the Free | |
21 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
22 | * MA 02110-1301 USA | |
23 | * | |
24 | * Or, alternatively, | |
25 | * | |
26 | * b) Permission is hereby granted, free of charge, to any person | |
27 | * obtaining a copy of this software and associated documentation | |
28 | * files (the "Software"), to deal in the Software without | |
29 | * restriction, including without limitation the rights to use, | |
30 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
31 | * sell copies of the Software, and to permit persons to whom the | |
32 | * Software is furnished to do so, subject to the following | |
33 | * conditions: | |
34 | * | |
35 | * The above copyright notice and this permission notice shall be | |
36 | * included in all copies or substantial portions of the Software. | |
37 | * | |
38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
45 | * OTHER DEALINGS IN THE SOFTWARE. | |
46 | */ | |
47 | ||
48 | #include "skeleton64.dtsi" | |
49 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
50 | ||
51 | / { | |
52 | compatible = "fsl,ls1021a"; | |
53 | interrupt-parent = <&gic>; | |
54 | ||
55 | aliases { | |
816aa61c | 56 | crypto = &crypto; |
d69cb5d7 CM |
57 | ethernet0 = &enet0; |
58 | ethernet1 = &enet1; | |
59 | ethernet2 = &enet2; | |
7239280c JL |
60 | serial0 = &lpuart0; |
61 | serial1 = &lpuart1; | |
62 | serial2 = &lpuart2; | |
63 | serial3 = &lpuart3; | |
64 | serial4 = &lpuart4; | |
65 | serial5 = &lpuart5; | |
66 | sysclk = &sysclk; | |
67 | }; | |
68 | ||
69 | cpus { | |
70 | #address-cells = <1>; | |
71 | #size-cells = <0>; | |
72 | ||
73 | cpu@f00 { | |
74 | compatible = "arm,cortex-a7"; | |
75 | device_type = "cpu"; | |
76 | reg = <0xf00>; | |
77 | clocks = <&cluster1_clk>; | |
78 | }; | |
79 | ||
80 | cpu@f01 { | |
81 | compatible = "arm,cortex-a7"; | |
82 | device_type = "cpu"; | |
83 | reg = <0xf01>; | |
84 | clocks = <&cluster1_clk>; | |
85 | }; | |
86 | }; | |
87 | ||
88 | timer { | |
89 | compatible = "arm,armv7-timer"; | |
90 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
91 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
92 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
93 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
94 | }; | |
95 | ||
96 | pmu { | |
97 | compatible = "arm,cortex-a7-pmu"; | |
98 | interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, | |
99 | <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; | |
100 | }; | |
101 | ||
102 | soc { | |
103 | compatible = "simple-bus"; | |
104 | #address-cells = <2>; | |
105 | #size-cells = <2>; | |
106 | device_type = "soc"; | |
107 | interrupt-parent = <&gic>; | |
108 | ranges; | |
109 | ||
110 | gic: interrupt-controller@1400000 { | |
111 | compatible = "arm,cortex-a7-gic"; | |
112 | #interrupt-cells = <3>; | |
113 | interrupt-controller; | |
114 | reg = <0x0 0x1401000 0x0 0x1000>, | |
115 | <0x0 0x1402000 0x0 0x1000>, | |
116 | <0x0 0x1404000 0x0 0x2000>, | |
117 | <0x0 0x1406000 0x0 0x2000>; | |
118 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; | |
119 | ||
120 | }; | |
121 | ||
f4a458fd ML |
122 | msi1: msi-controller@1570e00 { |
123 | compatible = "fsl,1s1021a-msi"; | |
124 | reg = <0x0 0x1570e00 0x0 0x8>; | |
125 | msi-controller; | |
126 | interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; | |
127 | }; | |
128 | ||
129 | msi2: msi-controller@1570e08 { | |
130 | compatible = "fsl,1s1021a-msi"; | |
131 | reg = <0x0 0x1570e08 0x0 0x8>; | |
132 | msi-controller; | |
133 | interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; | |
134 | }; | |
135 | ||
7239280c JL |
136 | ifc: ifc@1530000 { |
137 | compatible = "fsl,ifc", "simple-bus"; | |
138 | reg = <0x0 0x1530000 0x0 0x10000>; | |
139 | interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
140 | }; | |
141 | ||
142 | dcfg: dcfg@1ee0000 { | |
143 | compatible = "fsl,ls1021a-dcfg", "syscon"; | |
144 | reg = <0x0 0x1ee0000 0x0 0x10000>; | |
145 | big-endian; | |
146 | }; | |
147 | ||
148 | esdhc: esdhc@1560000 { | |
149 | compatible = "fsl,esdhc"; | |
150 | reg = <0x0 0x1560000 0x0 0x10000>; | |
151 | interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; | |
152 | clock-frequency = <0>; | |
153 | voltage-ranges = <1800 1800 3300 3300>; | |
154 | sdhci,auto-cmd12; | |
155 | big-endian; | |
156 | bus-width = <4>; | |
157 | status = "disabled"; | |
158 | }; | |
159 | ||
318f05e5 TY |
160 | sata: sata@3200000 { |
161 | compatible = "fsl,ls1021a-ahci"; | |
162 | reg = <0x0 0x3200000 0x0 0x10000>, | |
163 | <0x0 0x20220520 0x0 0x4>; | |
164 | reg-names = "ahci", "sata-ecc"; | |
165 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; | |
166 | clocks = <&platform_clk 1>; | |
167 | dma-coherent; | |
168 | status = "disabled"; | |
169 | }; | |
170 | ||
7239280c JL |
171 | scfg: scfg@1570000 { |
172 | compatible = "fsl,ls1021a-scfg", "syscon"; | |
173 | reg = <0x0 0x1570000 0x0 0x10000>; | |
4fe6be0f | 174 | big-endian; |
7239280c JL |
175 | }; |
176 | ||
816aa61c HG |
177 | crypto: crypto@1700000 { |
178 | compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; | |
179 | fsl,sec-era = <7>; | |
180 | #address-cells = <1>; | |
181 | #size-cells = <1>; | |
182 | reg = <0x0 0x1700000 0x0 0x100000>; | |
183 | ranges = <0x0 0x0 0x1700000 0x100000>; | |
184 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
185 | ||
186 | sec_jr0: jr@10000 { | |
187 | compatible = "fsl,sec-v5.0-job-ring", | |
188 | "fsl,sec-v4.0-job-ring"; | |
189 | reg = <0x10000 0x10000>; | |
190 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | |
191 | }; | |
192 | ||
193 | sec_jr1: jr@20000 { | |
194 | compatible = "fsl,sec-v5.0-job-ring", | |
195 | "fsl,sec-v4.0-job-ring"; | |
196 | reg = <0x20000 0x10000>; | |
197 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
198 | }; | |
199 | ||
200 | sec_jr2: jr@30000 { | |
201 | compatible = "fsl,sec-v5.0-job-ring", | |
202 | "fsl,sec-v4.0-job-ring"; | |
203 | reg = <0x30000 0x10000>; | |
204 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
205 | }; | |
206 | ||
207 | sec_jr3: jr@40000 { | |
208 | compatible = "fsl,sec-v5.0-job-ring", | |
209 | "fsl,sec-v4.0-job-ring"; | |
210 | reg = <0x40000 0x10000>; | |
211 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; | |
212 | }; | |
213 | ||
214 | }; | |
215 | ||
7239280c JL |
216 | clockgen: clocking@1ee1000 { |
217 | #address-cells = <1>; | |
218 | #size-cells = <1>; | |
219 | ranges = <0x0 0x0 0x1ee1000 0x10000>; | |
220 | ||
221 | sysclk: sysclk { | |
222 | compatible = "fixed-clock"; | |
223 | #clock-cells = <0>; | |
224 | clock-output-names = "sysclk"; | |
225 | }; | |
226 | ||
227 | cga_pll1: pll@800 { | |
228 | compatible = "fsl,qoriq-core-pll-2.0"; | |
229 | #clock-cells = <1>; | |
230 | reg = <0x800 0x10>; | |
231 | clocks = <&sysclk>; | |
232 | clock-output-names = "cga-pll1", "cga-pll1-div2", | |
233 | "cga-pll1-div4"; | |
234 | }; | |
235 | ||
236 | platform_clk: pll@c00 { | |
237 | compatible = "fsl,qoriq-core-pll-2.0"; | |
238 | #clock-cells = <1>; | |
239 | reg = <0xc00 0x10>; | |
240 | clocks = <&sysclk>; | |
241 | clock-output-names = "platform-clk", "platform-clk-div2"; | |
242 | }; | |
243 | ||
244 | cluster1_clk: clk0c0@0 { | |
245 | compatible = "fsl,qoriq-core-mux-2.0"; | |
246 | #clock-cells = <0>; | |
247 | reg = <0x0 0x10>; | |
248 | clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4"; | |
249 | clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>; | |
250 | clock-output-names = "cluster1-clk"; | |
251 | }; | |
252 | }; | |
253 | ||
254 | dspi0: dspi@2100000 { | |
c47d6e38 | 255 | compatible = "fsl,ls1021a-v1.0-dspi"; |
7239280c JL |
256 | #address-cells = <1>; |
257 | #size-cells = <0>; | |
258 | reg = <0x0 0x2100000 0x0 0x10000>; | |
259 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; | |
260 | clock-names = "dspi"; | |
261 | clocks = <&platform_clk 1>; | |
5b9f967c | 262 | spi-num-chipselects = <6>; |
7239280c JL |
263 | big-endian; |
264 | status = "disabled"; | |
265 | }; | |
266 | ||
267 | dspi1: dspi@2110000 { | |
c47d6e38 | 268 | compatible = "fsl,ls1021a-v1.0-dspi"; |
7239280c JL |
269 | #address-cells = <1>; |
270 | #size-cells = <0>; | |
271 | reg = <0x0 0x2110000 0x0 0x10000>; | |
272 | interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; | |
273 | clock-names = "dspi"; | |
274 | clocks = <&platform_clk 1>; | |
5b9f967c | 275 | spi-num-chipselects = <6>; |
7239280c JL |
276 | big-endian; |
277 | status = "disabled"; | |
278 | }; | |
279 | ||
280 | i2c0: i2c@2180000 { | |
281 | compatible = "fsl,vf610-i2c"; | |
282 | #address-cells = <1>; | |
283 | #size-cells = <0>; | |
284 | reg = <0x0 0x2180000 0x0 0x10000>; | |
285 | interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; | |
286 | clock-names = "i2c"; | |
287 | clocks = <&platform_clk 1>; | |
288 | status = "disabled"; | |
289 | }; | |
290 | ||
291 | i2c1: i2c@2190000 { | |
292 | compatible = "fsl,vf610-i2c"; | |
293 | #address-cells = <1>; | |
294 | #size-cells = <0>; | |
295 | reg = <0x0 0x2190000 0x0 0x10000>; | |
296 | interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; | |
297 | clock-names = "i2c"; | |
298 | clocks = <&platform_clk 1>; | |
299 | status = "disabled"; | |
300 | }; | |
301 | ||
302 | i2c2: i2c@21a0000 { | |
303 | compatible = "fsl,vf610-i2c"; | |
304 | #address-cells = <1>; | |
305 | #size-cells = <0>; | |
306 | reg = <0x0 0x21a0000 0x0 0x10000>; | |
307 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; | |
308 | clock-names = "i2c"; | |
309 | clocks = <&platform_clk 1>; | |
310 | status = "disabled"; | |
311 | }; | |
312 | ||
313 | uart0: serial@21c0500 { | |
314 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
315 | reg = <0x0 0x21c0500 0x0 0x100>; | |
316 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
317 | clock-frequency = <0>; | |
318 | fifo-size = <15>; | |
319 | status = "disabled"; | |
320 | }; | |
321 | ||
322 | uart1: serial@21c0600 { | |
323 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
324 | reg = <0x0 0x21c0600 0x0 0x100>; | |
325 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
326 | clock-frequency = <0>; | |
327 | fifo-size = <15>; | |
328 | status = "disabled"; | |
329 | }; | |
330 | ||
331 | uart2: serial@21d0500 { | |
332 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
333 | reg = <0x0 0x21d0500 0x0 0x100>; | |
334 | interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
335 | clock-frequency = <0>; | |
336 | fifo-size = <15>; | |
337 | status = "disabled"; | |
338 | }; | |
339 | ||
340 | uart3: serial@21d0600 { | |
341 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
342 | reg = <0x0 0x21d0600 0x0 0x100>; | |
343 | interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
344 | clock-frequency = <0>; | |
345 | fifo-size = <15>; | |
346 | status = "disabled"; | |
347 | }; | |
348 | ||
c54dd442 LG |
349 | gpio0: gpio@2300000 { |
350 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
351 | reg = <0x0 0x2300000 0x0 0x10000>; | |
352 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
353 | gpio-controller; | |
354 | #gpio-cells = <2>; | |
355 | interrupt-controller; | |
356 | #interrupt-cells = <2>; | |
357 | }; | |
358 | ||
359 | gpio1: gpio@2310000 { | |
360 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
361 | reg = <0x0 0x2310000 0x0 0x10000>; | |
362 | interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; | |
363 | gpio-controller; | |
364 | #gpio-cells = <2>; | |
365 | interrupt-controller; | |
366 | #interrupt-cells = <2>; | |
367 | }; | |
368 | ||
369 | gpio2: gpio@2320000 { | |
370 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
371 | reg = <0x0 0x2320000 0x0 0x10000>; | |
372 | interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; | |
373 | gpio-controller; | |
374 | #gpio-cells = <2>; | |
375 | interrupt-controller; | |
376 | #interrupt-cells = <2>; | |
377 | }; | |
378 | ||
379 | gpio3: gpio@2330000 { | |
380 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
381 | reg = <0x0 0x2330000 0x0 0x10000>; | |
382 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; | |
383 | gpio-controller; | |
384 | #gpio-cells = <2>; | |
385 | interrupt-controller; | |
386 | #interrupt-cells = <2>; | |
387 | }; | |
388 | ||
7239280c JL |
389 | lpuart0: serial@2950000 { |
390 | compatible = "fsl,ls1021a-lpuart"; | |
391 | reg = <0x0 0x2950000 0x0 0x1000>; | |
392 | interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; | |
393 | clocks = <&sysclk>; | |
394 | clock-names = "ipg"; | |
395 | status = "disabled"; | |
396 | }; | |
397 | ||
398 | lpuart1: serial@2960000 { | |
399 | compatible = "fsl,ls1021a-lpuart"; | |
400 | reg = <0x0 0x2960000 0x0 0x1000>; | |
401 | interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; | |
402 | clocks = <&platform_clk 1>; | |
403 | clock-names = "ipg"; | |
404 | status = "disabled"; | |
405 | }; | |
406 | ||
407 | lpuart2: serial@2970000 { | |
408 | compatible = "fsl,ls1021a-lpuart"; | |
409 | reg = <0x0 0x2970000 0x0 0x1000>; | |
410 | interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; | |
411 | clocks = <&platform_clk 1>; | |
412 | clock-names = "ipg"; | |
413 | status = "disabled"; | |
414 | }; | |
415 | ||
416 | lpuart3: serial@2980000 { | |
417 | compatible = "fsl,ls1021a-lpuart"; | |
418 | reg = <0x0 0x2980000 0x0 0x1000>; | |
419 | interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; | |
420 | clocks = <&platform_clk 1>; | |
421 | clock-names = "ipg"; | |
422 | status = "disabled"; | |
423 | }; | |
424 | ||
425 | lpuart4: serial@2990000 { | |
426 | compatible = "fsl,ls1021a-lpuart"; | |
427 | reg = <0x0 0x2990000 0x0 0x1000>; | |
428 | interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; | |
429 | clocks = <&platform_clk 1>; | |
430 | clock-names = "ipg"; | |
431 | status = "disabled"; | |
432 | }; | |
433 | ||
434 | lpuart5: serial@29a0000 { | |
435 | compatible = "fsl,ls1021a-lpuart"; | |
436 | reg = <0x0 0x29a0000 0x0 0x1000>; | |
437 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
438 | clocks = <&platform_clk 1>; | |
439 | clock-names = "ipg"; | |
440 | status = "disabled"; | |
441 | }; | |
442 | ||
443 | wdog0: watchdog@2ad0000 { | |
444 | compatible = "fsl,imx21-wdt"; | |
445 | reg = <0x0 0x2ad0000 0x0 0x10000>; | |
446 | interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; | |
447 | clocks = <&platform_clk 1>; | |
448 | clock-names = "wdog-en"; | |
449 | big-endian; | |
450 | }; | |
451 | ||
452 | sai1: sai@2b50000 { | |
50897cb6 | 453 | #sound-dai-cells = <0>; |
7239280c JL |
454 | compatible = "fsl,vf610-sai"; |
455 | reg = <0x0 0x2b50000 0x0 0x10000>; | |
456 | interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; | |
50897cb6 AW |
457 | clocks = <&platform_clk 1>, <&platform_clk 1>, |
458 | <&platform_clk 1>, <&platform_clk 1>; | |
459 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
7239280c JL |
460 | dma-names = "tx", "rx"; |
461 | dmas = <&edma0 1 47>, | |
462 | <&edma0 1 46>; | |
7239280c JL |
463 | status = "disabled"; |
464 | }; | |
465 | ||
466 | sai2: sai@2b60000 { | |
50897cb6 | 467 | #sound-dai-cells = <0>; |
7239280c JL |
468 | compatible = "fsl,vf610-sai"; |
469 | reg = <0x0 0x2b60000 0x0 0x10000>; | |
470 | interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; | |
50897cb6 AW |
471 | clocks = <&platform_clk 1>, <&platform_clk 1>, |
472 | <&platform_clk 1>, <&platform_clk 1>; | |
473 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
7239280c JL |
474 | dma-names = "tx", "rx"; |
475 | dmas = <&edma0 1 45>, | |
476 | <&edma0 1 44>; | |
7239280c JL |
477 | status = "disabled"; |
478 | }; | |
479 | ||
480 | edma0: edma@2c00000 { | |
481 | #dma-cells = <2>; | |
482 | compatible = "fsl,vf610-edma"; | |
483 | reg = <0x0 0x2c00000 0x0 0x10000>, | |
484 | <0x0 0x2c10000 0x0 0x10000>, | |
485 | <0x0 0x2c20000 0x0 0x10000>; | |
486 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, | |
487 | <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; | |
488 | interrupt-names = "edma-tx", "edma-err"; | |
489 | dma-channels = <32>; | |
490 | big-endian; | |
491 | clock-names = "dmamux0", "dmamux1"; | |
492 | clocks = <&platform_clk 1>, | |
493 | <&platform_clk 1>; | |
494 | }; | |
495 | ||
ab0087df MY |
496 | dcu: dcu@2ce0000 { |
497 | compatible = "fsl,ls1021a-dcu"; | |
498 | reg = <0x0 0x2ce0000 0x0 0x10000>; | |
499 | interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; | |
5d01e99e SA |
500 | clocks = <&platform_clk 0>, |
501 | <&platform_clk 0>; | |
502 | clock-names = "dcu", "pix"; | |
ab0087df MY |
503 | big-endian; |
504 | status = "disabled"; | |
505 | }; | |
506 | ||
7239280c JL |
507 | mdio0: mdio@2d24000 { |
508 | compatible = "gianfar"; | |
509 | device_type = "mdio"; | |
510 | #address-cells = <1>; | |
511 | #size-cells = <0>; | |
512 | reg = <0x0 0x2d24000 0x0 0x4000>; | |
513 | }; | |
514 | ||
3db66fdc YL |
515 | ptp_clock@2d10e00 { |
516 | compatible = "fsl,etsec-ptp"; | |
517 | reg = <0x0 0x2d10e00 0x0 0xb0>; | |
518 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
519 | fsl,tclk-period = <5>; | |
520 | fsl,tmr-prsc = <2>; | |
521 | fsl,tmr-add = <0xaaaaaaab>; | |
522 | fsl,tmr-fiper1 = <999999990>; | |
523 | fsl,tmr-fiper2 = <99990>; | |
524 | fsl,max-adj = <499999999>; | |
525 | }; | |
526 | ||
d69cb5d7 CM |
527 | enet0: ethernet@2d10000 { |
528 | compatible = "fsl,etsec2"; | |
529 | device_type = "network"; | |
530 | #address-cells = <2>; | |
531 | #size-cells = <2>; | |
532 | interrupt-parent = <&gic>; | |
533 | model = "eTSEC"; | |
534 | fsl,magic-packet; | |
535 | ranges; | |
70b5ea97 | 536 | dma-coherent; |
d69cb5d7 CM |
537 | |
538 | queue-group@2d10000 { | |
539 | #address-cells = <2>; | |
540 | #size-cells = <2>; | |
541 | reg = <0x0 0x2d10000 0x0 0x1000>; | |
542 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, | |
543 | <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, | |
544 | <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
545 | }; | |
546 | ||
547 | queue-group@2d14000 { | |
548 | #address-cells = <2>; | |
549 | #size-cells = <2>; | |
550 | reg = <0x0 0x2d14000 0x0 0x1000>; | |
551 | interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, | |
552 | <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, | |
553 | <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; | |
554 | }; | |
555 | }; | |
556 | ||
557 | enet1: ethernet@2d50000 { | |
558 | compatible = "fsl,etsec2"; | |
559 | device_type = "network"; | |
560 | #address-cells = <2>; | |
561 | #size-cells = <2>; | |
562 | interrupt-parent = <&gic>; | |
563 | model = "eTSEC"; | |
564 | ranges; | |
70b5ea97 | 565 | dma-coherent; |
d69cb5d7 CM |
566 | |
567 | queue-group@2d50000 { | |
568 | #address-cells = <2>; | |
569 | #size-cells = <2>; | |
570 | reg = <0x0 0x2d50000 0x0 0x1000>; | |
571 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, | |
572 | <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, | |
573 | <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
574 | }; | |
575 | ||
576 | queue-group@2d54000 { | |
577 | #address-cells = <2>; | |
578 | #size-cells = <2>; | |
579 | reg = <0x0 0x2d54000 0x0 0x1000>; | |
580 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, | |
581 | <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, | |
582 | <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
583 | }; | |
584 | }; | |
585 | ||
586 | enet2: ethernet@2d90000 { | |
587 | compatible = "fsl,etsec2"; | |
588 | device_type = "network"; | |
589 | #address-cells = <2>; | |
590 | #size-cells = <2>; | |
591 | interrupt-parent = <&gic>; | |
592 | model = "eTSEC"; | |
593 | ranges; | |
70b5ea97 | 594 | dma-coherent; |
d69cb5d7 CM |
595 | |
596 | queue-group@2d90000 { | |
597 | #address-cells = <2>; | |
598 | #size-cells = <2>; | |
599 | reg = <0x0 0x2d90000 0x0 0x1000>; | |
600 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, | |
601 | <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, | |
602 | <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
603 | }; | |
604 | ||
605 | queue-group@2d94000 { | |
606 | #address-cells = <2>; | |
607 | #size-cells = <2>; | |
608 | reg = <0x0 0x2d94000 0x0 0x1000>; | |
609 | interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, | |
610 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, | |
611 | <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; | |
612 | }; | |
613 | }; | |
614 | ||
7239280c JL |
615 | usb@8600000 { |
616 | compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; | |
617 | reg = <0x0 0x8600000 0x0 0x1000>; | |
618 | interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; | |
619 | dr_mode = "host"; | |
620 | phy_type = "ulpi"; | |
621 | }; | |
622 | ||
623 | usb3@3100000 { | |
624 | compatible = "snps,dwc3"; | |
625 | reg = <0x0 0x3100000 0x0 0x10000>; | |
626 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; | |
627 | dr_mode = "host"; | |
607e266c | 628 | snps,quirk-frame-length-adjustment = <0x20>; |
6f0808c4 | 629 | snps,dis_rxdet_inp3_quirk; |
7239280c | 630 | }; |
bc7abb47 ML |
631 | |
632 | pcie@3400000 { | |
633 | compatible = "fsl,ls1021a-pcie", "snps,dw-pcie"; | |
634 | reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ | |
635 | 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ | |
636 | reg-names = "regs", "config"; | |
637 | interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ | |
638 | fsl,pcie-scfg = <&scfg 0>; | |
639 | #address-cells = <3>; | |
640 | #size-cells = <2>; | |
641 | device_type = "pci"; | |
642 | num-lanes = <4>; | |
643 | bus-range = <0x0 0xff>; | |
644 | ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ | |
645 | 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | |
f4a458fd | 646 | msi-parent = <&msi1>; |
bc7abb47 ML |
647 | #interrupt-cells = <1>; |
648 | interrupt-map-mask = <0 0 0 7>; | |
649 | interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, | |
650 | <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, | |
651 | <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, | |
652 | <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; | |
653 | }; | |
654 | ||
655 | pcie@3500000 { | |
656 | compatible = "fsl,ls1021a-pcie", "snps,dw-pcie"; | |
657 | reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */ | |
658 | 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ | |
659 | reg-names = "regs", "config"; | |
660 | interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; | |
661 | fsl,pcie-scfg = <&scfg 1>; | |
662 | #address-cells = <3>; | |
663 | #size-cells = <2>; | |
664 | device_type = "pci"; | |
665 | num-lanes = <4>; | |
666 | bus-range = <0x0 0xff>; | |
667 | ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ | |
668 | 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | |
f4a458fd | 669 | msi-parent = <&msi2>; |
bc7abb47 ML |
670 | #interrupt-cells = <1>; |
671 | interrupt-map-mask = <0 0 0 7>; | |
672 | interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, | |
673 | <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, | |
674 | <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, | |
675 | <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; | |
676 | }; | |
7239280c JL |
677 | }; |
678 | }; |