Merge branch 'nvmf-4.8-rc' of git://git.infradead.org/nvme-fabrics into for-linus
[deliverable/linux.git] / arch / arm / boot / dts / mps2.dtsi
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1/*
2 * Copyright (C) 2015 ARM Limited
3 *
4 * Author: Vladimir Murzin <vladimir.murzin@arm.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include "armv7-m.dtsi"
46
47/ {
48 oscclk0: clk-osc0 {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <50000000>;
52 };
53
54 oscclk1: clk-osc1 {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <24576000>;
58 };
59
60 oscclk2: clk-osc2 {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <25000000>;
64 };
65
66 cfgclk: clk-cfg {
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <5000000>;
70 };
71
72 spicfgclk: clk-spicfg {
73 compatible = "fixed-clock";
74 #clock-cells = <0>;
75 clock-frequency = <75000000>;
76 };
77
78 sysclk: clk-sys {
79 compatible = "fixed-factor-clock";
80 clocks = <&oscclk0>;
81 #clock-cells = <0>;
82 clock-div = <2>;
83 clock-mult = <1>;
84 };
85
86 audmclk: clk-audm {
87 compatible = "fixed-factor-clock";
88 clocks = <&oscclk1>;
89 #clock-cells = <0>;
90 clock-div = <2>;
91 clock-mult = <1>;
92 };
93
94 audsclk: clk-auds {
95 compatible = "fixed-factor-clock";
96 clocks = <&oscclk1>;
97 #clock-cells = <0>;
98 clock-div = <8>;
99 clock-mult = <1>;
100 };
101
102 spiclcd: clk-cpiclcd {
103 compatible = "fixed-factor-clock";
104 clocks = <&oscclk0>;
105 #clock-cells = <0>;
106 clock-div = <2>;
107 clock-mult = <1>;
108 };
109
110 spicon: clk-spicon {
111 compatible = "fixed-factor-clock";
112 clocks = <&oscclk0>;
113 #clock-cells = <0>;
114 clock-div = <2>;
115 clock-mult = <1>;
116 };
117
118 i2cclcd: clk-i2cclcd {
119 compatible = "fixed-factor-clock";
120 clocks = <&oscclk0>;
121 #clock-cells = <0>;
122 clock-div = <2>;
123 clock-mult = <1>;
124 };
125
126 i2caud: clk-i2caud {
127 compatible = "fixed-factor-clock";
128 clocks = <&oscclk0>;
129 #clock-cells = <0>;
130 clock-div = <2>;
131 clock-mult = <1>;
132 };
133
134 soc {
135 compatible = "simple-bus";
136 ranges;
137
138 apb@40000000 {
139 compatible = "simple-bus";
140 #address-cells = <1>;
141 #size-cells = <1>;
142 ranges = <0 0x40000000 0x10000>;
143
144 timer0: mps2-timer0@0 {
145 compatible = "arm,mps2-timer";
146 reg = <0x0 0x1000>;
147 interrupts = <8>;
148 clocks = <&sysclk>;
149 status = "disabled";
150 };
151
152 timer1: mps2-timer1@1000 {
153 compatible = "arm,mps2-timer";
154 reg = <0x1000 0x1000>;
155 interrupts = <9>;
156 clocks = <&sysclk>;
157 status = "disabled";
158 };
159
160 timer2: dual-timer@2000 {
161 compatible = "arm,sp804";
162 reg = <0x2000 0x1000>;
163 clocks = <&sysclk>;
164 interrupts = <10>;
165 status = "disabled";
166 };
167
168 uart0: serial@4000 {
169 compatible = "arm,mps2-uart";
170 reg = <0x4000 0x1000>;
171 interrupts = <0 1 12>;
172 clocks = <&sysclk>;
173 status = "disabled";
174 };
175
176 uart1: serial@5000 {
177 compatible = "arm,mps2-uart";
178 reg = <0x5000 0x1000>;
179 interrupts = <2 3 12>;
180 clocks = <&sysclk>;
181 status = "disabled";
182 };
183
184 uart2: serial@6000 {
185 compatible = "arm,mps2-uart";
186 reg = <0x6000 0x1000>;
187 interrupts = <4 5 12>;
188 clocks = <&sysclk>;
189 status = "disabled";
190 };
191
192 wdt: watchdog@8000 {
193 compatible = "arm,sp805", "arm,primecell";
194 arm,primecell-periphid = <0x00141805>;
195 reg = <0x8000 0x1000>;
196 interrupts = <0>;
197 clocks = <&sysclk>;
198 clock-names = "apb_pclk";
199 status = "disabled";
200 };
201 };
202 };
203
204 fpga@40020000 {
205 compatible = "simple-bus";
206 #address-cells = <1>;
207 #size-cells = <1>;
208 ranges = <0 0x40020000 0x10000>;
209
210 fpgaio@8000 {
211 compatible = "syscon", "simple-mfd";
212 reg = <0x8000 0x10>;
213
214 led0 {
215 compatible = "register-bit-led";
216 offset = <0x0>;
217 mask = <0x01>;
218 label = "userled:0";
219 linux,default-trigger = "heartbeat";
220 default-state = "on";
221 };
222
223 led1 {
224 compatible = "register-bit-led";
225 offset = <0x0>;
226 mask = <0x02>;
227 label = "userled:1";
228 linux,default-trigger = "usr";
229 default-state = "off";
230 };
231 };
232 };
233
234 smb {
235 compatible = "simple-bus";
236 #address-cells = <2>;
237 #size-cells = <1>;
238 ranges = <0 0 0x40200000 0x10000>,
239 <1 0 0xa0000000 0x10000>;
240 };
241};
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