Commit | Line | Data |
---|---|---|
c446407c SB |
1 | /dts-v1/; |
2 | ||
3 | /include/ "skeleton.dtsi" | |
4 | ||
5 | / { | |
6 | model = "Qualcomm MSM8960 CDP"; | |
7 | compatible = "qcom,msm8960-cdp", "qcom,msm8960"; | |
8 | interrupt-parent = <&intc>; | |
9 | ||
10 | intc: interrupt-controller@2000000 { | |
11 | compatible = "qcom,msm-qgic2"; | |
12 | interrupt-controller; | |
13 | #interrupt-cells = <3>; | |
14 | reg = < 0x02000000 0x1000 >, | |
15 | < 0x02002000 0x1000 >; | |
16 | }; | |
17 | ||
18 | timer@200a004 { | |
19 | compatible = "qcom,msm-gpt", "qcom,msm-timer"; | |
20 | interrupts = <1 2 0x301>; | |
21 | reg = <0x0200a004 0x10>; | |
22 | clock-frequency = <32768>; | |
23 | cpu-offset = <0x80000>; | |
24 | }; | |
25 | ||
26 | timer@200a024 { | |
27 | compatible = "qcom,msm-dgt", "qcom,msm-timer"; | |
28 | interrupts = <1 1 0x301>; | |
29 | reg = <0x0200a024 0x10>, | |
30 | <0x0200a034 0x4>; | |
31 | clock-frequency = <6750000>; | |
32 | cpu-offset = <0x80000>; | |
33 | }; | |
34 | ||
35 | serial@19c400000 { | |
36 | compatible = "qcom,msm-hsuart", "qcom,msm-uart"; | |
37 | reg = <0x16440000 0x1000>, | |
38 | <0x16400000 0x1000>; | |
39 | interrupts = <0 154 0x0>; | |
40 | }; | |
41 | }; |