Commit | Line | Data |
---|---|---|
fb45105a DL |
1 | /* |
2 | * Support for CompuLab CM-T3517 | |
3 | */ | |
4 | /dts-v1/; | |
5 | ||
6 | #include "am3517.dtsi" | |
7 | #include "omap3-cm-t3x.dtsi" | |
8 | ||
9 | / { | |
10 | model = "CompuLab CM-T3517"; | |
11 | compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3"; | |
12 | ||
13 | vmmc: regulator-vmmc { | |
14 | compatible = "regulator-fixed"; | |
15 | regulator-name = "vmmc"; | |
16 | regulator-min-microvolt = <3300000>; | |
17 | regulator-max-microvolt = <3300000>; | |
18 | }; | |
19 | ||
20 | wl12xx_vmmc2: wl12xx_vmmc2 { | |
21 | compatible = "regulator-fixed"; | |
22 | regulator-name = "vw1271"; | |
23 | pinctrl-names = "default"; | |
24 | pinctrl-0 = < | |
25 | &wl12xx_wkup_pins | |
26 | &wl12xx_core_pins | |
27 | >; | |
28 | regulator-min-microvolt = <1800000>; | |
29 | regulator-max-microvolt = <1800000>; | |
30 | gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */ | |
31 | startup-delay-us = <20000>; | |
32 | enable-active-high; | |
33 | }; | |
34 | ||
35 | wl12xx_vaux2: wl12xx_vaux2 { | |
36 | compatible = "regulator-fixed"; | |
37 | regulator-name = "vwl1271_vaux2"; | |
38 | regulator-min-microvolt = <1800000>; | |
39 | regulator-max-microvolt = <1800000>; | |
40 | }; | |
41 | }; | |
42 | ||
43 | &omap3_pmx_wkup { | |
44 | ||
45 | wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins { | |
46 | pinctrl-single,pins = < | |
47 | OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */ | |
48 | OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */ | |
49 | >; | |
50 | }; | |
51 | }; | |
52 | ||
53 | &omap3_pmx_core { | |
54 | ||
55 | phy1_reset_pins: pinmux_hsusb1_phy_reset_pins { | |
56 | pinctrl-single,pins = < | |
57 | OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */ | |
58 | >; | |
59 | }; | |
60 | ||
61 | phy2_reset_pins: pinmux_hsusb2_phy_reset_pins { | |
62 | pinctrl-single,pins = < | |
63 | OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */ | |
64 | >; | |
65 | }; | |
66 | ||
67 | otg_drv_vbus: pinmux_otg_drv_vbus { | |
68 | pinctrl-single,pins = < | |
6a53bc75 | 69 | OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */ |
fb45105a DL |
70 | >; |
71 | }; | |
72 | ||
73 | mmc2_pins: pinmux_mmc2_pins { | |
74 | pinctrl-single,pins = < | |
75 | OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ | |
76 | OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ | |
77 | OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ | |
78 | OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ | |
79 | OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ | |
80 | OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ | |
81 | >; | |
82 | }; | |
83 | ||
84 | wl12xx_core_pins: pinmux_wl12xx_core_pins { | |
85 | pinctrl-single,pins = < | |
86 | OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */ | |
87 | OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */ | |
88 | >; | |
89 | }; | |
90 | ||
91 | usb_hub_pins: pinmux_usb_hub_pins { | |
92 | pinctrl-single,pins = < | |
93 | OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */ | |
94 | >; | |
95 | }; | |
96 | }; | |
97 | ||
98 | &hsusb1_phy { | |
99 | pinctrl-names = "default"; | |
100 | pinctrl-0 = <&phy1_reset_pins>; | |
101 | reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>; | |
102 | }; | |
103 | ||
104 | &hsusb2_phy { | |
105 | pinctrl-names = "default"; | |
106 | pinctrl-0 = <&phy2_reset_pins>; | |
107 | reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; | |
108 | }; | |
109 | ||
110 | &davinci_emac { | |
111 | status = "okay"; | |
112 | }; | |
113 | ||
114 | &davinci_mdio { | |
115 | status = "okay"; | |
116 | }; | |
117 | ||
118 | &am35x_otg_hs { | |
119 | status = "okay"; | |
120 | pinctrl-names = "default"; | |
121 | pinctrl-0 = <&otg_drv_vbus>; | |
122 | }; | |
123 | ||
124 | &mmc1 { | |
125 | vmmc-supply = <&vmmc>; | |
126 | }; | |
127 | ||
128 | &mmc2 { | |
129 | pinctrl-names = "default"; | |
130 | pinctrl-0 = <&mmc2_pins>; | |
131 | vmmc-supply = <&wl12xx_vmmc2>; | |
132 | vmmc_aux-supply = <&wl12xx_vaux2>; | |
133 | non-removable; | |
134 | bus-width = <4>; | |
135 | cap-power-off-card; | |
99f84cae EP |
136 | |
137 | #address-cells = <1>; | |
138 | #size-cells = <0>; | |
139 | wlcore: wlcore@2 { | |
140 | compatible = "ti,wl1271"; | |
141 | reg = <2>; | |
142 | interrupt-parent = <&gpio5>; | |
143 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 145 */ | |
144 | ref-clock-frequency = <38400000>; | |
145 | }; | |
fb45105a | 146 | }; |
e5ee042b DL |
147 | |
148 | &dss { | |
149 | status = "ok"; | |
150 | ||
151 | pinctrl-names = "default"; | |
152 | pinctrl-0 = < | |
153 | &dss_dpi_pins_common | |
154 | &dss_dpi_pins_cm_t35x | |
155 | >; | |
156 | }; | |
157 |