Commit | Line | Data |
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ebc13bf2 EBS |
1 | /* |
2 | * Common Device Tree Source for IGEPv2 | |
3 | * | |
4 | * Copyright (C) 2014 Javier Martinez Canillas <javier@collabora.co.uk> | |
5 | * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include "omap3-igep.dtsi" | |
13 | #include "omap-gpmc-smsc9221.dtsi" | |
14 | ||
15 | / { | |
16 | ||
17 | leds { | |
18 | pinctrl-names = "default"; | |
19 | pinctrl-0 = <&leds_pins>; | |
20 | compatible = "gpio-leds"; | |
21 | ||
22 | boot { | |
23 | label = "omap3:green:boot"; | |
24 | gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; | |
25 | default-state = "on"; | |
26 | }; | |
27 | ||
28 | user0 { | |
29 | label = "omap3:red:user0"; | |
30 | gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; | |
31 | default-state = "off"; | |
32 | }; | |
33 | ||
34 | user1 { | |
35 | label = "omap3:red:user1"; | |
36 | gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; | |
37 | default-state = "off"; | |
38 | }; | |
39 | ||
40 | user2 { | |
41 | label = "omap3:green:user1"; | |
42 | gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; | |
43 | }; | |
44 | }; | |
45 | ||
46 | /* HS USB Port 1 Power */ | |
47 | hsusb1_power: hsusb1_power_reg { | |
48 | compatible = "regulator-fixed"; | |
49 | regulator-name = "hsusb1_vbus"; | |
50 | regulator-min-microvolt = <3300000>; | |
51 | regulator-max-microvolt = <3300000>; | |
52 | gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ | |
53 | startup-delay-us = <70000>; | |
54 | }; | |
55 | ||
56 | /* HS USB Host PHY on PORT 1 */ | |
57 | hsusb1_phy: hsusb1_phy { | |
58 | compatible = "usb-nop-xceiv"; | |
59 | reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ | |
60 | vcc-supply = <&hsusb1_power>; | |
61 | }; | |
62 | ||
63 | tfp410: encoder@0 { | |
64 | compatible = "ti,tfp410"; | |
65 | powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */ | |
66 | ||
67 | ports { | |
68 | #address-cells = <1>; | |
69 | #size-cells = <0>; | |
70 | ||
71 | port@0 { | |
72 | reg = <0>; | |
73 | ||
74 | tfp410_in: endpoint@0 { | |
75 | remote-endpoint = <&dpi_out>; | |
76 | }; | |
77 | }; | |
78 | ||
79 | port@1 { | |
80 | reg = <1>; | |
81 | ||
82 | tfp410_out: endpoint@0 { | |
83 | remote-endpoint = <&dvi_connector_in>; | |
84 | }; | |
85 | }; | |
86 | }; | |
87 | }; | |
88 | ||
89 | dvi0: connector@0 { | |
90 | compatible = "dvi-connector"; | |
91 | label = "dvi"; | |
92 | ||
93 | digital; | |
94 | ||
95 | ddc-i2c-bus = <&i2c3>; | |
96 | ||
97 | port { | |
98 | dvi_connector_in: endpoint { | |
99 | remote-endpoint = <&tfp410_out>; | |
100 | }; | |
101 | }; | |
102 | }; | |
103 | }; | |
104 | ||
105 | &omap3_pmx_core { | |
106 | pinctrl-names = "default"; | |
107 | pinctrl-0 = < | |
108 | &tfp410_pins | |
109 | &dss_dpi_pins | |
110 | >; | |
111 | ||
112 | tfp410_pins: pinmux_tfp410_pins { | |
113 | pinctrl-single,pins = < | |
114 | 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ | |
115 | >; | |
116 | }; | |
117 | ||
118 | dss_dpi_pins: pinmux_dss_dpi_pins { | |
119 | pinctrl-single,pins = < | |
120 | 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ | |
121 | 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ | |
122 | 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ | |
123 | 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ | |
124 | 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ | |
125 | 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ | |
126 | 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ | |
127 | 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ | |
128 | 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ | |
129 | 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ | |
130 | 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ | |
131 | 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ | |
132 | 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ | |
133 | 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ | |
134 | 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ | |
135 | 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ | |
136 | 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ | |
137 | 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ | |
138 | 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ | |
139 | 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ | |
140 | 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ | |
141 | 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ | |
142 | 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ | |
143 | 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ | |
144 | 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ | |
145 | 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ | |
146 | 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ | |
147 | 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ | |
148 | >; | |
149 | }; | |
150 | ||
151 | uart2_pins: pinmux_uart2_pins { | |
152 | pinctrl-single,pins = < | |
153 | OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ | |
154 | OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ | |
155 | OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ | |
156 | OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ | |
157 | >; | |
158 | }; | |
159 | }; | |
160 | ||
161 | &omap3_pmx_core2 { | |
162 | pinctrl-names = "default"; | |
163 | pinctrl-0 = < | |
164 | &hsusbb1_pins | |
165 | >; | |
166 | ||
167 | hsusbb1_pins: pinmux_hsusbb1_pins { | |
168 | pinctrl-single,pins = < | |
169 | OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ | |
170 | OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ | |
171 | OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ | |
172 | OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ | |
173 | OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ | |
174 | OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ | |
175 | OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ | |
176 | OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ | |
177 | OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ | |
178 | OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ | |
179 | OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ | |
180 | OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ | |
181 | >; | |
182 | }; | |
183 | ||
184 | leds_pins: pinmux_leds_pins { | |
185 | pinctrl-single,pins = < | |
186 | OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ | |
187 | OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ | |
188 | OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ | |
189 | >; | |
190 | }; | |
191 | }; | |
192 | ||
193 | &i2c3 { | |
194 | clock-frequency = <100000>; | |
195 | ||
196 | /* | |
197 | * Display monitor features are burnt in the EEPROM | |
198 | * as EDID data. | |
199 | */ | |
200 | eeprom@50 { | |
201 | compatible = "ti,eeprom"; | |
202 | reg = <0x50>; | |
203 | }; | |
204 | }; | |
205 | ||
206 | &gpmc { | |
207 | ranges = <0 0 0x00000000 0x20000000>, | |
208 | <5 0 0x2c000000 0x01000000>; | |
209 | ||
210 | ethernet@gpmc { | |
211 | pinctrl-names = "default"; | |
212 | pinctrl-0 = <&smsc9221_pins>; | |
213 | reg = <5 0 0xff>; | |
214 | interrupt-parent = <&gpio6>; | |
215 | interrupts = <16 IRQ_TYPE_LEVEL_LOW>; | |
216 | }; | |
217 | }; | |
218 | ||
219 | &uart2 { | |
220 | pinctrl-names = "default"; | |
221 | pinctrl-0 = <&uart2_pins>; | |
222 | }; | |
223 | ||
224 | &usbhshost { | |
225 | port1-mode = "ehci-phy"; | |
226 | }; | |
227 | ||
228 | &usbhsehci { | |
229 | phys = <&hsusb1_phy>; | |
230 | }; | |
231 | ||
232 | &vpll2 { | |
233 | /* Needed for DSS */ | |
234 | regulator-name = "vdds_dsi"; | |
235 | }; | |
236 | ||
237 | &dss { | |
238 | status = "ok"; | |
239 | ||
240 | port { | |
241 | dpi_out: endpoint { | |
242 | remote-endpoint = <&tfp410_in>; | |
243 | data-lines = <24>; | |
244 | }; | |
245 | }; | |
246 | }; |