Commit | Line | Data |
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d9fda07a BC |
1 | /* |
2 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
6d624eab | 9 | #include <dt-bindings/gpio/gpio.h> |
8fea7d5a | 10 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
bcd3cca7 | 11 | #include <dt-bindings/pinctrl/omap.h> |
d9fda07a | 12 | |
98ef7957 | 13 | #include "skeleton.dtsi" |
d9fda07a BC |
14 | |
15 | / { | |
16 | compatible = "ti,omap4430", "ti,omap4"; | |
17 | interrupt-parent = <&gic>; | |
18 | ||
19 | aliases { | |
cf3c79de RN |
20 | serial0 = &uart1; |
21 | serial1 = &uart2; | |
22 | serial2 = &uart3; | |
23 | serial3 = &uart4; | |
d9fda07a BC |
24 | }; |
25 | ||
476b679a | 26 | cpus { |
eeb25fd5 LP |
27 | #address-cells = <1>; |
28 | #size-cells = <0>; | |
29 | ||
476b679a BC |
30 | cpu@0 { |
31 | compatible = "arm,cortex-a9"; | |
eeb25fd5 | 32 | device_type = "cpu"; |
926fd45b | 33 | next-level-cache = <&L2>; |
eeb25fd5 | 34 | reg = <0x0>; |
476b679a BC |
35 | }; |
36 | cpu@1 { | |
37 | compatible = "arm,cortex-a9"; | |
eeb25fd5 | 38 | device_type = "cpu"; |
926fd45b | 39 | next-level-cache = <&L2>; |
eeb25fd5 | 40 | reg = <0x1>; |
476b679a BC |
41 | }; |
42 | }; | |
43 | ||
5635121e BC |
44 | gic: interrupt-controller@48241000 { |
45 | compatible = "arm,cortex-a9-gic"; | |
46 | interrupt-controller; | |
47 | #interrupt-cells = <3>; | |
48 | reg = <0x48241000 0x1000>, | |
49 | <0x48240100 0x0100>; | |
50 | }; | |
51 | ||
926fd45b SS |
52 | L2: l2-cache-controller@48242000 { |
53 | compatible = "arm,pl310-cache"; | |
54 | reg = <0x48242000 0x1000>; | |
55 | cache-unified; | |
56 | cache-level = <2>; | |
57 | }; | |
58 | ||
eed0de27 SS |
59 | local-timer@0x48240600 { |
60 | compatible = "arm,cortex-a9-twd-timer"; | |
61 | reg = <0x48240600 0x20>; | |
8fea7d5a | 62 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; |
eed0de27 SS |
63 | }; |
64 | ||
d9fda07a BC |
65 | /* |
66 | * The soc node represents the soc top level view. It is uses for IPs | |
67 | * that are not memory mapped in the MPU view or for the MPU itself. | |
68 | */ | |
69 | soc { | |
70 | compatible = "ti,omap-infra"; | |
476b679a BC |
71 | mpu { |
72 | compatible = "ti,omap4-mpu"; | |
73 | ti,hwmods = "mpu"; | |
74 | }; | |
75 | ||
76 | dsp { | |
77 | compatible = "ti,omap3-c64"; | |
78 | ti,hwmods = "dsp"; | |
79 | }; | |
80 | ||
81 | iva { | |
82 | compatible = "ti,ivahd"; | |
83 | ti,hwmods = "iva"; | |
84 | }; | |
d9fda07a BC |
85 | }; |
86 | ||
87 | /* | |
88 | * XXX: Use a flat representation of the OMAP4 interconnect. | |
89 | * The real OMAP interconnect network is quite complex. | |
d9fda07a BC |
90 | * Since that will not bring real advantage to represent that in DT for |
91 | * the moment, just use a fake OCP bus entry to represent the whole bus | |
92 | * hierarchy. | |
93 | */ | |
94 | ocp { | |
ad8dfac6 | 95 | compatible = "ti,omap4-l3-noc", "simple-bus"; |
d9fda07a BC |
96 | #address-cells = <1>; |
97 | #size-cells = <1>; | |
98 | ranges; | |
ad8dfac6 | 99 | ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; |
20a60eaa SS |
100 | reg = <0x44000000 0x1000>, |
101 | <0x44800000 0x2000>, | |
102 | <0x45000000 0x1000>; | |
8fea7d5a FV |
103 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, |
104 | <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
d9fda07a | 105 | |
510c0ffd JH |
106 | counter32k: counter@4a304000 { |
107 | compatible = "ti,omap-counter32k"; | |
108 | reg = <0x4a304000 0x20>; | |
109 | ti,hwmods = "counter_32k"; | |
110 | }; | |
111 | ||
679e3310 TL |
112 | omap4_pmx_core: pinmux@4a100040 { |
113 | compatible = "ti,omap4-padconf", "pinctrl-single"; | |
114 | reg = <0x4a100040 0x0196>; | |
115 | #address-cells = <1>; | |
116 | #size-cells = <0>; | |
117 | pinctrl-single,register-width = <16>; | |
118 | pinctrl-single,function-mask = <0x7fff>; | |
119 | }; | |
120 | omap4_pmx_wkup: pinmux@4a31e040 { | |
121 | compatible = "ti,omap4-padconf", "pinctrl-single"; | |
122 | reg = <0x4a31e040 0x0038>; | |
123 | #address-cells = <1>; | |
124 | #size-cells = <0>; | |
125 | pinctrl-single,register-width = <16>; | |
126 | pinctrl-single,function-mask = <0x7fff>; | |
127 | }; | |
128 | ||
2c2dc545 JH |
129 | sdma: dma-controller@4a056000 { |
130 | compatible = "ti,omap4430-sdma"; | |
131 | reg = <0x4a056000 0x1000>; | |
8fea7d5a FV |
132 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, |
133 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, | |
134 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, | |
135 | <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
2c2dc545 JH |
136 | #dma-cells = <1>; |
137 | #dma-channels = <32>; | |
138 | #dma-requests = <127>; | |
139 | }; | |
140 | ||
e3e5a92d BC |
141 | gpio1: gpio@4a310000 { |
142 | compatible = "ti,omap4-gpio"; | |
48420dbc | 143 | reg = <0x4a310000 0x200>; |
8fea7d5a | 144 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
e3e5a92d | 145 | ti,hwmods = "gpio1"; |
e4b9b9f3 | 146 | ti,gpio-always-on; |
e3e5a92d BC |
147 | gpio-controller; |
148 | #gpio-cells = <2>; | |
149 | interrupt-controller; | |
ff5c9059 | 150 | #interrupt-cells = <2>; |
e3e5a92d BC |
151 | }; |
152 | ||
153 | gpio2: gpio@48055000 { | |
154 | compatible = "ti,omap4-gpio"; | |
48420dbc | 155 | reg = <0x48055000 0x200>; |
8fea7d5a | 156 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
e3e5a92d BC |
157 | ti,hwmods = "gpio2"; |
158 | gpio-controller; | |
159 | #gpio-cells = <2>; | |
160 | interrupt-controller; | |
ff5c9059 | 161 | #interrupt-cells = <2>; |
e3e5a92d BC |
162 | }; |
163 | ||
164 | gpio3: gpio@48057000 { | |
165 | compatible = "ti,omap4-gpio"; | |
48420dbc | 166 | reg = <0x48057000 0x200>; |
8fea7d5a | 167 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
e3e5a92d BC |
168 | ti,hwmods = "gpio3"; |
169 | gpio-controller; | |
170 | #gpio-cells = <2>; | |
171 | interrupt-controller; | |
ff5c9059 | 172 | #interrupt-cells = <2>; |
e3e5a92d BC |
173 | }; |
174 | ||
175 | gpio4: gpio@48059000 { | |
176 | compatible = "ti,omap4-gpio"; | |
48420dbc | 177 | reg = <0x48059000 0x200>; |
8fea7d5a | 178 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
e3e5a92d BC |
179 | ti,hwmods = "gpio4"; |
180 | gpio-controller; | |
181 | #gpio-cells = <2>; | |
182 | interrupt-controller; | |
ff5c9059 | 183 | #interrupt-cells = <2>; |
e3e5a92d BC |
184 | }; |
185 | ||
186 | gpio5: gpio@4805b000 { | |
187 | compatible = "ti,omap4-gpio"; | |
48420dbc | 188 | reg = <0x4805b000 0x200>; |
8fea7d5a | 189 | interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; |
e3e5a92d BC |
190 | ti,hwmods = "gpio5"; |
191 | gpio-controller; | |
192 | #gpio-cells = <2>; | |
193 | interrupt-controller; | |
ff5c9059 | 194 | #interrupt-cells = <2>; |
e3e5a92d BC |
195 | }; |
196 | ||
197 | gpio6: gpio@4805d000 { | |
198 | compatible = "ti,omap4-gpio"; | |
48420dbc | 199 | reg = <0x4805d000 0x200>; |
8fea7d5a | 200 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; |
e3e5a92d BC |
201 | ti,hwmods = "gpio6"; |
202 | gpio-controller; | |
203 | #gpio-cells = <2>; | |
204 | interrupt-controller; | |
ff5c9059 | 205 | #interrupt-cells = <2>; |
e3e5a92d | 206 | }; |
cf3c79de | 207 | |
1c7dbb55 JH |
208 | gpmc: gpmc@50000000 { |
209 | compatible = "ti,omap4430-gpmc"; | |
210 | reg = <0x50000000 0x1000>; | |
211 | #address-cells = <2>; | |
212 | #size-cells = <1>; | |
8fea7d5a | 213 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
1c7dbb55 JH |
214 | gpmc,num-cs = <8>; |
215 | gpmc,num-waitpins = <4>; | |
216 | ti,hwmods = "gpmc"; | |
217 | }; | |
218 | ||
19bfb76c | 219 | uart1: serial@4806a000 { |
cf3c79de | 220 | compatible = "ti,omap4-uart"; |
48420dbc | 221 | reg = <0x4806a000 0x100>; |
8fea7d5a | 222 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; |
cf3c79de RN |
223 | ti,hwmods = "uart1"; |
224 | clock-frequency = <48000000>; | |
225 | }; | |
226 | ||
19bfb76c | 227 | uart2: serial@4806c000 { |
cf3c79de | 228 | compatible = "ti,omap4-uart"; |
48420dbc | 229 | reg = <0x4806c000 0x100>; |
8fea7d5a | 230 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
cf3c79de RN |
231 | ti,hwmods = "uart2"; |
232 | clock-frequency = <48000000>; | |
233 | }; | |
234 | ||
19bfb76c | 235 | uart3: serial@48020000 { |
cf3c79de | 236 | compatible = "ti,omap4-uart"; |
48420dbc | 237 | reg = <0x48020000 0x100>; |
8fea7d5a | 238 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
cf3c79de RN |
239 | ti,hwmods = "uart3"; |
240 | clock-frequency = <48000000>; | |
241 | }; | |
242 | ||
19bfb76c | 243 | uart4: serial@4806e000 { |
cf3c79de | 244 | compatible = "ti,omap4-uart"; |
48420dbc | 245 | reg = <0x4806e000 0x100>; |
8fea7d5a | 246 | interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; |
cf3c79de RN |
247 | ti,hwmods = "uart4"; |
248 | clock-frequency = <48000000>; | |
249 | }; | |
58e778f9 BC |
250 | |
251 | i2c1: i2c@48070000 { | |
252 | compatible = "ti,omap4-i2c"; | |
48420dbc | 253 | reg = <0x48070000 0x100>; |
8fea7d5a | 254 | interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; |
58e778f9 BC |
255 | #address-cells = <1>; |
256 | #size-cells = <0>; | |
257 | ti,hwmods = "i2c1"; | |
258 | }; | |
259 | ||
260 | i2c2: i2c@48072000 { | |
261 | compatible = "ti,omap4-i2c"; | |
48420dbc | 262 | reg = <0x48072000 0x100>; |
8fea7d5a | 263 | interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; |
58e778f9 BC |
264 | #address-cells = <1>; |
265 | #size-cells = <0>; | |
266 | ti,hwmods = "i2c2"; | |
267 | }; | |
268 | ||
269 | i2c3: i2c@48060000 { | |
270 | compatible = "ti,omap4-i2c"; | |
48420dbc | 271 | reg = <0x48060000 0x100>; |
8fea7d5a | 272 | interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; |
58e778f9 BC |
273 | #address-cells = <1>; |
274 | #size-cells = <0>; | |
275 | ti,hwmods = "i2c3"; | |
276 | }; | |
277 | ||
278 | i2c4: i2c@48350000 { | |
279 | compatible = "ti,omap4-i2c"; | |
48420dbc | 280 | reg = <0x48350000 0x100>; |
8fea7d5a | 281 | interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; |
58e778f9 BC |
282 | #address-cells = <1>; |
283 | #size-cells = <0>; | |
284 | ti,hwmods = "i2c4"; | |
285 | }; | |
efcf1e50 BC |
286 | |
287 | mcspi1: spi@48098000 { | |
288 | compatible = "ti,omap4-mcspi"; | |
48420dbc | 289 | reg = <0x48098000 0x200>; |
8fea7d5a | 290 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
efcf1e50 BC |
291 | #address-cells = <1>; |
292 | #size-cells = <0>; | |
293 | ti,hwmods = "mcspi1"; | |
294 | ti,spi-num-cs = <4>; | |
2c2dc545 JH |
295 | dmas = <&sdma 35>, |
296 | <&sdma 36>, | |
297 | <&sdma 37>, | |
298 | <&sdma 38>, | |
299 | <&sdma 39>, | |
300 | <&sdma 40>, | |
301 | <&sdma 41>, | |
302 | <&sdma 42>; | |
303 | dma-names = "tx0", "rx0", "tx1", "rx1", | |
304 | "tx2", "rx2", "tx3", "rx3"; | |
efcf1e50 BC |
305 | }; |
306 | ||
307 | mcspi2: spi@4809a000 { | |
308 | compatible = "ti,omap4-mcspi"; | |
48420dbc | 309 | reg = <0x4809a000 0x200>; |
8fea7d5a | 310 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; |
efcf1e50 BC |
311 | #address-cells = <1>; |
312 | #size-cells = <0>; | |
313 | ti,hwmods = "mcspi2"; | |
314 | ti,spi-num-cs = <2>; | |
2c2dc545 JH |
315 | dmas = <&sdma 43>, |
316 | <&sdma 44>, | |
317 | <&sdma 45>, | |
318 | <&sdma 46>; | |
319 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
efcf1e50 BC |
320 | }; |
321 | ||
322 | mcspi3: spi@480b8000 { | |
323 | compatible = "ti,omap4-mcspi"; | |
48420dbc | 324 | reg = <0x480b8000 0x200>; |
8fea7d5a | 325 | interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; |
efcf1e50 BC |
326 | #address-cells = <1>; |
327 | #size-cells = <0>; | |
328 | ti,hwmods = "mcspi3"; | |
329 | ti,spi-num-cs = <2>; | |
2c2dc545 JH |
330 | dmas = <&sdma 15>, <&sdma 16>; |
331 | dma-names = "tx0", "rx0"; | |
efcf1e50 BC |
332 | }; |
333 | ||
334 | mcspi4: spi@480ba000 { | |
335 | compatible = "ti,omap4-mcspi"; | |
48420dbc | 336 | reg = <0x480ba000 0x200>; |
8fea7d5a | 337 | interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
efcf1e50 BC |
338 | #address-cells = <1>; |
339 | #size-cells = <0>; | |
340 | ti,hwmods = "mcspi4"; | |
341 | ti,spi-num-cs = <1>; | |
2c2dc545 JH |
342 | dmas = <&sdma 70>, <&sdma 71>; |
343 | dma-names = "tx0", "rx0"; | |
efcf1e50 | 344 | }; |
74981768 RN |
345 | |
346 | mmc1: mmc@4809c000 { | |
347 | compatible = "ti,omap4-hsmmc"; | |
48420dbc | 348 | reg = <0x4809c000 0x400>; |
8fea7d5a | 349 | interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; |
74981768 RN |
350 | ti,hwmods = "mmc1"; |
351 | ti,dual-volt; | |
352 | ti,needs-special-reset; | |
2c2dc545 JH |
353 | dmas = <&sdma 61>, <&sdma 62>; |
354 | dma-names = "tx", "rx"; | |
74981768 RN |
355 | }; |
356 | ||
357 | mmc2: mmc@480b4000 { | |
358 | compatible = "ti,omap4-hsmmc"; | |
48420dbc | 359 | reg = <0x480b4000 0x400>; |
8fea7d5a | 360 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
74981768 RN |
361 | ti,hwmods = "mmc2"; |
362 | ti,needs-special-reset; | |
2c2dc545 JH |
363 | dmas = <&sdma 47>, <&sdma 48>; |
364 | dma-names = "tx", "rx"; | |
74981768 RN |
365 | }; |
366 | ||
367 | mmc3: mmc@480ad000 { | |
368 | compatible = "ti,omap4-hsmmc"; | |
48420dbc | 369 | reg = <0x480ad000 0x400>; |
8fea7d5a | 370 | interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; |
74981768 RN |
371 | ti,hwmods = "mmc3"; |
372 | ti,needs-special-reset; | |
2c2dc545 JH |
373 | dmas = <&sdma 77>, <&sdma 78>; |
374 | dma-names = "tx", "rx"; | |
74981768 RN |
375 | }; |
376 | ||
377 | mmc4: mmc@480d1000 { | |
378 | compatible = "ti,omap4-hsmmc"; | |
48420dbc | 379 | reg = <0x480d1000 0x400>; |
8fea7d5a | 380 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; |
74981768 RN |
381 | ti,hwmods = "mmc4"; |
382 | ti,needs-special-reset; | |
2c2dc545 JH |
383 | dmas = <&sdma 57>, <&sdma 58>; |
384 | dma-names = "tx", "rx"; | |
74981768 RN |
385 | }; |
386 | ||
387 | mmc5: mmc@480d5000 { | |
388 | compatible = "ti,omap4-hsmmc"; | |
48420dbc | 389 | reg = <0x480d5000 0x400>; |
8fea7d5a | 390 | interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; |
74981768 RN |
391 | ti,hwmods = "mmc5"; |
392 | ti,needs-special-reset; | |
2c2dc545 JH |
393 | dmas = <&sdma 59>, <&sdma 60>; |
394 | dma-names = "tx", "rx"; | |
74981768 | 395 | }; |
94c30732 XJ |
396 | |
397 | wdt2: wdt@4a314000 { | |
398 | compatible = "ti,omap4-wdt", "ti,omap3-wdt"; | |
48420dbc | 399 | reg = <0x4a314000 0x80>; |
8fea7d5a | 400 | interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; |
94c30732 XJ |
401 | ti,hwmods = "wd_timer2"; |
402 | }; | |
4f4b5c74 PU |
403 | |
404 | mcpdm: mcpdm@40132000 { | |
405 | compatible = "ti,omap4-mcpdm"; | |
406 | reg = <0x40132000 0x7f>, /* MPU private access */ | |
407 | <0x49032000 0x7f>; /* L3 Interconnect */ | |
63467cf2 | 408 | reg-names = "mpu", "dma"; |
8fea7d5a | 409 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
4f4b5c74 | 410 | ti,hwmods = "mcpdm"; |
4e4ead73 SG |
411 | dmas = <&sdma 65>, |
412 | <&sdma 66>; | |
413 | dma-names = "up_link", "dn_link"; | |
4f4b5c74 | 414 | }; |
a4c38319 PU |
415 | |
416 | dmic: dmic@4012e000 { | |
417 | compatible = "ti,omap4-dmic"; | |
418 | reg = <0x4012e000 0x7f>, /* MPU private access */ | |
419 | <0x4902e000 0x7f>; /* L3 Interconnect */ | |
63467cf2 | 420 | reg-names = "mpu", "dma"; |
8fea7d5a | 421 | interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; |
a4c38319 | 422 | ti,hwmods = "dmic"; |
4e4ead73 SG |
423 | dmas = <&sdma 67>; |
424 | dma-names = "up_link"; | |
a4c38319 | 425 | }; |
61bc3544 | 426 | |
2995a100 PU |
427 | mcbsp1: mcbsp@40122000 { |
428 | compatible = "ti,omap4-mcbsp"; | |
429 | reg = <0x40122000 0xff>, /* MPU private access */ | |
430 | <0x49022000 0xff>; /* L3 Interconnect */ | |
431 | reg-names = "mpu", "dma"; | |
8fea7d5a | 432 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
2995a100 | 433 | interrupt-names = "common"; |
2995a100 PU |
434 | ti,buffer-size = <128>; |
435 | ti,hwmods = "mcbsp1"; | |
4e4ead73 SG |
436 | dmas = <&sdma 33>, |
437 | <&sdma 34>; | |
438 | dma-names = "tx", "rx"; | |
2995a100 PU |
439 | }; |
440 | ||
441 | mcbsp2: mcbsp@40124000 { | |
442 | compatible = "ti,omap4-mcbsp"; | |
443 | reg = <0x40124000 0xff>, /* MPU private access */ | |
444 | <0x49024000 0xff>; /* L3 Interconnect */ | |
445 | reg-names = "mpu", "dma"; | |
8fea7d5a | 446 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
2995a100 | 447 | interrupt-names = "common"; |
2995a100 PU |
448 | ti,buffer-size = <128>; |
449 | ti,hwmods = "mcbsp2"; | |
4e4ead73 SG |
450 | dmas = <&sdma 17>, |
451 | <&sdma 18>; | |
452 | dma-names = "tx", "rx"; | |
2995a100 PU |
453 | }; |
454 | ||
455 | mcbsp3: mcbsp@40126000 { | |
456 | compatible = "ti,omap4-mcbsp"; | |
457 | reg = <0x40126000 0xff>, /* MPU private access */ | |
458 | <0x49026000 0xff>; /* L3 Interconnect */ | |
459 | reg-names = "mpu", "dma"; | |
8fea7d5a | 460 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
2995a100 | 461 | interrupt-names = "common"; |
2995a100 PU |
462 | ti,buffer-size = <128>; |
463 | ti,hwmods = "mcbsp3"; | |
4e4ead73 SG |
464 | dmas = <&sdma 19>, |
465 | <&sdma 20>; | |
466 | dma-names = "tx", "rx"; | |
2995a100 PU |
467 | }; |
468 | ||
469 | mcbsp4: mcbsp@48096000 { | |
470 | compatible = "ti,omap4-mcbsp"; | |
471 | reg = <0x48096000 0xff>; /* L4 Interconnect */ | |
472 | reg-names = "mpu"; | |
8fea7d5a | 473 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
2995a100 | 474 | interrupt-names = "common"; |
2995a100 PU |
475 | ti,buffer-size = <128>; |
476 | ti,hwmods = "mcbsp4"; | |
4e4ead73 SG |
477 | dmas = <&sdma 31>, |
478 | <&sdma 32>; | |
479 | dma-names = "tx", "rx"; | |
2995a100 PU |
480 | }; |
481 | ||
61bc3544 SP |
482 | keypad: keypad@4a31c000 { |
483 | compatible = "ti,omap4-keypad"; | |
48420dbc | 484 | reg = <0x4a31c000 0x80>; |
8fea7d5a | 485 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; |
48420dbc | 486 | reg-names = "mpu"; |
61bc3544 SP |
487 | ti,hwmods = "kbd"; |
488 | }; | |
11c27069 A |
489 | |
490 | emif1: emif@4c000000 { | |
491 | compatible = "ti,emif-4d"; | |
48420dbc | 492 | reg = <0x4c000000 0x100>; |
8fea7d5a | 493 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; |
11c27069 A |
494 | ti,hwmods = "emif1"; |
495 | phy-type = <1>; | |
496 | hw-caps-read-idle-ctrl; | |
497 | hw-caps-ll-interface; | |
498 | hw-caps-temp-alert; | |
499 | }; | |
500 | ||
501 | emif2: emif@4d000000 { | |
502 | compatible = "ti,emif-4d"; | |
48420dbc | 503 | reg = <0x4d000000 0x100>; |
8fea7d5a | 504 | interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; |
11c27069 A |
505 | ti,hwmods = "emif2"; |
506 | phy-type = <1>; | |
507 | hw-caps-read-idle-ctrl; | |
508 | hw-caps-ll-interface; | |
509 | hw-caps-temp-alert; | |
510 | }; | |
8f446a7a | 511 | |
3ce0a99c | 512 | ocp2scp@4a0ad000 { |
59bafcf6 | 513 | compatible = "ti,omap-ocp2scp"; |
3ce0a99c | 514 | reg = <0x4a0ad000 0x1f>; |
59bafcf6 KVA |
515 | #address-cells = <1>; |
516 | #size-cells = <1>; | |
517 | ranges; | |
518 | ti,hwmods = "ocp2scp_usb_phy"; | |
cf0d869e KVA |
519 | usb2_phy: usb2phy@4a0ad080 { |
520 | compatible = "ti,omap-usb2"; | |
521 | reg = <0x4a0ad080 0x58>; | |
522 | ctrl-module = <&omap_control_usb>; | |
523 | }; | |
59bafcf6 | 524 | }; |
fab8ad0b JH |
525 | |
526 | timer1: timer@4a318000 { | |
002e1ec5 | 527 | compatible = "ti,omap3430-timer"; |
fab8ad0b | 528 | reg = <0x4a318000 0x80>; |
8fea7d5a | 529 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
530 | ti,hwmods = "timer1"; |
531 | ti,timer-alwon; | |
532 | }; | |
533 | ||
534 | timer2: timer@48032000 { | |
002e1ec5 | 535 | compatible = "ti,omap3430-timer"; |
fab8ad0b | 536 | reg = <0x48032000 0x80>; |
8fea7d5a | 537 | interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
538 | ti,hwmods = "timer2"; |
539 | }; | |
540 | ||
541 | timer3: timer@48034000 { | |
002e1ec5 | 542 | compatible = "ti,omap4430-timer"; |
fab8ad0b | 543 | reg = <0x48034000 0x80>; |
8fea7d5a | 544 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
545 | ti,hwmods = "timer3"; |
546 | }; | |
547 | ||
548 | timer4: timer@48036000 { | |
002e1ec5 | 549 | compatible = "ti,omap4430-timer"; |
fab8ad0b | 550 | reg = <0x48036000 0x80>; |
8fea7d5a | 551 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
552 | ti,hwmods = "timer4"; |
553 | }; | |
554 | ||
d03a93bb | 555 | timer5: timer@40138000 { |
002e1ec5 | 556 | compatible = "ti,omap4430-timer"; |
d03a93bb JH |
557 | reg = <0x40138000 0x80>, |
558 | <0x49038000 0x80>; | |
8fea7d5a | 559 | interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
560 | ti,hwmods = "timer5"; |
561 | ti,timer-dsp; | |
562 | }; | |
563 | ||
d03a93bb | 564 | timer6: timer@4013a000 { |
002e1ec5 | 565 | compatible = "ti,omap4430-timer"; |
d03a93bb JH |
566 | reg = <0x4013a000 0x80>, |
567 | <0x4903a000 0x80>; | |
8fea7d5a | 568 | interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
569 | ti,hwmods = "timer6"; |
570 | ti,timer-dsp; | |
571 | }; | |
572 | ||
d03a93bb | 573 | timer7: timer@4013c000 { |
002e1ec5 | 574 | compatible = "ti,omap4430-timer"; |
d03a93bb JH |
575 | reg = <0x4013c000 0x80>, |
576 | <0x4903c000 0x80>; | |
8fea7d5a | 577 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
578 | ti,hwmods = "timer7"; |
579 | ti,timer-dsp; | |
580 | }; | |
581 | ||
d03a93bb | 582 | timer8: timer@4013e000 { |
002e1ec5 | 583 | compatible = "ti,omap4430-timer"; |
d03a93bb JH |
584 | reg = <0x4013e000 0x80>, |
585 | <0x4903e000 0x80>; | |
8fea7d5a | 586 | interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
587 | ti,hwmods = "timer8"; |
588 | ti,timer-pwm; | |
589 | ti,timer-dsp; | |
590 | }; | |
591 | ||
592 | timer9: timer@4803e000 { | |
002e1ec5 | 593 | compatible = "ti,omap4430-timer"; |
fab8ad0b | 594 | reg = <0x4803e000 0x80>; |
8fea7d5a | 595 | interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
596 | ti,hwmods = "timer9"; |
597 | ti,timer-pwm; | |
598 | }; | |
599 | ||
600 | timer10: timer@48086000 { | |
002e1ec5 | 601 | compatible = "ti,omap3430-timer"; |
fab8ad0b | 602 | reg = <0x48086000 0x80>; |
8fea7d5a | 603 | interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
604 | ti,hwmods = "timer10"; |
605 | ti,timer-pwm; | |
606 | }; | |
607 | ||
608 | timer11: timer@48088000 { | |
002e1ec5 | 609 | compatible = "ti,omap4430-timer"; |
fab8ad0b | 610 | reg = <0x48088000 0x80>; |
8fea7d5a | 611 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
fab8ad0b JH |
612 | ti,hwmods = "timer11"; |
613 | ti,timer-pwm; | |
614 | }; | |
f17c8994 RQ |
615 | |
616 | usbhstll: usbhstll@4a062000 { | |
617 | compatible = "ti,usbhs-tll"; | |
618 | reg = <0x4a062000 0x1000>; | |
8fea7d5a | 619 | interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; |
f17c8994 RQ |
620 | ti,hwmods = "usb_tll_hs"; |
621 | }; | |
622 | ||
623 | usbhshost: usbhshost@4a064000 { | |
624 | compatible = "ti,usbhs-host"; | |
625 | reg = <0x4a064000 0x800>; | |
626 | ti,hwmods = "usb_host_hs"; | |
627 | #address-cells = <1>; | |
628 | #size-cells = <1>; | |
629 | ranges; | |
630 | ||
631 | usbhsohci: ohci@4a064800 { | |
632 | compatible = "ti,ohci-omap3", "usb-ohci"; | |
633 | reg = <0x4a064800 0x400>; | |
634 | interrupt-parent = <&gic>; | |
8fea7d5a | 635 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; |
f17c8994 RQ |
636 | }; |
637 | ||
638 | usbhsehci: ehci@4a064c00 { | |
639 | compatible = "ti,ehci-omap", "usb-ehci"; | |
640 | reg = <0x4a064c00 0x400>; | |
641 | interrupt-parent = <&gic>; | |
8fea7d5a | 642 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
f17c8994 RQ |
643 | }; |
644 | }; | |
840e5fd8 KVA |
645 | |
646 | omap_control_usb: omap-control-usb@4a002300 { | |
647 | compatible = "ti,omap-control-usb"; | |
648 | reg = <0x4a002300 0x4>, | |
649 | <0x4a00233c 0x4>; | |
650 | reg-names = "control_dev_conf", "otghs_control"; | |
651 | ti,type = <1>; | |
652 | }; | |
ad871c10 KVA |
653 | |
654 | usb_otg_hs: usb_otg_hs@4a0ab000 { | |
655 | compatible = "ti,omap4-musb"; | |
656 | reg = <0x4a0ab000 0x7ff>; | |
8fea7d5a | 657 | interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; |
ad871c10 KVA |
658 | interrupt-names = "mc", "dma"; |
659 | ti,hwmods = "usb_otg_hs"; | |
660 | usb-phy = <&usb2_phy>; | |
661 | multipoint = <1>; | |
662 | num-eps = <16>; | |
663 | ram-bits = <12>; | |
664 | ti,has-mailbox; | |
665 | }; | |
d9fda07a BC |
666 | }; |
667 | }; |