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1bffb4a8 TP |
1 | /* |
2 | * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
3 | * | |
4 | * This file is licensed under the terms of the GNU General Public | |
5 | * License version 2. This program is licensed "as is" without any | |
6 | * warranty of any kind, whether express or implied. | |
7 | */ | |
8 | ||
48be9707 | 9 | #include "skeleton.dtsi" |
1bffb4a8 | 10 | |
5c697664 TP |
11 | #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) |
12 | ||
1bffb4a8 TP |
13 | / { |
14 | model = "Marvell Orion5x SoC"; | |
15 | compatible = "marvell,orion5x"; | |
16 | interrupt-parent = <&intc>; | |
17 | ||
835f6322 AC |
18 | aliases { |
19 | gpio0 = &gpio0; | |
20 | }; | |
cabbd6bd | 21 | |
5c697664 TP |
22 | soc { |
23 | #address-cells = <2>; | |
1bffb4a8 | 24 | #size-cells = <1>; |
5c697664 | 25 | controller = <&mbusc>; |
1bffb4a8 | 26 | |
5c697664 TP |
27 | internal-regs { |
28 | compatible = "simple-bus"; | |
6226cf18 | 29 | #address-cells = <1>; |
5c697664 TP |
30 | #size-cells = <1>; |
31 | ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>; | |
32 | ||
33 | gpio0: gpio@10100 { | |
34 | compatible = "marvell,orion-gpio"; | |
35 | #gpio-cells = <2>; | |
36 | gpio-controller; | |
37 | reg = <0x10100 0x40>; | |
38 | ngpios = <32>; | |
39 | interrupt-controller; | |
40 | #interrupt-cells = <2>; | |
41 | interrupts = <6>, <7>, <8>, <9>; | |
42 | }; | |
6226cf18 | 43 | |
2958316d | 44 | spi: spi@10600 { |
5c697664 TP |
45 | compatible = "marvell,orion-spi"; |
46 | #address-cells = <1>; | |
47 | #size-cells = <0>; | |
48 | cell-index = <0>; | |
49 | reg = <0x10600 0x28>; | |
50 | status = "disabled"; | |
51 | }; | |
1bffb4a8 | 52 | |
2958316d | 53 | i2c: i2c@11000 { |
5c697664 TP |
54 | compatible = "marvell,mv64xxx-i2c"; |
55 | reg = <0x11000 0x20>; | |
56 | #address-cells = <1>; | |
57 | #size-cells = <0>; | |
58 | interrupts = <5>; | |
59 | clock-frequency = <100000>; | |
60 | status = "disabled"; | |
61 | }; | |
1bffb4a8 | 62 | |
2958316d | 63 | uart0: serial@12000 { |
5c697664 TP |
64 | compatible = "ns16550a"; |
65 | reg = <0x12000 0x100>; | |
66 | reg-shift = <2>; | |
67 | interrupts = <3>; | |
68 | /* set clock-frequency in board dts */ | |
69 | status = "disabled"; | |
70 | }; | |
0fb28811 | 71 | |
2958316d | 72 | uart1: serial@12100 { |
5c697664 TP |
73 | compatible = "ns16550a"; |
74 | reg = <0x12100 0x100>; | |
75 | reg-shift = <2>; | |
76 | interrupts = <4>; | |
77 | /* set clock-frequency in board dts */ | |
78 | status = "disabled"; | |
79 | }; | |
1bffb4a8 | 80 | |
5c697664 TP |
81 | intc: interrupt-controller@20200 { |
82 | compatible = "marvell,orion-intc"; | |
83 | interrupt-controller; | |
84 | #interrupt-cells = <1>; | |
85 | reg = <0x20200 0x08>; | |
86 | }; | |
48e86997 | 87 | |
2958316d | 88 | wdt: wdt@20300 { |
5c697664 TP |
89 | compatible = "marvell,orion-wdt"; |
90 | reg = <0x20300 0x28>; | |
91 | status = "okay"; | |
92 | }; | |
4504607f | 93 | |
2958316d | 94 | ehci0: ehci@50000 { |
5c697664 TP |
95 | compatible = "marvell,orion-ehci"; |
96 | reg = <0x50000 0x1000>; | |
97 | interrupts = <17>; | |
98 | status = "disabled"; | |
4504607f | 99 | }; |
5c697664 | 100 | |
2958316d | 101 | xor: xor@60900 { |
5c697664 TP |
102 | compatible = "marvell,orion-xor"; |
103 | reg = <0x60900 0x100 | |
104 | 0x60b00 0x100>; | |
105 | status = "okay"; | |
106 | ||
107 | xor00 { | |
108 | interrupts = <30>; | |
109 | dmacap,memcpy; | |
110 | dmacap,xor; | |
111 | }; | |
112 | xor01 { | |
113 | interrupts = <31>; | |
114 | dmacap,memcpy; | |
115 | dmacap,xor; | |
116 | dmacap,memset; | |
117 | }; | |
4504607f | 118 | }; |
4504607f | 119 | |
5c697664 TP |
120 | eth: ethernet-controller@72000 { |
121 | compatible = "marvell,orion-eth"; | |
122 | #address-cells = <1>; | |
123 | #size-cells = <0>; | |
124 | reg = <0x72000 0x4000>; | |
125 | marvell,tx-checksum-limit = <1600>; | |
126 | status = "disabled"; | |
127 | ||
2958316d | 128 | ethport: ethernet-port@0 { |
5c697664 TP |
129 | compatible = "marvell,orion-eth-port"; |
130 | reg = <0>; | |
131 | /* overwrite MAC address in bootloader */ | |
132 | local-mac-address = [00 00 00 00 00 00]; | |
133 | /* set phy-handle property in board file */ | |
134 | }; | |
99d6455b | 135 | }; |
6226cf18 | 136 | |
5c697664 TP |
137 | mdio: mdio-bus@72004 { |
138 | compatible = "marvell,orion-mdio"; | |
139 | #address-cells = <1>; | |
140 | #size-cells = <0>; | |
141 | reg = <0x72004 0x84>; | |
142 | interrupts = <22>; | |
143 | status = "disabled"; | |
6226cf18 | 144 | |
5c697664 TP |
145 | /* add phy nodes in board file */ |
146 | }; | |
147 | ||
2958316d | 148 | sata: sata@80000 { |
5c697664 TP |
149 | compatible = "marvell,orion-sata"; |
150 | reg = <0x80000 0x5000>; | |
151 | interrupts = <29>; | |
152 | status = "disabled"; | |
153 | }; | |
6226cf18 | 154 | |
2958316d | 155 | ehci1: ehci@a0000 { |
5c697664 TP |
156 | compatible = "marvell,orion-ehci"; |
157 | reg = <0xa0000 0x1000>; | |
158 | interrupts = <12>; | |
159 | status = "disabled"; | |
160 | }; | |
6226cf18 JC |
161 | }; |
162 | ||
2958316d | 163 | cesa: crypto@90000 { |
6226cf18 | 164 | compatible = "marvell,orion-crypto"; |
5c697664 TP |
165 | reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>, |
166 | <MBUS_ID(0x09, 0x00) 0x0 0x800>; | |
6226cf18 JC |
167 | reg-names = "regs", "sram"; |
168 | interrupts = <28>; | |
169 | status = "okay"; | |
170 | }; | |
1bffb4a8 TP |
171 | }; |
172 | }; |