Commit | Line | Data |
---|---|---|
aff18a67 | 1 | /* The pxa3xx skeleton simply augments the 2xx version */ |
85fe55c1 RJ |
2 | #include "pxa2xx.dtsi" |
3 | #include "dt-bindings/clock/pxa2xx-clock.h" | |
aff18a67 DM |
4 | |
5 | / { | |
6 | model = "Marvell PXA27x familiy SoC"; | |
7 | compatible = "marvell,pxa27x"; | |
8 | ||
9 | pxabus { | |
10 | pxairq: interrupt-controller@40d00000 { | |
11 | marvell,intc-priority; | |
12 | marvell,intc-nr-irqs = <34>; | |
13 | }; | |
e7b4a8df MD |
14 | |
15 | pwm0: pwm@40b00000 { | |
16 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
17 | reg = <0x40b00000 0x10>; | |
18 | #pwm-cells = <1>; | |
19 | }; | |
20 | ||
21 | pwm1: pwm@40b00010 { | |
22 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
23 | reg = <0x40b00010 0x10>; | |
24 | #pwm-cells = <1>; | |
25 | }; | |
26 | ||
27 | pwm2: pwm@40c00000 { | |
28 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
29 | reg = <0x40c00000 0x10>; | |
30 | #pwm-cells = <1>; | |
31 | }; | |
32 | ||
33 | pwm3: pwm@40c00010 { | |
34 | compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | |
35 | reg = <0x40c00010 0x10>; | |
36 | #pwm-cells = <1>; | |
37 | }; | |
aff18a67 | 38 | }; |
85fe55c1 RJ |
39 | |
40 | clocks { | |
41 | /* | |
42 | * The muxing of external clocks/internal dividers for osc* clock | |
43 | * sources has been hidden under the carpet by now. | |
44 | */ | |
45 | #address-cells = <1>; | |
46 | #size-cells = <1>; | |
47 | ranges; | |
48 | ||
49 | pxa2xx_clks: pxa2xx_clks@41300004 { | |
50 | compatible = "marvell,pxa-clocks"; | |
51 | #clock-cells = <1>; | |
52 | status = "okay"; | |
53 | }; | |
54 | }; | |
55 | ||
aff18a67 | 56 | }; |