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dbe9e6f6 MM |
1 | /* Copyright (c) 2015, The Linux Foundation. All rights reserved. |
2 | * | |
3 | * Permission to use, copy, modify, and/or distribute this software for any | |
4 | * purpose with or without fee is hereby granted, provided that the above | |
5 | * copyright notice and this permission notice appear in all copies. | |
6 | * | |
7 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
8 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
9 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
10 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
11 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
12 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
13 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include "qcom-ipq4019.dtsi" | |
18 | ||
19 | / { | |
20 | model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1"; | |
21 | compatible = "qcom,ipq4019"; | |
22 | ||
23 | clocks { | |
24 | xo: xo { | |
25 | compatible = "fixed-clock"; | |
26 | clock-frequency = <48000000>; | |
27 | #clock-cells = <0>; | |
28 | }; | |
29 | }; | |
30 | ||
31 | soc { | |
32 | ||
33 | ||
34 | timer { | |
35 | compatible = "arm,armv7-timer"; | |
36 | interrupts = <1 2 0xf08>, | |
37 | <1 3 0xf08>, | |
38 | <1 4 0xf08>, | |
39 | <1 1 0xf08>; | |
40 | clock-frequency = <48000000>; | |
41 | }; | |
42 | ||
43 | pinctrl@0x01000000 { | |
44 | serial_pins: serial_pinmux { | |
45 | mux { | |
46 | pins = "gpio60", "gpio61"; | |
47 | function = "blsp_uart0"; | |
48 | bias-disable; | |
49 | }; | |
50 | }; | |
13ad4fd3 MM |
51 | |
52 | spi_0_pins: spi_0_pinmux { | |
53 | pinmux { | |
54 | function = "blsp_spi0"; | |
55 | pins = "gpio55", "gpio56", "gpio57"; | |
56 | }; | |
57 | pinmux_cs { | |
58 | function = "gpio"; | |
59 | pins = "gpio54"; | |
60 | }; | |
61 | pinconf { | |
62 | pins = "gpio55", "gpio56", "gpio57"; | |
63 | drive-strength = <12>; | |
64 | bias-disable; | |
65 | }; | |
66 | pinconf_cs { | |
67 | pins = "gpio54"; | |
68 | drive-strength = <2>; | |
69 | bias-disable; | |
70 | output-high; | |
71 | }; | |
72 | }; | |
73 | }; | |
74 | ||
9ca595f0 MM |
75 | blsp_dma: dma@7884000 { |
76 | status = "ok"; | |
77 | }; | |
78 | ||
13ad4fd3 MM |
79 | spi_0: spi@78b5000 { |
80 | pinctrl-0 = <&spi_0_pins>; | |
81 | pinctrl-names = "default"; | |
82 | status = "ok"; | |
83 | cs-gpios = <&tlmm 54 0>; | |
84 | ||
85 | mx25l25635e@0 { | |
86 | #address-cells = <1>; | |
87 | #size-cells = <1>; | |
88 | reg = <0>; | |
89 | compatible = "mx25l25635e"; | |
90 | spi-max-frequency = <24000000>; | |
91 | }; | |
dbe9e6f6 MM |
92 | }; |
93 | ||
94 | serial@78af000 { | |
95 | pinctrl-0 = <&serial_pins>; | |
96 | pinctrl-names = "default"; | |
97 | status = "ok"; | |
98 | }; | |
40057afd | 99 | |
fd6fd386 MM |
100 | cryptobam: dma@8e04000 { |
101 | status = "ok"; | |
102 | }; | |
103 | ||
104 | crypto@8e3a000 { | |
105 | status = "ok"; | |
106 | }; | |
107 | ||
40057afd MM |
108 | watchdog@b017000 { |
109 | status = "ok"; | |
110 | }; | |
dbe9e6f6 MM |
111 | }; |
112 | }; |