Commit | Line | Data |
---|---|---|
2aec37c6 RV |
1 | /dts-v1/; |
2 | ||
3 | #include "skeleton.dtsi" | |
4 | ||
5 | / { | |
6 | model = "Qualcomm MSM8974"; | |
7 | compatible = "qcom,msm8974"; | |
8 | interrupt-parent = <&intc>; | |
9 | ||
10 | soc: soc { | |
11 | #address-cells = <1>; | |
12 | #size-cells = <1>; | |
13 | ranges; | |
14 | compatible = "simple-bus"; | |
15 | ||
16 | intc: interrupt-controller@f9000000 { | |
17 | compatible = "qcom,msm-qgic2"; | |
18 | interrupt-controller; | |
19 | #interrupt-cells = <3>; | |
20 | reg = <0xf9000000 0x1000>, | |
21 | <0xf9002000 0x1000>; | |
22 | }; | |
23 | ||
24 | timer { | |
25 | compatible = "arm,armv7-timer"; | |
26 | interrupts = <1 2 0xf08>, | |
27 | <1 3 0xf08>, | |
28 | <1 4 0xf08>, | |
29 | <1 1 0xf08>; | |
30 | clock-frequency = <19200000>; | |
31 | }; | |
74e848f6 SB |
32 | |
33 | restart@fc4ab000 { | |
34 | compatible = "qcom,pshold"; | |
35 | reg = <0xfc4ab000 0x4>; | |
36 | }; | |
2aec37c6 RV |
37 | }; |
38 | }; |