[deliverable/linux.git] / arch / arm / boot / dts / r8a7778.dtsi

/*
 * Device Tree Source for Renesas r8a7778
 *
 * Copyright (C) 2013  Renesas Solutions Corp.
 * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
 *
 * based on r8a7779
 *
 * Copyright (C) 2013 Renesas Solutions Corp.
 * Copyright (C) 2013 Simon Horman
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "renesas,r8a7778";
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
			clock-frequency = <800000000>;
		};
	};

	aliases {
		spi0 = &hspi0;
		spi1 = &hspi1;
		spi2 = &hspi2;
	};

	gic: interrupt-controller@fe438000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xfe438000 0x1000>,
		      <0xfe430000 0x100>;
	};

	/* irqpin: IRQ0 - IRQ3 */
	irqpin: irqpin@fe78001c {
		compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		status = "disabled"; /* default off */
		reg =	<0xfe78001c 4>,
			<0xfe780010 4>,
			<0xfe780024 4>,
			<0xfe780044 4>,
			<0xfe780064 4>;
		interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
				0 28 IRQ_TYPE_LEVEL_HIGH
				0 29 IRQ_TYPE_LEVEL_HIGH
				0 30 IRQ_TYPE_LEVEL_HIGH>;
		sense-bitfield-width = <2>;
	};

	gpio0: gpio@ffc40000 {
		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
		reg = <0xffc40000 0x2c>;
		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 0 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio1: gpio@ffc41000 {
		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
		reg = <0xffc41000 0x2c>;
		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 32 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio2: gpio@ffc42000 {
		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
		reg = <0xffc42000 0x2c>;
		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 64 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio3: gpio@ffc43000 {
		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
		reg = <0xffc43000 0x2c>;
		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 96 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio4: gpio@ffc44000 {
		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
		reg = <0xffc44000 0x2c>;
		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 128 27>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	pfc: pfc@fffc0000 {
		compatible = "renesas,pfc-r8a7778";
		reg = <0xfffc0000 0x118>;
	};

	i2c0: i2c@ffc70000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,i2c-r8a7778";
		reg = <0xffc70000 0x1000>;
		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c1: i2c@ffc71000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,i2c-r8a7778";
		reg = <0xffc71000 0x1000>;
		interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c2: i2c@ffc72000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,i2c-r8a7778";
		reg = <0xffc72000 0x1000>;
		interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c3: i2c@ffc73000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,i2c-r8a7778";
		reg = <0xffc73000 0x1000>;
		interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	tmu0: timer@ffd80000 {
		compatible = "renesas,tmu-r8a7778", "renesas,tmu";
		reg = <0xffd80000 0x30>;
		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
			     <0 33 IRQ_TYPE_LEVEL_HIGH>,
			     <0 34 IRQ_TYPE_LEVEL_HIGH>;

		#renesas,channels = <3>;

		status = "disabled";
	};

	tmu1: timer@ffd81000 {
		compatible = "renesas,tmu-r8a7778", "renesas,tmu";
		reg = <0xffd81000 0x30>;
		interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
			     <0 37 IRQ_TYPE_LEVEL_HIGH>,
			     <0 38 IRQ_TYPE_LEVEL_HIGH>;

		#renesas,channels = <3>;

		status = "disabled";
	};

	tmu2: timer@ffd82000 {
		compatible = "renesas,tmu-r8a7778", "renesas,tmu";
		reg = <0xffd82000 0x30>;
		interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
			     <0 41 IRQ_TYPE_LEVEL_HIGH>,
			     <0 42 IRQ_TYPE_LEVEL_HIGH>;

		#renesas,channels = <3>;

		status = "disabled";
	};

	scif0: serial@ffe40000 {
		compatible = "renesas,scif-r8a7778", "renesas,scif";
		reg = <0xffe40000 0x100>;
		interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	scif1: serial@ffe41000 {
		compatible = "renesas,scif-r8a7778", "renesas,scif";
		reg = <0xffe41000 0x100>;
		interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	scif2: serial@ffe42000 {
		compatible = "renesas,scif-r8a7778", "renesas,scif";
		reg = <0xffe42000 0x100>;
		interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	scif3: serial@ffe43000 {
		compatible = "renesas,scif-r8a7778", "renesas,scif";
		reg = <0xffe43000 0x100>;
		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	scif4: serial@ffe44000 {
		compatible = "renesas,scif-r8a7778", "renesas,scif";
		reg = <0xffe44000 0x100>;
		interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	scif5: serial@ffe45000 {
		compatible = "renesas,scif-r8a7778", "renesas,scif";
		reg = <0xffe45000 0x100>;
		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	mmcif: mmc@ffe4e000 {
		compatible = "renesas,sh-mmcif";
		reg = <0xffe4e000 0x100>;
		interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	sdhi0: sd@ffe4c000 {
		compatible = "renesas,sdhi-r8a7778";
		reg = <0xffe4c000 0x100>;
		interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	sdhi1: sd@ffe4d000 {
		compatible = "renesas,sdhi-r8a7778";
		reg = <0xffe4d000 0x100>;
		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	sdhi2: sd@ffe4f000 {
		compatible = "renesas,sdhi-r8a7778";
		reg = <0xffe4f000 0x100>;
		interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	hspi0: spi@fffc7000 {
		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
		reg = <0xfffc7000 0x18>;
		interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	hspi1: spi@fffc8000 {
		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
		reg = <0xfffc8000 0x18>;
		interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	hspi2: spi@fffc6000 {
		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
		reg = <0xfffc6000 0x18>;
		interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
ccb7cc74 KM	1	/*
	2	* Device Tree Source for Renesas r8a7778
	3	*
	4	* Copyright (C) 2013 Renesas Solutions Corp.
	5	* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
	6	*
	7	* based on r8a7779
	8	*
	9	* Copyright (C) 2013 Renesas Solutions Corp.
	10	* Copyright (C) 2013 Simon Horman
	11	*
	12	* This file is licensed under the terms of the GNU General Public License
	13	* version 2. This program is licensed "as is" without any warranty of any
	14	* kind, whether express or implied.
	15	*/
	16
	17	/include/ "skeleton.dtsi"
	18
5f75e73c LP	19	#include <dt-bindings/interrupt-controller/irq.h>
5f75e73c LP	20
ccb7cc74 KM	21	/ {
ccb7cc74 KM	22	compatible = "renesas,r8a7778";
9ff254ad	23	interrupt-parent = <&gic>;
ccb7cc74 KM	24
ccb7cc74 KM	25	cpus {
869f92ae MD	26	#address-cells = <1>;
	27	#size-cells = <0>;
	28
ccb7cc74	29	cpu@0 {
869f92ae	30	device_type = "cpu";
ccb7cc74	31	compatible = "arm,cortex-a9";
869f92ae MD	32	reg = <0>;
869f92ae MD	33	clock-frequency = <800000000>;
ccb7cc74 KM	34	};
	35	};
	36
a50da085 KM	37	aliases {
	38	spi0 = &hspi0;
	39	spi1 = &hspi1;
	40	spi2 = &hspi2;
	41	};
	42
ccb7cc74 KM	43	gic: interrupt-controller@fe438000 {
	44	compatible = "arm,cortex-a9-gic";
	45	#interrupt-cells = <3>;
	46	interrupt-controller;
	47	reg = <0xfe438000 0x1000>,
	48	<0xfe430000 0x100>;
	49	};
0697ccc0	50
87f1ba80 KM	51	/* irqpin: IRQ0 - IRQ3 */
87f1ba80 KM	52	irqpin: irqpin@fe78001c {
d79af224	53	compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
87f1ba80 KM	54	#interrupt-cells = <2>;
	55	interrupt-controller;
	56	status = "disabled"; /* default off */
	57	reg = <0xfe78001c 4>,
	58	<0xfe780010 4>,
	59	<0xfe780024 4>,
	60	<0xfe780044 4>,
	61	<0xfe780064 4>;
5f75e73c LP	62	interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
	63	0 28 IRQ_TYPE_LEVEL_HIGH
	64	0 29 IRQ_TYPE_LEVEL_HIGH
	65	0 30 IRQ_TYPE_LEVEL_HIGH>;
87f1ba80 KM	66	sense-bitfield-width = <2>;
	67	};
	68
aaf7eda8 LP	69	gpio0: gpio@ffc40000 {
	70	compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
	71	reg = <0xffc40000 0x2c>;
5f75e73c	72	interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
aaf7eda8 LP	73	#gpio-cells = <2>;
	74	gpio-controller;
	75	gpio-ranges = <&pfc 0 0 32>;
	76	#interrupt-cells = <2>;
	77	interrupt-controller;
	78	};
	79
	80	gpio1: gpio@ffc41000 {
	81	compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
	82	reg = <0xffc41000 0x2c>;
5f75e73c	83	interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
aaf7eda8 LP	84	#gpio-cells = <2>;
	85	gpio-controller;
	86	gpio-ranges = <&pfc 0 32 32>;
	87	#interrupt-cells = <2>;
	88	interrupt-controller;
	89	};
	90
	91	gpio2: gpio@ffc42000 {
	92	compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
	93	reg = <0xffc42000 0x2c>;
5f75e73c	94	interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
aaf7eda8 LP	95	#gpio-cells = <2>;
	96	gpio-controller;
	97	gpio-ranges = <&pfc 0 64 32>;
	98	#interrupt-cells = <2>;
	99	interrupt-controller;
	100	};
	101
	102	gpio3: gpio@ffc43000 {
	103	compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
	104	reg = <0xffc43000 0x2c>;
5f75e73c	105	interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
aaf7eda8 LP	106	#gpio-cells = <2>;
	107	gpio-controller;
	108	gpio-ranges = <&pfc 0 96 32>;
	109	#interrupt-cells = <2>;
	110	interrupt-controller;
	111	};
	112
	113	gpio4: gpio@ffc44000 {
	114	compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
	115	reg = <0xffc44000 0x2c>;
5f75e73c	116	interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
aaf7eda8 LP	117	#gpio-cells = <2>;
	118	gpio-controller;
	119	gpio-ranges = <&pfc 0 128 27>;
	120	#interrupt-cells = <2>;
	121	interrupt-controller;
	122	};
	123
0697ccc0 LP	124	pfc: pfc@fffc0000 {
0697ccc0 LP	125	compatible = "renesas,pfc-r8a7778";
80d01fee	126	reg = <0xfffc0000 0x118>;
0697ccc0	127	};
3acb51b9 KM	128
	129	i2c0: i2c@ffc70000 {
	130	#address-cells = <1>;
	131	#size-cells = <0>;
	132	compatible = "renesas,i2c-r8a7778";
	133	reg = <0xffc70000 0x1000>;
5f75e73c	134	interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
3acb51b9 KM	135	status = "disabled";
	136	};
	137
	138	i2c1: i2c@ffc71000 {
	139	#address-cells = <1>;
	140	#size-cells = <0>;
	141	compatible = "renesas,i2c-r8a7778";
	142	reg = <0xffc71000 0x1000>;
5f75e73c	143	interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
3acb51b9 KM	144	status = "disabled";
	145	};
	146
	147	i2c2: i2c@ffc72000 {
	148	#address-cells = <1>;
	149	#size-cells = <0>;
	150	compatible = "renesas,i2c-r8a7778";
	151	reg = <0xffc72000 0x1000>;
5f75e73c	152	interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
3acb51b9 KM	153	status = "disabled";
	154	};
	155
	156	i2c3: i2c@ffc73000 {
	157	#address-cells = <1>;
	158	#size-cells = <0>;
	159	compatible = "renesas,i2c-r8a7778";
	160	reg = <0xffc73000 0x1000>;
5f75e73c	161	interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
3acb51b9 KM	162	status = "disabled";
3acb51b9 KM	163	};
f7b90175	164
2109b5a2	165	tmu0: timer@ffd80000 {
45b439c1	166	compatible = "renesas,tmu-r8a7778", "renesas,tmu";
2109b5a2 SH	167	reg = <0xffd80000 0x30>;
	168	interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
	169	<0 33 IRQ_TYPE_LEVEL_HIGH>,
	170	<0 34 IRQ_TYPE_LEVEL_HIGH>;
	171
	172	#renesas,channels = <3>;
	173
	174	status = "disabled";
	175	};
	176
	177	tmu1: timer@ffd81000 {
45b439c1	178	compatible = "renesas,tmu-r8a7778", "renesas,tmu";
2109b5a2 SH	179	reg = <0xffd81000 0x30>;
	180	interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
	181	<0 37 IRQ_TYPE_LEVEL_HIGH>,
	182	<0 38 IRQ_TYPE_LEVEL_HIGH>;
	183
	184	#renesas,channels = <3>;
	185
	186	status = "disabled";
	187	};
	188
	189	tmu2: timer@ffd82000 {
45b439c1	190	compatible = "renesas,tmu-r8a7778", "renesas,tmu";
2109b5a2 SH	191	reg = <0xffd82000 0x30>;
	192	interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
	193	<0 41 IRQ_TYPE_LEVEL_HIGH>,
	194	<0 42 IRQ_TYPE_LEVEL_HIGH>;
	195
	196	#renesas,channels = <3>;
	197
	198	status = "disabled";
	199	};
	200
9930dc8e SH	201	scif0: serial@ffe40000 {
	202	compatible = "renesas,scif-r8a7778", "renesas,scif";
	203	reg = <0xffe40000 0x100>;
	204	interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
	205	status = "disabled";
	206	};
	207
	208	scif1: serial@ffe41000 {
	209	compatible = "renesas,scif-r8a7778", "renesas,scif";
	210	reg = <0xffe41000 0x100>;
	211	interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
	212	status = "disabled";
	213	};
	214
	215	scif2: serial@ffe42000 {
	216	compatible = "renesas,scif-r8a7778", "renesas,scif";
	217	reg = <0xffe42000 0x100>;
	218	interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
	219	status = "disabled";
	220	};
	221
	222	scif3: serial@ffe43000 {
	223	compatible = "renesas,scif-r8a7778", "renesas,scif";
	224	reg = <0xffe43000 0x100>;
	225	interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
	226	status = "disabled";
	227	};
	228
	229	scif4: serial@ffe44000 {
	230	compatible = "renesas,scif-r8a7778", "renesas,scif";
	231	reg = <0xffe44000 0x100>;
	232	interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
	233	status = "disabled";
	234	};
	235
	236	scif5: serial@ffe45000 {
	237	compatible = "renesas,scif-r8a7778", "renesas,scif";
	238	reg = <0xffe45000 0x100>;
	239	interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
	240	status = "disabled";
	241	};
	242
14e1d914	243	mmcif: mmc@ffe4e000 {
f7b90175 KM	244	compatible = "renesas,sh-mmcif";
f7b90175 KM	245	reg = <0xffe4e000 0x100>;
5f75e73c	246	interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
f7b90175 KM	247	status = "disabled";
f7b90175 KM	248	};
04cbd889	249
14e1d914	250	sdhi0: sd@ffe4c000 {
04cbd889 KM	251	compatible = "renesas,sdhi-r8a7778";
04cbd889 KM	252	reg = <0xffe4c000 0x100>;
5f75e73c	253	interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
04cbd889 KM	254	status = "disabled";
	255	};
	256
14e1d914	257	sdhi1: sd@ffe4d000 {
04cbd889 KM	258	compatible = "renesas,sdhi-r8a7778";
04cbd889 KM	259	reg = <0xffe4d000 0x100>;
5f75e73c	260	interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
04cbd889 KM	261	status = "disabled";
	262	};
	263
14e1d914	264	sdhi2: sd@ffe4f000 {
04cbd889 KM	265	compatible = "renesas,sdhi-r8a7778";
04cbd889 KM	266	reg = <0xffe4f000 0x100>;
5f75e73c	267	interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
04cbd889 KM	268	status = "disabled";
04cbd889 KM	269	};
ae4273ec	270
a50da085	271	hspi0: spi@fffc7000 {
a34c50d5	272	compatible = "renesas,hspi-r8a7778", "renesas,hspi";
a50da085	273	reg = <0xfffc7000 0x18>;
d6dd1313	274	interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
a34c50d5 GU	275	#address-cells = <1>;
a34c50d5 GU	276	#size-cells = <0>;
a50da085 KM	277	status = "disabled";
	278	};
	279
	280	hspi1: spi@fffc8000 {
a34c50d5	281	compatible = "renesas,hspi-r8a7778", "renesas,hspi";
a50da085	282	reg = <0xfffc8000 0x18>;
d6dd1313	283	interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
a34c50d5 GU	284	#address-cells = <1>;
a34c50d5 GU	285	#size-cells = <0>;
a50da085 KM	286	status = "disabled";
	287	};
	288
	289	hspi2: spi@fffc6000 {
a34c50d5	290	compatible = "renesas,hspi-r8a7778", "renesas,hspi";
a50da085	291	reg = <0xfffc6000 0x18>;
d6dd1313	292	interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
a34c50d5 GU	293	#address-cells = <1>;
a34c50d5 GU	294	#size-cells = <0>;
a50da085 KM	295	status = "disabled";
a50da085 KM	296	};
ccb7cc74	297	};