Commit | Line | Data |
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a742795b UH |
1 | /* |
2 | * Device Tree Source for the Alt board | |
3 | * | |
4 | * Copyright (C) 2014 Renesas Electronics Corporation | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /dts-v1/; | |
12 | #include "r8a7794.dtsi" | |
13 | ||
14 | / { | |
15 | model = "Alt"; | |
16 | compatible = "renesas,alt", "renesas,r8a7794"; | |
17 | ||
18 | aliases { | |
19 | serial0 = &scif2; | |
20 | }; | |
21 | ||
22 | chosen { | |
89aeff99 | 23 | bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
b575f994 | 24 | stdout-path = "serial0:115200n8"; |
a742795b UH |
25 | }; |
26 | ||
27 | memory@40000000 { | |
28 | device_type = "memory"; | |
29 | reg = <0 0x40000000 0 0x40000000>; | |
30 | }; | |
31 | ||
32 | lbsc { | |
33 | #address-cells = <1>; | |
34 | #size-cells = <1>; | |
35 | }; | |
876e7fb9 MD |
36 | |
37 | vga-encoder { | |
38 | compatible = "adi,adv7123"; | |
39 | ||
40 | ports { | |
41 | #address-cells = <1>; | |
42 | #size-cells = <0>; | |
43 | ||
44 | port@0 { | |
45 | reg = <0>; | |
46 | adv7123_in: endpoint { | |
47 | remote-endpoint = <&du_out_rgb1>; | |
48 | }; | |
49 | }; | |
50 | port@1 { | |
51 | reg = <1>; | |
52 | adv7123_out: endpoint { | |
53 | remote-endpoint = <&vga_in>; | |
54 | }; | |
55 | }; | |
56 | }; | |
57 | }; | |
58 | ||
59 | vga { | |
60 | compatible = "vga-connector"; | |
61 | ||
62 | port { | |
63 | vga_in: endpoint { | |
64 | remote-endpoint = <&adv7123_out>; | |
65 | }; | |
66 | }; | |
67 | }; | |
68 | ||
69 | x2_clk: x2-clock { | |
70 | compatible = "fixed-clock"; | |
71 | #clock-cells = <0>; | |
72 | clock-frequency = <74250000>; | |
73 | }; | |
74 | ||
75 | x13_clk: x13-clock { | |
76 | compatible = "fixed-clock"; | |
77 | #clock-cells = <0>; | |
78 | clock-frequency = <148500000>; | |
79 | }; | |
80 | }; | |
81 | ||
82 | &du { | |
13b8b8e8 MD |
83 | pinctrl-0 = <&du_pins>; |
84 | pinctrl-names = "default"; | |
876e7fb9 MD |
85 | status = "okay"; |
86 | ||
87 | clocks = <&mstp7_clks R8A7794_CLK_DU0>, | |
88 | <&mstp7_clks R8A7794_CLK_DU0>, | |
89 | <&x13_clk>, <&x2_clk>; | |
90 | clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; | |
91 | ||
92 | ports { | |
93 | port@1 { | |
94 | endpoint { | |
95 | remote-endpoint = <&adv7123_in>; | |
96 | }; | |
97 | }; | |
98 | }; | |
a742795b UH |
99 | }; |
100 | ||
101 | &extal_clk { | |
102 | clock-frequency = <20000000>; | |
103 | }; | |
104 | ||
22b16071 | 105 | &pfc { |
8a758a94 GU |
106 | pinctrl-0 = <&scif_clk_pins>; |
107 | pinctrl-names = "default"; | |
108 | ||
13b8b8e8 MD |
109 | du_pins: du { |
110 | renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0"; | |
111 | renesas,function = "du"; | |
112 | }; | |
113 | ||
22b16071 SH |
114 | scif2_pins: serial2 { |
115 | renesas,groups = "scif2_data"; | |
116 | renesas,function = "scif2"; | |
117 | }; | |
118 | ||
8a758a94 GU |
119 | scif_clk_pins: scif_clk { |
120 | renesas,groups = "scif_clk"; | |
121 | renesas,function = "scif_clk"; | |
122 | }; | |
123 | ||
22b16071 SH |
124 | ether_pins: ether { |
125 | renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; | |
126 | renesas,function = "eth"; | |
127 | }; | |
128 | ||
c175e7ab SH |
129 | phy1_pins: phy1 { |
130 | renesas,groups = "intc_irq8"; | |
131 | renesas,function = "intc"; | |
22b16071 | 132 | }; |
7f81bf72 UH |
133 | |
134 | i2c1_pins: i2c1 { | |
135 | renesas,groups = "i2c1"; | |
136 | renesas,function = "i2c1"; | |
137 | }; | |
d537543b UH |
138 | |
139 | vin0_pins: vin0 { | |
140 | renesas,groups = "vin0_data8", "vin0_clk"; | |
141 | renesas,function = "vin0"; | |
142 | }; | |
22b16071 SH |
143 | }; |
144 | ||
a742795b | 145 | &cmt0 { |
38e02908 | 146 | status = "okay"; |
a742795b UH |
147 | }; |
148 | ||
6b78e6ae SH |
149 | &pfc { |
150 | qspi_pins: spi0 { | |
151 | renesas,groups = "qspi_ctrl", "qspi_data4"; | |
152 | renesas,function = "qspi"; | |
153 | }; | |
154 | }; | |
155 | ||
a895b7cd | 156 | ðer { |
c175e7ab SH |
157 | pinctrl-0 = <ðer_pins &phy1_pins>; |
158 | pinctrl-names = "default"; | |
159 | ||
a895b7cd LP |
160 | phy-handle = <&phy1>; |
161 | renesas,ether-link-active-low; | |
162 | status = "okay"; | |
163 | ||
164 | phy1: ethernet-phy@1 { | |
165 | reg = <1>; | |
166 | interrupt-parent = <&irqc0>; | |
1fc58015 | 167 | interrupts = <8 IRQ_TYPE_LEVEL_LOW>; |
a895b7cd LP |
168 | micrel,led-mode = <1>; |
169 | }; | |
170 | }; | |
171 | ||
7f81bf72 UH |
172 | &i2c1 { |
173 | pinctrl-0 = <&i2c1_pins>; | |
174 | pinctrl-names = "default"; | |
175 | ||
176 | status = "okay"; | |
177 | clock-frequency = <400000>; | |
d537543b UH |
178 | |
179 | composite-in@20 { | |
180 | compatible = "adi,adv7180"; | |
181 | reg = <0x20>; | |
182 | remote = <&vin0>; | |
183 | ||
184 | port { | |
185 | adv7180: endpoint { | |
186 | bus-width = <8>; | |
187 | remote-endpoint = <&vin0ep>; | |
188 | }; | |
189 | }; | |
190 | }; | |
191 | }; | |
192 | ||
193 | &vin0 { | |
194 | status = "okay"; | |
195 | pinctrl-0 = <&vin0_pins>; | |
196 | pinctrl-names = "default"; | |
197 | ||
198 | port { | |
199 | #address-cells = <1>; | |
200 | #size-cells = <0>; | |
201 | ||
202 | vin0ep: endpoint { | |
203 | remote-endpoint = <&adv7180>; | |
204 | bus-width = <8>; | |
205 | }; | |
206 | }; | |
7f81bf72 UH |
207 | }; |
208 | ||
a742795b | 209 | &scif2 { |
7256587c SH |
210 | pinctrl-0 = <&scif2_pins>; |
211 | pinctrl-names = "default"; | |
212 | ||
38e02908 | 213 | status = "okay"; |
a742795b | 214 | }; |
6b78e6ae | 215 | |
8a758a94 GU |
216 | &scif_clk { |
217 | clock-frequency = <14745600>; | |
218 | status = "okay"; | |
219 | }; | |
220 | ||
6b78e6ae SH |
221 | &qspi { |
222 | pinctrl-0 = <&qspi_pins>; | |
223 | pinctrl-names = "default"; | |
224 | ||
225 | status = "okay"; | |
226 | ||
227 | flash@0 { | |
228 | compatible = "spansion,s25fl512s", "jedec,spi-nor"; | |
229 | reg = <0>; | |
230 | spi-max-frequency = <30000000>; | |
231 | spi-tx-bus-width = <4>; | |
232 | spi-rx-bus-width = <4>; | |
233 | spi-cpol; | |
234 | spi-cpha; | |
235 | m25p,fast-read; | |
236 | ||
237 | partitions { | |
238 | compatible = "fixed-partitions"; | |
239 | #address-cells = <1>; | |
240 | #size-cells = <1>; | |
241 | ||
242 | partition@0 { | |
243 | label = "loader"; | |
244 | reg = <0x00000000 0x00040000>; | |
245 | read-only; | |
246 | }; | |
247 | partition@40000 { | |
248 | label = "system"; | |
249 | reg = <0x00040000 0x00040000>; | |
250 | read-only; | |
251 | }; | |
252 | partition@80000 { | |
253 | label = "user"; | |
254 | reg = <0x00080000 0x03f80000>; | |
255 | }; | |
256 | }; | |
257 | }; | |
258 | }; |