[deliverable/linux.git] / arch / arm / boot / dts / sama5d3_tcb1.dtsi

/*
 * at91sama5d3_tcb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
 * 2 TC blocks.
 *
 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
 *
 * Licensed under GPLv2.
 */

#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/at91.h>

/ {
	aliases {
		tcb1 = &tcb1;
	};

	ahb {
		apb {
			pmc: pmc@fffffc00 {
				periphck {
					tcb1_clk: tcb1_clk {
						#clock-cells = <0>;
						reg = <27>;
					};
				};
			};

			tcb1: timer@f8014000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8014000 0x100>;
				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
				clocks = <&tcb1_clk>;
				clock-names = "t0_clk";
			};
		};
	};
};
Commit	Line	Data
d7d1d45c BB	1	/*
	2	* at91sama5d3_tcb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
	3	* 2 TC blocks.
	4	*
	5	* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
	6	*
	7	* Licensed under GPLv2.
	8	*/
	9
	10	#include <dt-bindings/pinctrl/at91.h>
	11	#include <dt-bindings/interrupt-controller/irq.h>
35d35aae	12	#include <dt-bindings/clock/at91.h>
d7d1d45c BB	13
	14	/ {
	15	aliases {
	16	tcb1 = &tcb1;
	17	};
	18
	19	ahb {
	20	apb {
d2e8190b BB	21	pmc: pmc@fffffc00 {
	22	periphck {
	23	tcb1_clk: tcb1_clk {
	24	#clock-cells = <0>;
	25	reg = <27>;
	26	};
	27	};
	28	};
	29
d7d1d45c BB	30	tcb1: timer@f8014000 {
	31	compatible = "atmel,at91sam9x5-tcb";
	32	reg = <0xf8014000 0x100>;
	33	interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
d2e8190b BB	34	clocks = <&tcb1_clk>;
d2e8190b BB	35	clock-names = "t0_clk";
d7d1d45c BB	36	};
	37	};
	38	};
	39	};