Commit | Line | Data |
---|---|---|
a3f22db5 SH |
1 | /* |
2 | * Device Tree Source for the SH73A0 SoC | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /include/ "skeleton.dtsi" | |
12 | ||
13 | / { | |
14 | compatible = "renesas,sh73a0"; | |
15 | ||
16 | cpus { | |
c5795aec SH |
17 | #address-cells = <1>; |
18 | #size-cells = <0>; | |
19 | ||
a3f22db5 | 20 | cpu@0 { |
c5795aec | 21 | device_type = "cpu"; |
a3f22db5 | 22 | compatible = "arm,cortex-a9"; |
c5795aec | 23 | reg = <0>; |
a3f22db5 SH |
24 | }; |
25 | cpu@1 { | |
c5795aec | 26 | device_type = "cpu"; |
a3f22db5 | 27 | compatible = "arm,cortex-a9"; |
c5795aec | 28 | reg = <1>; |
a3f22db5 SH |
29 | }; |
30 | }; | |
31 | ||
32 | gic: interrupt-controller@f0001000 { | |
33 | compatible = "arm,cortex-a9-gic"; | |
34 | #interrupt-cells = <3>; | |
35 | #address-cells = <1>; | |
36 | interrupt-controller; | |
37 | reg = <0xf0001000 0x1000>, | |
38 | <0xf0000100 0x100>; | |
39 | }; | |
48609533 | 40 | |
4c90483a MD |
41 | pmu { |
42 | compatible = "arm,cortex-a9-pmu"; | |
43 | interrupts = <0 55 4>, | |
44 | <0 56 4>; | |
45 | }; | |
46 | ||
558f8740 GL |
47 | irqpin0: irqpin@e6900000 { |
48 | compatible = "renesas,intc-irqpin"; | |
49 | #interrupt-cells = <2>; | |
50 | interrupt-controller; | |
51 | reg = <0xe6900000 4>, | |
52 | <0xe6900010 4>, | |
53 | <0xe6900020 1>, | |
54 | <0xe6900040 1>, | |
55 | <0xe6900060 1>; | |
56 | interrupt-parent = <&gic>; | |
57 | interrupts = <0 1 0x4 | |
58 | 0 2 0x4 | |
59 | 0 3 0x4 | |
60 | 0 4 0x4 | |
61 | 0 5 0x4 | |
62 | 0 6 0x4 | |
63 | 0 7 0x4 | |
64 | 0 8 0x4>; | |
65 | }; | |
66 | ||
67 | irqpin1: irqpin@e6900004 { | |
68 | compatible = "renesas,intc-irqpin"; | |
69 | #interrupt-cells = <2>; | |
70 | interrupt-controller; | |
71 | reg = <0xe6900004 4>, | |
72 | <0xe6900014 4>, | |
73 | <0xe6900024 1>, | |
74 | <0xe6900044 1>, | |
75 | <0xe6900064 1>; | |
76 | interrupt-parent = <&gic>; | |
77 | interrupts = <0 9 0x4 | |
78 | 0 10 0x4 | |
79 | 0 11 0x4 | |
80 | 0 12 0x4 | |
81 | 0 13 0x4 | |
82 | 0 14 0x4 | |
83 | 0 15 0x4 | |
84 | 0 16 0x4>; | |
85 | control-parent; | |
86 | }; | |
87 | ||
88 | irqpin2: irqpin@e6900008 { | |
89 | compatible = "renesas,intc-irqpin"; | |
90 | #interrupt-cells = <2>; | |
91 | interrupt-controller; | |
92 | reg = <0xe6900008 4>, | |
93 | <0xe6900018 4>, | |
94 | <0xe6900028 1>, | |
95 | <0xe6900048 1>, | |
96 | <0xe6900068 1>; | |
97 | interrupt-parent = <&gic>; | |
98 | interrupts = <0 17 0x4 | |
99 | 0 18 0x4 | |
100 | 0 19 0x4 | |
101 | 0 20 0x4 | |
102 | 0 21 0x4 | |
103 | 0 22 0x4 | |
104 | 0 23 0x4 | |
105 | 0 24 0x4>; | |
106 | }; | |
107 | ||
108 | irqpin3: irqpin@e690000c { | |
109 | compatible = "renesas,intc-irqpin"; | |
110 | #interrupt-cells = <2>; | |
111 | interrupt-controller; | |
112 | reg = <0xe690000c 4>, | |
113 | <0xe690001c 4>, | |
114 | <0xe690002c 1>, | |
115 | <0xe690004c 1>, | |
116 | <0xe690006c 1>; | |
117 | interrupt-parent = <&gic>; | |
118 | interrupts = <0 25 0x4 | |
119 | 0 26 0x4 | |
120 | 0 27 0x4 | |
121 | 0 28 0x4 | |
122 | 0 29 0x4 | |
123 | 0 30 0x4 | |
124 | 0 31 0x4 | |
125 | 0 32 0x4>; | |
126 | }; | |
127 | ||
561a1a31 | 128 | i2c0: i2c@e6820000 { |
48609533 SH |
129 | #address-cells = <1>; |
130 | #size-cells = <0>; | |
131 | compatible = "renesas,rmobile-iic"; | |
132 | reg = <0xe6820000 0x425>; | |
133 | interrupt-parent = <&gic>; | |
134 | interrupts = <0 167 0x4 | |
135 | 0 168 0x4 | |
136 | 0 169 0x4 | |
137 | 0 170 0x4>; | |
eda3a4fa | 138 | status = "disabled"; |
48609533 SH |
139 | }; |
140 | ||
561a1a31 | 141 | i2c1: i2c@e6822000 { |
48609533 SH |
142 | #address-cells = <1>; |
143 | #size-cells = <0>; | |
144 | compatible = "renesas,rmobile-iic"; | |
145 | reg = <0xe6822000 0x425>; | |
146 | interrupt-parent = <&gic>; | |
147 | interrupts = <0 51 0x4 | |
148 | 0 52 0x4 | |
149 | 0 53 0x4 | |
150 | 0 54 0x4>; | |
eda3a4fa | 151 | status = "disabled"; |
48609533 SH |
152 | }; |
153 | ||
561a1a31 | 154 | i2c2: i2c@e6824000 { |
48609533 SH |
155 | #address-cells = <1>; |
156 | #size-cells = <0>; | |
157 | compatible = "renesas,rmobile-iic"; | |
158 | reg = <0xe6824000 0x425>; | |
159 | interrupt-parent = <&gic>; | |
160 | interrupts = <0 171 0x4 | |
161 | 0 172 0x4 | |
162 | 0 173 0x4 | |
163 | 0 174 0x4>; | |
eda3a4fa | 164 | status = "disabled"; |
48609533 SH |
165 | }; |
166 | ||
561a1a31 | 167 | i2c3: i2c@e6826000 { |
48609533 SH |
168 | #address-cells = <1>; |
169 | #size-cells = <0>; | |
170 | compatible = "renesas,rmobile-iic"; | |
171 | reg = <0xe6826000 0x425>; | |
172 | interrupt-parent = <&gic>; | |
173 | interrupts = <0 183 0x4 | |
174 | 0 184 0x4 | |
175 | 0 185 0x4 | |
176 | 0 186 0x4>; | |
eda3a4fa | 177 | status = "disabled"; |
48609533 SH |
178 | }; |
179 | ||
561a1a31 | 180 | i2c4: i2c@e6828000 { |
48609533 SH |
181 | #address-cells = <1>; |
182 | #size-cells = <0>; | |
183 | compatible = "renesas,rmobile-iic"; | |
184 | reg = <0xe6828000 0x425>; | |
185 | interrupt-parent = <&gic>; | |
186 | interrupts = <0 187 0x4 | |
187 | 0 188 0x4 | |
188 | 0 189 0x4 | |
189 | 0 190 0x4>; | |
eda3a4fa | 190 | status = "disabled"; |
48609533 | 191 | }; |
546e5d3e | 192 | |
33f6be3b | 193 | mmcif: mmc@e6bd0000 { |
546e5d3e GL |
194 | compatible = "renesas,sh-mmcif"; |
195 | reg = <0xe6bd0000 0x100>; | |
196 | interrupt-parent = <&gic>; | |
197 | interrupts = <0 140 0x4 | |
198 | 0 141 0x4>; | |
199 | reg-io-width = <4>; | |
200 | status = "disabled"; | |
201 | }; | |
202 | ||
33f6be3b | 203 | sdhi0: sd@ee100000 { |
df1d0584 | 204 | compatible = "renesas,sdhi-r8a7740"; |
546e5d3e GL |
205 | reg = <0xee100000 0x100>; |
206 | interrupt-parent = <&gic>; | |
207 | interrupts = <0 83 4 | |
208 | 0 84 4 | |
209 | 0 85 4>; | |
a463f731 | 210 | cap-sd-highspeed; |
546e5d3e GL |
211 | status = "disabled"; |
212 | }; | |
213 | ||
214 | /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ | |
33f6be3b | 215 | sdhi1: sd@ee120000 { |
df1d0584 | 216 | compatible = "renesas,sdhi-r8a7740"; |
546e5d3e GL |
217 | reg = <0xee120000 0x100>; |
218 | interrupt-parent = <&gic>; | |
219 | interrupts = <0 88 4 | |
220 | 0 89 4>; | |
221 | toshiba,mmc-wrprotect-disable; | |
a463f731 | 222 | cap-sd-highspeed; |
546e5d3e GL |
223 | status = "disabled"; |
224 | }; | |
225 | ||
33f6be3b | 226 | sdhi2: sd@ee140000 { |
df1d0584 | 227 | compatible = "renesas,sdhi-r8a7740"; |
546e5d3e GL |
228 | reg = <0xee140000 0x100>; |
229 | interrupt-parent = <&gic>; | |
230 | interrupts = <0 104 4 | |
231 | 0 105 4>; | |
232 | toshiba,mmc-wrprotect-disable; | |
a463f731 | 233 | cap-sd-highspeed; |
546e5d3e GL |
234 | status = "disabled"; |
235 | }; | |
3f59007e LP |
236 | |
237 | pfc: pfc@e6050000 { | |
238 | compatible = "renesas,pfc-sh73a0"; | |
239 | reg = <0xe6050000 0x8000>, | |
240 | <0xe605801c 0x1c>; | |
241 | gpio-controller; | |
242 | #gpio-cells = <2>; | |
243 | }; | |
a3f22db5 | 244 | }; |