Commit | Line | Data |
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475dc86d | 1 | /* |
88c8e4c2 | 2 | * Copyright (C) 2015 Altera Corporation <www.altera.com> |
475dc86d DN |
3 | * |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
475dc86d DN |
17 | #include "socfpga_arria10.dtsi" |
18 | ||
19 | / { | |
20 | model = "Altera SOCFPGA Arria 10"; | |
21 | compatible = "altr,socfpga-arria10", "altr,socfpga"; | |
22 | ||
23 | chosen { | |
efc1985c DN |
24 | bootargs = "earlyprintk"; |
25 | stdout-path = "serial1:115200n8"; | |
475dc86d DN |
26 | }; |
27 | ||
28 | memory { | |
29 | name = "memory"; | |
30 | device_type = "memory"; | |
31 | reg = <0x0 0x40000000>; /* 1GB */ | |
32 | }; | |
33 | ||
34 | soc { | |
35 | clkmgr@ffd04000 { | |
36 | clocks { | |
37 | osc1 { | |
38 | clock-frequency = <25000000>; | |
39 | }; | |
40 | }; | |
41 | }; | |
475dc86d DN |
42 | }; |
43 | }; | |
74568da4 | 44 | |
112cadfd DN |
45 | &gmac0 { |
46 | phy-mode = "rgmii"; | |
47 | phy-addr = <0xffffffff>; /* probe for phy addr */ | |
48 | ||
49 | /* | |
50 | * These skews assume the user's FPGA design is adding 600ps of delay | |
51 | * for TX_CLK on Arria 10. | |
52 | * | |
53 | * All skews are offset since hardware skew values for the ksz9031 | |
54 | * range from a negative skew to a positive skew. | |
55 | * See the micrel-ksz90x1.txt Documentation file for details. | |
56 | */ | |
57 | txd0-skew-ps = <0>; /* -420ps */ | |
58 | txd1-skew-ps = <0>; /* -420ps */ | |
59 | txd2-skew-ps = <0>; /* -420ps */ | |
60 | txd3-skew-ps = <0>; /* -420ps */ | |
61 | rxd0-skew-ps = <420>; /* 0ps */ | |
62 | rxd1-skew-ps = <420>; /* 0ps */ | |
63 | rxd2-skew-ps = <420>; /* 0ps */ | |
64 | rxd3-skew-ps = <420>; /* 0ps */ | |
65 | txen-skew-ps = <0>; /* -420ps */ | |
66 | txc-skew-ps = <1860>; /* 960ps */ | |
67 | rxdv-skew-ps = <420>; /* 0ps */ | |
68 | rxc-skew-ps = <1680>; /* 780ps */ | |
69 | max-frame-size = <3800>; | |
70 | status = "okay"; | |
71 | }; | |
72 | ||
19c21388 DN |
73 | &i2c1 { |
74 | speed-mode = <0>; | |
75 | status = "okay"; | |
76 | ||
77 | /* | |
78 | * adjust the falling times to decrease the i2c frequency to 50Khz | |
79 | * because the LCD module does not work at the standard 100Khz | |
80 | */ | |
81 | i2c-sda-falling-time-ns = <6000>; | |
82 | i2c-scl-falling-time-ns = <6000>; | |
83 | ||
84 | eeprom@51 { | |
85 | compatible = "atmel,24c32"; | |
86 | reg = <0x51>; | |
87 | pagesize = <32>; | |
88 | }; | |
89 | ||
90 | rtc@68 { | |
91 | compatible = "dallas,ds1339"; | |
92 | reg = <0x68>; | |
93 | }; | |
94 | }; | |
95 | ||
74568da4 DN |
96 | &uart1 { |
97 | status = "okay"; | |
98 | }; | |
19c21388 DN |
99 | |
100 | &usb0 { | |
101 | status = "okay"; | |
102 | }; |