projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 07658d9a VK |
1 | /* |
| 2 | * DTS file for all SPEAr1310 SoCs | |
| 3 | * | |
| 10d8935f | 4 | * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com> |
| 07658d9a VK |
5 | * |
| 6 | * The code contained herein is licensed under the GNU General Public | |
| 7 | * License. You may obtain a copy of the GNU General Public License | |
| 8 | * Version 2 or later at the following locations: | |
| 9 | * | |
| 10 | * http://www.opensource.org/licenses/gpl-license.html | |
| 11 | * http://www.gnu.org/copyleft/gpl.html | |
| 12 | */ | |
| 13 | ||
| 14 | /include/ "spear13xx.dtsi" | |
| 15 | ||
| 16 | / { | |
| 17 | compatible = "st,spear1310"; | |
| 18 | ||
| 19 | ahb { | |
| 7cef07d5 SH |
20 | spics: spics@e0700000{ |
| 21 | compatible = "st,spear-spics-gpio"; | |
| 22 | reg = <0xe0700000 0x1000>; | |
| 23 | st-spics,peripcfg-reg = <0x3b0>; | |
| 24 | st-spics,sw-enable-bit = <12>; | |
| 25 | st-spics,cs-value-bit = <11>; | |
| 26 | st-spics,cs-enable-mask = <3>; | |
| 27 | st-spics,cs-enable-shift = <8>; | |
| 28 | gpio-controller; | |
| 29 | #gpio-cells = <2>; | |
| 30 | }; | |
| 31 | ||
| 07658d9a VK |
32 | ahci@b1000000 { |
| 33 | compatible = "snps,spear-ahci"; | |
| 34 | reg = <0xb1000000 0x10000>; | |
| 35 | interrupts = <0 68 0x4>; | |
| 36 | status = "disabled"; | |
| 37 | }; | |
| 38 | ||
| 39 | ahci@b1800000 { | |
| 40 | compatible = "snps,spear-ahci"; | |
| 41 | reg = <0xb1800000 0x10000>; | |
| 42 | interrupts = <0 69 0x4>; | |
| 43 | status = "disabled"; | |
| 44 | }; | |
| 45 | ||
| 46 | ahci@b4000000 { | |
| 47 | compatible = "snps,spear-ahci"; | |
| 48 | reg = <0xb4000000 0x10000>; | |
| 49 | interrupts = <0 70 0x4>; | |
| 50 | status = "disabled"; | |
| 51 | }; | |
| 52 | ||
| 53 | gmac1: eth@5c400000 { | |
| 54 | compatible = "st,spear600-gmac"; | |
| 55 | reg = <0x5c400000 0x8000>; | |
| 56 | interrupts = <0 95 0x4>; | |
| 57 | interrupt-names = "macirq"; | |
| 4c7a078f | 58 | phy-mode = "mii"; |
| 07658d9a VK |
59 | status = "disabled"; |
| 60 | }; | |
| 61 | ||
| 62 | gmac2: eth@5c500000 { | |
| 63 | compatible = "st,spear600-gmac"; | |
| 64 | reg = <0x5c500000 0x8000>; | |
| 65 | interrupts = <0 96 0x4>; | |
| 66 | interrupt-names = "macirq"; | |
| 4c7a078f | 67 | phy-mode = "mii"; |
| 07658d9a VK |
68 | status = "disabled"; |
| 69 | }; | |
| 70 | ||
| 71 | gmac3: eth@5c600000 { | |
| 72 | compatible = "st,spear600-gmac"; | |
| 73 | reg = <0x5c600000 0x8000>; | |
| 74 | interrupts = <0 97 0x4>; | |
| 75 | interrupt-names = "macirq"; | |
| 4c7a078f | 76 | phy-mode = "rmii"; |
| 07658d9a VK |
77 | status = "disabled"; |
| 78 | }; | |
| 79 | ||
| 80 | gmac4: eth@5c700000 { | |
| 81 | compatible = "st,spear600-gmac"; | |
| 82 | reg = <0x5c700000 0x8000>; | |
| 83 | interrupts = <0 98 0x4>; | |
| 84 | interrupt-names = "macirq"; | |
| 4c7a078f | 85 | phy-mode = "rgmii"; |
| 07658d9a VK |
86 | status = "disabled"; |
| 87 | }; | |
| 88 | ||
| 4ddb1c29 VK |
89 | pinmux: pinmux@e0700000 { |
| 90 | compatible = "st,spear1310-pinmux"; | |
| 91 | reg = <0xe0700000 0x1000>; | |
| 92 | #gpio-range-cells = <2>; | |
| 93 | }; | |
| 94 | ||
| 07658d9a VK |
95 | apb { |
| 96 | i2c1: i2c@5cd00000 { | |
| 97 | #address-cells = <1>; | |
| 98 | #size-cells = <0>; | |
| 99 | compatible = "snps,designware-i2c"; | |
| 100 | reg = <0x5cd00000 0x1000>; | |
| 101 | interrupts = <0 87 0x4>; | |
| 102 | status = "disabled"; | |
| 103 | }; | |
| 104 | ||
| 105 | i2c2: i2c@5ce00000 { | |
| 106 | #address-cells = <1>; | |
| 107 | #size-cells = <0>; | |
| 108 | compatible = "snps,designware-i2c"; | |
| 109 | reg = <0x5ce00000 0x1000>; | |
| 110 | interrupts = <0 88 0x4>; | |
| 111 | status = "disabled"; | |
| 112 | }; | |
| 113 | ||
| 114 | i2c3: i2c@5cf00000 { | |
| 115 | #address-cells = <1>; | |
| 116 | #size-cells = <0>; | |
| 117 | compatible = "snps,designware-i2c"; | |
| 118 | reg = <0x5cf00000 0x1000>; | |
| 119 | interrupts = <0 89 0x4>; | |
| 120 | status = "disabled"; | |
| 121 | }; | |
| 122 | ||
| 123 | i2c4: i2c@5d000000 { | |
| 124 | #address-cells = <1>; | |
| 125 | #size-cells = <0>; | |
| 126 | compatible = "snps,designware-i2c"; | |
| 127 | reg = <0x5d000000 0x1000>; | |
| 128 | interrupts = <0 90 0x4>; | |
| 129 | status = "disabled"; | |
| 130 | }; | |
| 131 | ||
| 132 | i2c5: i2c@5d100000 { | |
| 133 | #address-cells = <1>; | |
| 134 | #size-cells = <0>; | |
| 135 | compatible = "snps,designware-i2c"; | |
| 136 | reg = <0x5d100000 0x1000>; | |
| 137 | interrupts = <0 91 0x4>; | |
| 138 | status = "disabled"; | |
| 139 | }; | |
| 140 | ||
| 141 | i2c6: i2c@5d200000 { | |
| 142 | #address-cells = <1>; | |
| 143 | #size-cells = <0>; | |
| 144 | compatible = "snps,designware-i2c"; | |
| 145 | reg = <0x5d200000 0x1000>; | |
| 146 | interrupts = <0 92 0x4>; | |
| 147 | status = "disabled"; | |
| 148 | }; | |
| 149 | ||
| 150 | i2c7: i2c@5d300000 { | |
| 151 | #address-cells = <1>; | |
| 152 | #size-cells = <0>; | |
| 153 | compatible = "snps,designware-i2c"; | |
| 154 | reg = <0x5d300000 0x1000>; | |
| 155 | interrupts = <0 93 0x4>; | |
| 156 | status = "disabled"; | |
| 157 | }; | |
| 158 | ||
| f631b984 VKS |
159 | spi1: spi@5d400000 { |
| 160 | compatible = "arm,pl022", "arm,primecell"; | |
| 161 | reg = <0x5d400000 0x1000>; | |
| 162 | interrupts = <0 99 0x4>; | |
| 163 | status = "disabled"; | |
| 164 | }; | |
| 165 | ||
| 07658d9a VK |
166 | serial@5c800000 { |
| 167 | compatible = "arm,pl011", "arm,primecell"; | |
| 168 | reg = <0x5c800000 0x1000>; | |
| 169 | interrupts = <0 82 0x4>; | |
| 170 | status = "disabled"; | |
| 171 | }; | |
| 172 | ||
| 173 | serial@5c900000 { | |
| 174 | compatible = "arm,pl011", "arm,primecell"; | |
| 175 | reg = <0x5c900000 0x1000>; | |
| 176 | interrupts = <0 83 0x4>; | |
| 177 | status = "disabled"; | |
| 178 | }; | |
| 179 | ||
| 180 | serial@5ca00000 { | |
| 181 | compatible = "arm,pl011", "arm,primecell"; | |
| 182 | reg = <0x5ca00000 0x1000>; | |
| 183 | interrupts = <0 84 0x4>; | |
| 184 | status = "disabled"; | |
| 185 | }; | |
| 186 | ||
| 187 | serial@5cb00000 { | |
| 188 | compatible = "arm,pl011", "arm,primecell"; | |
| 189 | reg = <0x5cb00000 0x1000>; | |
| 190 | interrupts = <0 85 0x4>; | |
| 191 | status = "disabled"; | |
| 192 | }; | |
| 193 | ||
| 194 | serial@5cc00000 { | |
| 195 | compatible = "arm,pl011", "arm,primecell"; | |
| 196 | reg = <0x5cc00000 0x1000>; | |
| 197 | interrupts = <0 86 0x4>; | |
| 198 | status = "disabled"; | |
| 199 | }; | |
| 200 | ||
| 201 | thermal@e07008c4 { | |
| 202 | st,thermal-flags = <0x7000>; | |
| 203 | }; | |
| 4ddb1c29 VK |
204 | |
| 205 | gpiopinctrl: gpio@d8400000 { | |
| 206 | compatible = "st,spear-plgpio"; | |
| 207 | reg = <0xd8400000 0x1000>; | |
| 208 | interrupts = <0 100 0x4>; | |
| 209 | #interrupt-cells = <1>; | |
| 210 | interrupt-controller; | |
| 211 | gpio-controller; | |
| 212 | #gpio-cells = <2>; | |
| 213 | gpio-ranges = <&pinmux 0 246>; | |
| 214 | status = "disabled"; | |
| 215 | ||
| 216 | st-plgpio,ngpio = <246>; | |
| 217 | st-plgpio,enb-reg = <0xd0>; | |
| 218 | st-plgpio,wdata-reg = <0x90>; | |
| 219 | st-plgpio,dir-reg = <0xb0>; | |
| 220 | st-plgpio,ie-reg = <0x30>; | |
| 221 | st-plgpio,rdata-reg = <0x70>; | |
| 222 | st-plgpio,mis-reg = <0x10>; | |
| 223 | st-plgpio,eit-reg = <0x50>; | |
| 224 | }; | |
| 07658d9a VK |
225 | }; |
| 226 | }; | |
| 227 | }; |