[deliverable/linux.git] / arch / arm / boot / dts / stih416-pinctrl.dtsi


/*
 * Copyright (C) 2013 STMicroelectronics Limited.
 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * publishhed by the Free Software Foundation.
 */
#include "st-pincfg.h"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {

	aliases {
		gpio0	= &pio0;
		gpio1	= &pio1;
		gpio2	= &pio2;
		gpio3	= &pio3;
		gpio4	= &pio4;
		gpio5	= &pio40;
		gpio6	= &pio5;
		gpio7	= &pio6;
		gpio8	= &pio7;
		gpio9	= &pio8;
		gpio10	= &pio9;
		gpio11	= &pio10;
		gpio12	= &pio11;
		gpio13	= &pio12;
		gpio14	= &pio30;
		gpio15	= &pio31;
		gpio16	= &pio13;
		gpio17	= &pio14;
		gpio18	= &pio15;
		gpio19	= &pio16;
		gpio20	= &pio17;
		gpio21	= &pio18;
		gpio22	= &pio100;
		gpio23	= &pio101;
		gpio24	= &pio102;
		gpio25	= &pio103;
		gpio26	= &pio104;
		gpio27	= &pio105;
		gpio28	= &pio106;
		gpio29	= &pio107;
	};

	soc {
		pin-controller-sbc {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih416-sbc-pinctrl";
			st,syscfg	= <&syscfg_sbc>;
			reg 		= <0xfe61f080 0x4>;
			reg-names	= "irqmux";
			interrupts 	= <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names	= "irqmux";
			ranges		= <0 0xfe610000 0x6000>;

			pio0: gpio@fe610000 {
				gpio-controller;
				#gpio-cells = <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO0";
			};
			pio1: gpio@fe611000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO1";
			};
			pio2: gpio@fe612000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO2";
			};
			pio3: gpio@fe613000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO3";
			};
			pio4: gpio@fe614000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO4";
			};
			pio40: gpio@fe615000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x5000 0x100>;
				st,bank-name	= "PIO40";
				st,retime-pin-mask = <0x7f>;
			};

			rc{
				pinctrl_ir: ir0 {
					st,pins {
						ir = <&pio4 0 ALT2 IN>;
					};
				};
			};
			sbc_serial1 {
				pinctrl_sbc_serial1: sbc_serial1 {
					st,pins {
						tx	= <&pio2 6 ALT3 OUT>;
						rx	= <&pio2 7 ALT3 IN>;
					};
				};
			};

			keyscan {
				pinctrl_keyscan: keyscan {
					st,pins {
						keyin0 = <&pio0 2 ALT2 IN>;
						keyin1 = <&pio0 3 ALT2 IN>;
						keyin2 = <&pio0 4 ALT2 IN>;
						keyin3 = <&pio2 6 ALT2 IN>;

						keyout0 = <&pio1 6 ALT2 OUT>;
						keyout1 = <&pio1 7 ALT2 OUT>;
						keyout2 = <&pio0 6 ALT2 OUT>;
						keyout3 = <&pio2 7 ALT2 OUT>;
					};
				};
			};

			sbc_i2c0 {
				pinctrl_sbc_i2c0_default: sbc_i2c0-default {
					st,pins {
						sda = <&pio4 6 ALT1 BIDIR>;
						scl = <&pio4 5 ALT1 BIDIR>;
					};
				};
			};

			usb {
				pinctrl_usb3: usb3 {
					st,pins {
						oc-detect = <&pio40 0 ALT1 IN>;
						pwr-enable = <&pio40 1 ALT1 OUT>;
					};
				};
			};

			sbc_i2c1 {
				pinctrl_sbc_i2c1_default: sbc_i2c1-default {
					st,pins {
						sda = <&pio3 2 ALT2 BIDIR>;
						scl = <&pio3 1 ALT2 BIDIR>;
					};
				};
			};

			gmac1 {
				pinctrl_mii1: mii1 {
					st,pins {
						txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
						txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
						col =   <&pio0 7 ALT1 IN BYPASS 1000>;

						mdio =  <&pio1 0 ALT1 OUT BYPASS 1500>;
						mdc =   <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
						crs =   <&pio1 2 ALT1 IN BYPASS 1000>;
						mdint = <&pio1 3 ALT1 IN BYPASS 0>;
						rxd0 =  <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxd1 =  <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxd2 =  <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxd3 =  <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rxdv =  <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
						rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
						phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
					};
				};
				pinctrl_rgmii1: rgmii1-0 {
					st,pins {
						txd0 =  <&pio0 0 ALT1 OUT DE_IO 500 CLK_A>;
						txd1 =  <&pio0 1 ALT1 OUT DE_IO 500 CLK_A>;
						txd2 =  <&pio0 2 ALT1 OUT DE_IO 500 CLK_A>;
						txd3 =  <&pio0 3 ALT1 OUT DE_IO 500 CLK_A>;
						txen =  <&pio0 5 ALT1 OUT DE_IO 0   CLK_A>;
						txclk = <&pio0 6 ALT1 IN  NICLK 0   CLK_A>;

						mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
						mdc  = <&pio1 1 ALT1 OUT NICLK  0 CLK_A>;
						rxd0 = <&pio1 4 ALT1 IN DE_IO 500 CLK_A>;
						rxd1 = <&pio1 5 ALT1 IN DE_IO 500 CLK_A>;
						rxd2 = <&pio1 6 ALT1 IN DE_IO 500 CLK_A>;
						rxd3 = <&pio1 7 ALT1 IN DE_IO 500 CLK_A>;

						rxdv   = <&pio2 0 ALT1 IN  DE_IO 500 CLK_A>;
						rxclk  = <&pio2 2 ALT1 IN  NICLK 0   CLK_A>;
						phyclk = <&pio2 3 ALT4 OUT NICLK 0   CLK_B>;

						clk125= <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
					};
				};
			};

			pwm1 {
				pinctrl_pwm1_chan0_default: pwm1-0-default {
					st,pins {
						pwm-out    = <&pio3 0 ALT1 OUT>;
					};
				};
				pinctrl_pwm1_chan1_default: pwm1-1-default {
					st,pins {
						pwm-out    = <&pio4 4 ALT1 OUT>;
					};
				};
				pinctrl_pwm1_chan2_default: pwm1-2-default {
					st,pins {
						pwm-out    = <&pio4 6 ALT3 OUT>;
					};
				};
				pinctrl_pwm1_chan3_default: pwm1-3-default {
					st,pins {
						pwm-out    = <&pio4 7 ALT3 OUT>;
					};
				};
			};
		};

		pin-controller-front {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih416-front-pinctrl";
			st,syscfg	= <&syscfg_front>;
			reg 		= <0xfee0f080 0x4>;
			reg-names	= "irqmux";
			interrupts 	= <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names	= "irqmux";
			ranges		= <0 0xfee00000 0x10000>;

			pio5: gpio@fee00000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO5";
			};
			pio6: gpio@fee01000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO6";
			};
			pio7: gpio@fee02000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO7";
			};
			pio8: gpio@fee03000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO8";
			};
			pio9: gpio@fee04000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO9";
			};
			pio10: gpio@fee05000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x5000 0x100>;
				st,bank-name	= "PIO10";
			};
			pio11: gpio@fee06000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x6000 0x100>;
				st,bank-name	= "PIO11";
			};
			pio12: gpio@fee07000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x7000 0x100>;
				st,bank-name	= "PIO12";
			};
			pio30: gpio@fee08000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x8000 0x100>;
				st,bank-name	= "PIO30";
			};
			pio31: gpio@fee09000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x9000 0x100>;
				st,bank-name	= "PIO31";
			};

			pwm0 {
				pinctrl_pwm0_chan0_default: pwm0-0-default {
					st,pins {
						pwm-out    = <&pio9 7 ALT2 OUT>;
					};
				};
			};

			serial2-oe {
				pinctrl_serial2_oe: serial2-1 {
					st,pins {
						output-enable	= <&pio11 3 ALT2 OUT>;
					};
				};
			};

			i2c0 {
				pinctrl_i2c0_default: i2c0-default {
					st,pins {
						sda = <&pio9 3 ALT1 BIDIR>;
						scl = <&pio9 2 ALT1 BIDIR>;
					};
				};
			};

			usb {
				pinctrl_usb0: usb0 {
					st,pins {
						oc-detect = <&pio9 4 ALT1 IN>;
						pwr-enable = <&pio9 5 ALT1 OUT>;
					};
				};
			};


			i2c1 {
				pinctrl_i2c1_default: i2c1-default {
					st,pins {
						sda = <&pio12 1 ALT1 BIDIR>;
						scl = <&pio12 0 ALT1 BIDIR>;
					};
				};
			};

			fsm {
				pinctrl_fsm: fsm {
					st,pins {
						spi-fsm-clk  = <&pio12 2 ALT1 OUT>;
						spi-fsm-cs   = <&pio12 3 ALT1 OUT>;
						spi-fsm-mosi = <&pio12 4 ALT1 OUT>;
						spi-fsm-miso = <&pio12 5 ALT1 IN>;
						spi-fsm-hol  = <&pio12 6 ALT1 OUT>;
						spi-fsm-wp   = <&pio12 7 ALT1 OUT>;
					};
				};
			};
		};

		pin-controller-rear {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih416-rear-pinctrl";
			st,syscfg	= <&syscfg_rear>;
			reg 		= <0xfe82f080 0x4>;
			reg-names	= "irqmux";
			interrupts 	= <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names	= "irqmux";
			ranges 		= <0 0xfe820000 0x6000>;

			pio13: gpio@fe820000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO13";
			};
			pio14: gpio@fe821000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO14";
			};
			pio15: gpio@fe822000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO15";
			};
			pio16: gpio@fe823000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO16";
			};
			pio17: gpio@fe824000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO17";
			};
			pio18: gpio@fe825000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x5000 0x100>;
				st,bank-name	= "PIO18";
				st,retime-pin-mask = <0xf>;
			};

			serial2 {
				pinctrl_serial2: serial2-0 {
					st,pins {
						tx	= <&pio17 4 ALT2 OUT>;
						rx	= <&pio17 5 ALT2 IN>;
					};
				};
			};

			gmac0 {
				pinctrl_mii0: mii0 {
					st,pins {
						mdint = <&pio13 6 ALT2 IN  BYPASS      0>;
						txen =  <&pio13 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
						txd0 =  <&pio14 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
						txd1 =  <&pio14 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
						txd2 =  <&pio14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
						txd3 =  <&pio14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>;

						txclk = <&pio15 0 ALT2 IN  NICLK       0 CLK_A>;
						txer =  <&pio15 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
						crs = <&pio15 2 ALT2 IN  BYPASS 1000>;
						col = <&pio15 3 ALT2 IN  BYPASS 1000>;
						mdio= <&pio15 4 ALT2 OUT BYPASS 1500>;
						mdc = <&pio15 5 ALT2 OUT NICLK  0    CLK_B>;

						rxd0 =  <&pio16 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
						rxd1 =  <&pio16 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
						rxd2 =  <&pio16 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
						rxd3 =  <&pio16 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
						rxdv =  <&pio15 6 ALT2 IN SE_NICLK_IO 0 CLK_A>;
						rx_er = <&pio15 7 ALT2 IN SE_NICLK_IO 0 CLK_A>;
						rxclk = <&pio17 0 ALT2 IN NICLK 0 CLK_A>;
						phyclk = <&pio13 5 ALT2 OUT NICLK 0 CLK_B>;
					};
				};

				pinctrl_gmii0: gmii0 {
					st,pins {
						};
				};
				pinctrl_rgmii0: rgmii0 {
					st,pins {
						 phyclk = <&pio13  5 ALT4 OUT NICLK 0 CLK_B>;
						 txen = <&pio13 7 ALT2 OUT DE_IO 0 CLK_A>;
						 txd0  = <&pio14 0 ALT2 OUT DE_IO 500 CLK_A>;
						 txd1  = <&pio14 1 ALT2 OUT DE_IO 500 CLK_A>;
						 txd2  = <&pio14 2 ALT2 OUT DE_IO 500 CLK_B>;
						 txd3  = <&pio14 3 ALT2 OUT DE_IO 500 CLK_B>;
						 txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;

						 mdio = <&pio15 4 ALT2 OUT BYPASS 0>;
						 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;

						 rxdv = <&pio15 6 ALT2 IN DE_IO 500 CLK_A>;
						 rxd0 =<&pio16 0 ALT2 IN DE_IO	500 CLK_A>;
						 rxd1 =<&pio16 1 ALT2 IN DE_IO	500 CLK_A>;
						 rxd2 =<&pio16 2 ALT2 IN DE_IO	500 CLK_A>;
						 rxd3  =<&pio16 3 ALT2 IN DE_IO 500 CLK_A>;
						 rxclk =<&pio17 0 ALT2 IN NICLK 0 CLK_A>;

						 clk125=<&pio17 6 ALT1 IN NICLK 0 CLK_A>;
					};
				};
			};

			mmc0 {
				pinctrl_mmc0: mmc0 {
					st,pins {
						mmcclk  = <&pio13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;
						data0   = <&pio14 4 ALT4 BIDIR_PU BYPASS 0>;
						data1   = <&pio14 5 ALT4 BIDIR_PU BYPASS 0>;
						data2   = <&pio14 6 ALT4 BIDIR_PU BYPASS 0>;
						data3   = <&pio14 7 ALT4 BIDIR_PU BYPASS 0>;
						cmd     = <&pio15 1 ALT4 BIDIR_PU BYPASS 0>;
						wp      = <&pio15 3 ALT4 IN>;
						data4   = <&pio16 4 ALT4 BIDIR_PU BYPASS 0>;
						data5   = <&pio16 5 ALT4 BIDIR_PU BYPASS 0>;
						data6   = <&pio16 6 ALT4 BIDIR_PU BYPASS 0>;
						data7   = <&pio16 7 ALT4 BIDIR_PU BYPASS 0>;
						pwr     = <&pio17 1 ALT4 OUT>;
						cd      = <&pio17 2 ALT4 IN>;
						led     = <&pio17 3 ALT4 OUT>;
					};
				};
			};
			mmc1 {
				pinctrl_mmc1: mmc1 {
					st,pins {
						mmcclk  = <&pio15 0 ALT3 BIDIR_PU NICLK 0 CLK_B>;
						data0   = <&pio13 7 ALT3 BIDIR_PU BYPASS 0>;
						data1   = <&pio14 1 ALT3 BIDIR_PU BYPASS 0>;
						data2   = <&pio14 2 ALT3 BIDIR_PU BYPASS 0>;
						data3   = <&pio14 3 ALT3 BIDIR_PU BYPASS 0>;
						cmd     = <&pio15 4 ALT3 BIDIR_PU BYPASS 0>;
						data4   = <&pio15 6 ALT3 BIDIR_PU BYPASS 0>;
						data5   = <&pio15 7 ALT3 BIDIR_PU BYPASS 0>;
						data6   = <&pio16 0 ALT3 BIDIR_PU BYPASS 0>;
						data7   = <&pio16 1 ALT3 BIDIR_PU BYPASS 0>;
						pwr     = <&pio16 2 ALT3 OUT>;
						nreset  = <&pio13 6 ALT3 OUT>;
					};
				};
			};

			usb {
				pinctrl_usb1: usb1 {
					st,pins {
						oc-detect = <&pio18 0 ALT1 IN>;
						pwr-enable = <&pio18 1 ALT1 OUT>;
					};
				};
				pinctrl_usb2: usb2 {
					st,pins {
						oc-detect = <&pio18 2 ALT1 IN>;
						pwr-enable = <&pio18 3 ALT1 OUT>;
					};
				};
			};

			pwm0 {
				pinctrl_pwm0_chan1_default: pwm0-1-default {
					st,pins {
						pwm-out    = <&pio13 2 ALT2 OUT>;
					};
				};
				pinctrl_pwm0_chan2_default: pwm0-2-default {
					st,pins {
						pwm-out    = <&pio15 2 ALT4 OUT>;
					};
				};
				pinctrl_pwm0_chan3_default: pwm0-3-default {
					st,pins {
						pwm-out    = <&pio17 4 ALT1 OUT>;
					};
				};
			};

		};

		pin-controller-fvdp-fe {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih416-fvdp-fe-pinctrl";
			st,syscfg	= <&syscfg_fvdp_fe>;
			reg 		= <0xfd6bf080 0x4>;
			reg-names	= "irqmux";
			interrupts 	= <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names	= "irqmux";
			ranges		= <0 0xfd6b0000 0x3000>;

			pio100: gpio@fd6b0000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO100";
			};
			pio101: gpio@fd6b1000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO101";
			};
			pio102: gpio@fd6b2000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO102";
			};
		};

		pin-controller-fvdp-lite {
			#address-cells	= <1>;
			#size-cells	= <1>;
			compatible	= "st,stih416-fvdp-lite-pinctrl";
			st,syscfg		= <&syscfg_fvdp_lite>;
			reg 		= <0xfd33f080 0x4>;
			reg-names	= "irqmux";
			interrupts 	= <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names	= "irqmux";
			ranges			= <0 0xfd330000 0x5000>;

			pio103: gpio@fd330000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0 0x100>;
				st,bank-name	= "PIO103";
			};
			pio104: gpio@fd331000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x1000 0x100>;
				st,bank-name	= "PIO104";
			};
			pio105: gpio@fd332000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x2000 0x100>;
				st,bank-name	= "PIO105";
			};
			pio106: gpio@fd333000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x3000 0x100>;
				st,bank-name	= "PIO106";
			};

			pio107: gpio@fd334000 {
				gpio-controller;
				#gpio-cells	= <1>;
				interrupt-controller;
				#interrupt-cells = <2>;
				reg		= <0x4000 0x100>;
				st,bank-name	= "PIO107";
				st,retime-pin-mask = <0xf>;
			};
		};
	};
};
Commit	Line	Data
15969b45 SK	1
	2	/*
	3	* Copyright (C) 2013 STMicroelectronics Limited.
	4	* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* publishhed by the Free Software Foundation.
	9	*/
	10	#include "st-pincfg.h"
bdda8b05	11	#include <dt-bindings/interrupt-controller/arm-gic.h>
15969b45 SK	12	/ {
	13
	14	aliases {
dc62bfdf LJ	15	gpio0 = &pio0;
	16	gpio1 = &pio1;
	17	gpio2 = &pio2;
	18	gpio3 = &pio3;
	19	gpio4 = &pio4;
	20	gpio5 = &pio40;
	21	gpio6 = &pio5;
	22	gpio7 = &pio6;
	23	gpio8 = &pio7;
	24	gpio9 = &pio8;
	25	gpio10 = &pio9;
	26	gpio11 = &pio10;
	27	gpio12 = &pio11;
	28	gpio13 = &pio12;
	29	gpio14 = &pio30;
	30	gpio15 = &pio31;
	31	gpio16 = &pio13;
	32	gpio17 = &pio14;
	33	gpio18 = &pio15;
	34	gpio19 = &pio16;
	35	gpio20 = &pio17;
	36	gpio21 = &pio18;
	37	gpio22 = &pio100;
	38	gpio23 = &pio101;
	39	gpio24 = &pio102;
	40	gpio25 = &pio103;
	41	gpio26 = &pio104;
	42	gpio27 = &pio105;
	43	gpio28 = &pio106;
	44	gpio29 = &pio107;
15969b45 SK	45	};
	46
	47	soc {
	48	pin-controller-sbc {
	49	#address-cells = <1>;
	50	#size-cells = <1>;
	51	compatible = "st,stih416-sbc-pinctrl";
	52	st,syscfg = <&syscfg_sbc>;
bdda8b05 SK	53	reg = <0xfe61f080 0x4>;
	54	reg-names = "irqmux";
	55	interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
ae107d06	56	interrupt-names = "irqmux";
15969b45 SK	57	ranges = <0 0xfe610000 0x6000>;
15969b45 SK	58
dc62bfdf	59	pio0: gpio@fe610000 {
15969b45 SK	60	gpio-controller;
15969b45 SK	61	#gpio-cells = <1>;
bdda8b05 SK	62	interrupt-controller;
bdda8b05 SK	63	#interrupt-cells = <2>;
15969b45 SK	64	reg = <0 0x100>;
	65	st,bank-name = "PIO0";
	66	};
dc62bfdf	67	pio1: gpio@fe611000 {
15969b45 SK	68	gpio-controller;
15969b45 SK	69	#gpio-cells = <1>;
bdda8b05 SK	70	interrupt-controller;
bdda8b05 SK	71	#interrupt-cells = <2>;
15969b45 SK	72	reg = <0x1000 0x100>;
	73	st,bank-name = "PIO1";
	74	};
dc62bfdf	75	pio2: gpio@fe612000 {
15969b45 SK	76	gpio-controller;
15969b45 SK	77	#gpio-cells = <1>;
bdda8b05 SK	78	interrupt-controller;
bdda8b05 SK	79	#interrupt-cells = <2>;
15969b45 SK	80	reg = <0x2000 0x100>;
	81	st,bank-name = "PIO2";
	82	};
dc62bfdf	83	pio3: gpio@fe613000 {
15969b45 SK	84	gpio-controller;
15969b45 SK	85	#gpio-cells = <1>;
bdda8b05 SK	86	interrupt-controller;
bdda8b05 SK	87	#interrupt-cells = <2>;
15969b45 SK	88	reg = <0x3000 0x100>;
	89	st,bank-name = "PIO3";
	90	};
dc62bfdf	91	pio4: gpio@fe614000 {
15969b45 SK	92	gpio-controller;
15969b45 SK	93	#gpio-cells = <1>;
bdda8b05 SK	94	interrupt-controller;
bdda8b05 SK	95	#interrupt-cells = <2>;
15969b45 SK	96	reg = <0x4000 0x100>;
	97	st,bank-name = "PIO4";
	98	};
dc62bfdf	99	pio40: gpio@fe615000 {
15969b45 SK	100	gpio-controller;
15969b45 SK	101	#gpio-cells = <1>;
bdda8b05 SK	102	interrupt-controller;
bdda8b05 SK	103	#interrupt-cells = <2>;
15969b45 SK	104	reg = <0x5000 0x100>;
	105	st,bank-name = "PIO40";
	106	st,retime-pin-mask = <0x7f>;
	107	};
	108
e063735f SK	109	rc{
	110	pinctrl_ir: ir0 {
	111	st,pins {
dc62bfdf	112	ir = <&pio4 0 ALT2 IN>;
e063735f SK	113	};
	114	};
	115	};
15969b45 SK	116	sbc_serial1 {
	117	pinctrl_sbc_serial1: sbc_serial1 {
	118	st,pins {
dc62bfdf LJ	119	tx = <&pio2 6 ALT3 OUT>;
dc62bfdf LJ	120	rx = <&pio2 7 ALT3 IN>;
15969b45 SK	121	};
	122	};
	123	};
f53e99a9	124
948d8ffb GF	125	keyscan {
	126	pinctrl_keyscan: keyscan {
	127	st,pins {
dc62bfdf LJ	128	keyin0 = <&pio0 2 ALT2 IN>;
	129	keyin1 = <&pio0 3 ALT2 IN>;
	130	keyin2 = <&pio0 4 ALT2 IN>;
	131	keyin3 = <&pio2 6 ALT2 IN>;
	132
	133	keyout0 = <&pio1 6 ALT2 OUT>;
	134	keyout1 = <&pio1 7 ALT2 OUT>;
	135	keyout2 = <&pio0 6 ALT2 OUT>;
	136	keyout3 = <&pio2 7 ALT2 OUT>;
948d8ffb GF	137	};
	138	};
	139	};
	140
f53e99a9 MC	141	sbc_i2c0 {
	142	pinctrl_sbc_i2c0_default: sbc_i2c0-default {
	143	st,pins {
dc62bfdf LJ	144	sda = <&pio4 6 ALT1 BIDIR>;
dc62bfdf LJ	145	scl = <&pio4 5 ALT1 BIDIR>;
f53e99a9 MC	146	};
	147	};
	148	};
	149
401a5269 PG	150	usb {
	151	pinctrl_usb3: usb3 {
	152	st,pins {
	153	oc-detect = <&pio40 0 ALT1 IN>;
	154	pwr-enable = <&pio40 1 ALT1 OUT>;
	155	};
	156	};
	157	};
	158
f53e99a9 MC	159	sbc_i2c1 {
	160	pinctrl_sbc_i2c1_default: sbc_i2c1-default {
	161	st,pins {
dc62bfdf LJ	162	sda = <&pio3 2 ALT2 BIDIR>;
dc62bfdf LJ	163	scl = <&pio3 1 ALT2 BIDIR>;
f53e99a9 MC	164	};
	165	};
	166	};
d25ea584 SK	167
	168	gmac1 {
	169	pinctrl_mii1: mii1 {
	170	st,pins {
dc62bfdf LJ	171	txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
	172	txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
	173	txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
	174	txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
	175	txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
	176	txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
	177	txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
	178	col = <&pio0 7 ALT1 IN BYPASS 1000>;
	179
	180	mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
	181	mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
	182	crs = <&pio1 2 ALT1 IN BYPASS 1000>;
	183	mdint = <&pio1 3 ALT1 IN BYPASS 0>;
	184	rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
	185	rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
	186	rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
	187	rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
	188
	189	rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
	190	rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
	191	rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
	192	phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
d25ea584 SK	193	};
	194	};
	195	pinctrl_rgmii1: rgmii1-0 {
	196	st,pins {
dc62bfdf LJ	197	txd0 = <&pio0 0 ALT1 OUT DE_IO 500 CLK_A>;
	198	txd1 = <&pio0 1 ALT1 OUT DE_IO 500 CLK_A>;
	199	txd2 = <&pio0 2 ALT1 OUT DE_IO 500 CLK_A>;
	200	txd3 = <&pio0 3 ALT1 OUT DE_IO 500 CLK_A>;
	201	txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
	202	txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
	203
	204	mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
	205	mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
	206	rxd0 = <&pio1 4 ALT1 IN DE_IO 500 CLK_A>;
	207	rxd1 = <&pio1 5 ALT1 IN DE_IO 500 CLK_A>;
	208	rxd2 = <&pio1 6 ALT1 IN DE_IO 500 CLK_A>;
	209	rxd3 = <&pio1 7 ALT1 IN DE_IO 500 CLK_A>;
	210
	211	rxdv = <&pio2 0 ALT1 IN DE_IO 500 CLK_A>;
	212	rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
	213	phyclk = <&pio2 3 ALT4 OUT NICLK 0 CLK_B>;
	214
	215	clk125= <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
d25ea584 SK	216	};
	217	};
	218	};
9723bac0 LJ	219
	220	pwm1 {
	221	pinctrl_pwm1_chan0_default: pwm1-0-default {
	222	st,pins {
	223	pwm-out = <&pio3 0 ALT1 OUT>;
	224	};
	225	};
	226	pinctrl_pwm1_chan1_default: pwm1-1-default {
	227	st,pins {
	228	pwm-out = <&pio4 4 ALT1 OUT>;
	229	};
	230	};
	231	pinctrl_pwm1_chan2_default: pwm1-2-default {
	232	st,pins {
	233	pwm-out = <&pio4 6 ALT3 OUT>;
	234	};
	235	};
	236	pinctrl_pwm1_chan3_default: pwm1-3-default {
	237	st,pins {
	238	pwm-out = <&pio4 7 ALT3 OUT>;
	239	};
	240	};
	241	};
15969b45 SK	242	};
	243
	244	pin-controller-front {
	245	#address-cells = <1>;
	246	#size-cells = <1>;
	247	compatible = "st,stih416-front-pinctrl";
	248	st,syscfg = <&syscfg_front>;
bdda8b05 SK	249	reg = <0xfee0f080 0x4>;
	250	reg-names = "irqmux";
	251	interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
ae107d06	252	interrupt-names = "irqmux";
15969b45 SK	253	ranges = <0 0xfee00000 0x10000>;
15969b45 SK	254
dc62bfdf	255	pio5: gpio@fee00000 {
15969b45 SK	256	gpio-controller;
15969b45 SK	257	#gpio-cells = <1>;
bdda8b05 SK	258	interrupt-controller;
bdda8b05 SK	259	#interrupt-cells = <2>;
15969b45 SK	260	reg = <0 0x100>;
	261	st,bank-name = "PIO5";
	262	};
dc62bfdf	263	pio6: gpio@fee01000 {
15969b45 SK	264	gpio-controller;
15969b45 SK	265	#gpio-cells = <1>;
bdda8b05 SK	266	interrupt-controller;
bdda8b05 SK	267	#interrupt-cells = <2>;
15969b45 SK	268	reg = <0x1000 0x100>;
	269	st,bank-name = "PIO6";
	270	};
dc62bfdf	271	pio7: gpio@fee02000 {
15969b45 SK	272	gpio-controller;
15969b45 SK	273	#gpio-cells = <1>;
bdda8b05 SK	274	interrupt-controller;
bdda8b05 SK	275	#interrupt-cells = <2>;
15969b45 SK	276	reg = <0x2000 0x100>;
	277	st,bank-name = "PIO7";
	278	};
dc62bfdf	279	pio8: gpio@fee03000 {
15969b45 SK	280	gpio-controller;
15969b45 SK	281	#gpio-cells = <1>;
bdda8b05 SK	282	interrupt-controller;
bdda8b05 SK	283	#interrupt-cells = <2>;
15969b45 SK	284	reg = <0x3000 0x100>;
	285	st,bank-name = "PIO8";
	286	};
dc62bfdf	287	pio9: gpio@fee04000 {
15969b45 SK	288	gpio-controller;
15969b45 SK	289	#gpio-cells = <1>;
bdda8b05 SK	290	interrupt-controller;
bdda8b05 SK	291	#interrupt-cells = <2>;
15969b45 SK	292	reg = <0x4000 0x100>;
	293	st,bank-name = "PIO9";
	294	};
dc62bfdf	295	pio10: gpio@fee05000 {
15969b45 SK	296	gpio-controller;
15969b45 SK	297	#gpio-cells = <1>;
bdda8b05 SK	298	interrupt-controller;
bdda8b05 SK	299	#interrupt-cells = <2>;
15969b45 SK	300	reg = <0x5000 0x100>;
	301	st,bank-name = "PIO10";
	302	};
dc62bfdf	303	pio11: gpio@fee06000 {
15969b45 SK	304	gpio-controller;
15969b45 SK	305	#gpio-cells = <1>;
bdda8b05 SK	306	interrupt-controller;
bdda8b05 SK	307	#interrupt-cells = <2>;
15969b45 SK	308	reg = <0x6000 0x100>;
	309	st,bank-name = "PIO11";
	310	};
dc62bfdf	311	pio12: gpio@fee07000 {
15969b45 SK	312	gpio-controller;
15969b45 SK	313	#gpio-cells = <1>;
bdda8b05 SK	314	interrupt-controller;
bdda8b05 SK	315	#interrupt-cells = <2>;
15969b45 SK	316	reg = <0x7000 0x100>;
	317	st,bank-name = "PIO12";
	318	};
dc62bfdf	319	pio30: gpio@fee08000 {
15969b45 SK	320	gpio-controller;
15969b45 SK	321	#gpio-cells = <1>;
bdda8b05 SK	322	interrupt-controller;
bdda8b05 SK	323	#interrupt-cells = <2>;
15969b45 SK	324	reg = <0x8000 0x100>;
	325	st,bank-name = "PIO30";
	326	};
dc62bfdf	327	pio31: gpio@fee09000 {
15969b45 SK	328	gpio-controller;
15969b45 SK	329	#gpio-cells = <1>;
bdda8b05 SK	330	interrupt-controller;
bdda8b05 SK	331	#interrupt-cells = <2>;
15969b45 SK	332	reg = <0x9000 0x100>;
	333	st,bank-name = "PIO31";
	334	};
334ab91d	335
9723bac0 LJ	336	pwm0 {
	337	pinctrl_pwm0_chan0_default: pwm0-0-default {
	338	st,pins {
	339	pwm-out = <&pio9 7 ALT2 OUT>;
	340	};
	341	};
	342	};
	343
334ab91d SK	344	serial2-oe {
	345	pinctrl_serial2_oe: serial2-1 {
	346	st,pins {
dc62bfdf	347	output-enable = <&pio11 3 ALT2 OUT>;
334ab91d SK	348	};
	349	};
	350	};
	351
f53e99a9 MC	352	i2c0 {
	353	pinctrl_i2c0_default: i2c0-default {
	354	st,pins {
dc62bfdf LJ	355	sda = <&pio9 3 ALT1 BIDIR>;
dc62bfdf LJ	356	scl = <&pio9 2 ALT1 BIDIR>;
f53e99a9 MC	357	};
	358	};
	359	};
	360
401a5269 PG	361	usb {
	362	pinctrl_usb0: usb0 {
	363	st,pins {
	364	oc-detect = <&pio9 4 ALT1 IN>;
	365	pwr-enable = <&pio9 5 ALT1 OUT>;
	366	};
	367	};
	368	};
	369
	370
f53e99a9 MC	371	i2c1 {
	372	pinctrl_i2c1_default: i2c1-default {
	373	st,pins {
dc62bfdf LJ	374	sda = <&pio12 1 ALT1 BIDIR>;
dc62bfdf LJ	375	scl = <&pio12 0 ALT1 BIDIR>;
f53e99a9 MC	376	};
	377	};
	378	};
77f8d9b7 LJ	379
	380	fsm {
	381	pinctrl_fsm: fsm {
	382	st,pins {
dc62bfdf LJ	383	spi-fsm-clk = <&pio12 2 ALT1 OUT>;
	384	spi-fsm-cs = <&pio12 3 ALT1 OUT>;
	385	spi-fsm-mosi = <&pio12 4 ALT1 OUT>;
	386	spi-fsm-miso = <&pio12 5 ALT1 IN>;
	387	spi-fsm-hol = <&pio12 6 ALT1 OUT>;
	388	spi-fsm-wp = <&pio12 7 ALT1 OUT>;
77f8d9b7 LJ	389	};
	390	};
	391	};
15969b45 SK	392	};
	393
	394	pin-controller-rear {
	395	#address-cells = <1>;
	396	#size-cells = <1>;
	397	compatible = "st,stih416-rear-pinctrl";
	398	st,syscfg = <&syscfg_rear>;
bdda8b05 SK	399	reg = <0xfe82f080 0x4>;
	400	reg-names = "irqmux";
	401	interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
ae107d06	402	interrupt-names = "irqmux";
15969b45 SK	403	ranges = <0 0xfe820000 0x6000>;
15969b45 SK	404
dc62bfdf	405	pio13: gpio@fe820000 {
15969b45 SK	406	gpio-controller;
15969b45 SK	407	#gpio-cells = <1>;
bdda8b05 SK	408	interrupt-controller;
bdda8b05 SK	409	#interrupt-cells = <2>;
15969b45 SK	410	reg = <0 0x100>;
	411	st,bank-name = "PIO13";
	412	};
dc62bfdf	413	pio14: gpio@fe821000 {
15969b45 SK	414	gpio-controller;
15969b45 SK	415	#gpio-cells = <1>;
bdda8b05 SK	416	interrupt-controller;
bdda8b05 SK	417	#interrupt-cells = <2>;
15969b45 SK	418	reg = <0x1000 0x100>;
	419	st,bank-name = "PIO14";
	420	};
dc62bfdf	421	pio15: gpio@fe822000 {
15969b45 SK	422	gpio-controller;
15969b45 SK	423	#gpio-cells = <1>;
bdda8b05 SK	424	interrupt-controller;
bdda8b05 SK	425	#interrupt-cells = <2>;
15969b45 SK	426	reg = <0x2000 0x100>;
	427	st,bank-name = "PIO15";
	428	};
dc62bfdf	429	pio16: gpio@fe823000 {
15969b45 SK	430	gpio-controller;
15969b45 SK	431	#gpio-cells = <1>;
bdda8b05 SK	432	interrupt-controller;
bdda8b05 SK	433	#interrupt-cells = <2>;
15969b45 SK	434	reg = <0x3000 0x100>;
	435	st,bank-name = "PIO16";
	436	};
dc62bfdf	437	pio17: gpio@fe824000 {
15969b45 SK	438	gpio-controller;
15969b45 SK	439	#gpio-cells = <1>;
bdda8b05 SK	440	interrupt-controller;
bdda8b05 SK	441	#interrupt-cells = <2>;
15969b45 SK	442	reg = <0x4000 0x100>;
	443	st,bank-name = "PIO17";
	444	};
dc62bfdf	445	pio18: gpio@fe825000 {
15969b45 SK	446	gpio-controller;
15969b45 SK	447	#gpio-cells = <1>;
bdda8b05 SK	448	interrupt-controller;
bdda8b05 SK	449	#interrupt-cells = <2>;
15969b45 SK	450	reg = <0x5000 0x100>;
	451	st,bank-name = "PIO18";
	452	st,retime-pin-mask = <0xf>;
	453	};
	454
	455	serial2 {
	456	pinctrl_serial2: serial2-0 {
	457	st,pins {
dc62bfdf LJ	458	tx = <&pio17 4 ALT2 OUT>;
dc62bfdf LJ	459	rx = <&pio17 5 ALT2 IN>;
15969b45 SK	460	};
	461	};
	462	};
d25ea584 SK	463
	464	gmac0 {
	465	pinctrl_mii0: mii0 {
	466	st,pins {
dc62bfdf LJ	467	mdint = <&pio13 6 ALT2 IN BYPASS 0>;
	468	txen = <&pio13 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
	469	txd0 = <&pio14 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
	470	txd1 = <&pio14 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
	471	txd2 = <&pio14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
	472	txd3 = <&pio14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
	473
	474	txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;
	475	txer = <&pio15 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
	476	crs = <&pio15 2 ALT2 IN BYPASS 1000>;
	477	col = <&pio15 3 ALT2 IN BYPASS 1000>;
	478	mdio= <&pio15 4 ALT2 OUT BYPASS 1500>;
	479	mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;
	480
	481	rxd0 = <&pio16 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
	482	rxd1 = <&pio16 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
	483	rxd2 = <&pio16 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
	484	rxd3 = <&pio16 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
	485	rxdv = <&pio15 6 ALT2 IN SE_NICLK_IO 0 CLK_A>;
	486	rx_er = <&pio15 7 ALT2 IN SE_NICLK_IO 0 CLK_A>;
	487	rxclk = <&pio17 0 ALT2 IN NICLK 0 CLK_A>;
	488	phyclk = <&pio13 5 ALT2 OUT NICLK 0 CLK_B>;
d25ea584 SK	489	};
	490	};
	491
	492	pinctrl_gmii0: gmii0 {
	493	st,pins {
	494	};
	495	};
	496	pinctrl_rgmii0: rgmii0 {
	497	st,pins {
dc62bfdf LJ	498	phyclk = <&pio13 5 ALT4 OUT NICLK 0 CLK_B>;
	499	txen = <&pio13 7 ALT2 OUT DE_IO 0 CLK_A>;
	500	txd0 = <&pio14 0 ALT2 OUT DE_IO 500 CLK_A>;
	501	txd1 = <&pio14 1 ALT2 OUT DE_IO 500 CLK_A>;
	502	txd2 = <&pio14 2 ALT2 OUT DE_IO 500 CLK_B>;
	503	txd3 = <&pio14 3 ALT2 OUT DE_IO 500 CLK_B>;
	504	txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;
	505
	506	mdio = <&pio15 4 ALT2 OUT BYPASS 0>;
	507	mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;
	508
	509	rxdv = <&pio15 6 ALT2 IN DE_IO 500 CLK_A>;
	510	rxd0 =<&pio16 0 ALT2 IN DE_IO 500 CLK_A>;
	511	rxd1 =<&pio16 1 ALT2 IN DE_IO 500 CLK_A>;
	512	rxd2 =<&pio16 2 ALT2 IN DE_IO 500 CLK_A>;
	513	rxd3 =<&pio16 3 ALT2 IN DE_IO 500 CLK_A>;
	514	rxclk =<&pio17 0 ALT2 IN NICLK 0 CLK_A>;
	515
	516	clk125=<&pio17 6 ALT1 IN NICLK 0 CLK_A>;
d25ea584 SK	517	};
	518	};
	519	};
8106d21c PG	520
	521	mmc0 {
	522	pinctrl_mmc0: mmc0 {
	523	st,pins {
	524	mmcclk = <&pio13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;
	525	data0 = <&pio14 4 ALT4 BIDIR_PU BYPASS 0>;
	526	data1 = <&pio14 5 ALT4 BIDIR_PU BYPASS 0>;
	527	data2 = <&pio14 6 ALT4 BIDIR_PU BYPASS 0>;
	528	data3 = <&pio14 7 ALT4 BIDIR_PU BYPASS 0>;
	529	cmd = <&pio15 1 ALT4 BIDIR_PU BYPASS 0>;
	530	wp = <&pio15 3 ALT4 IN>;
	531	data4 = <&pio16 4 ALT4 BIDIR_PU BYPASS 0>;
	532	data5 = <&pio16 5 ALT4 BIDIR_PU BYPASS 0>;
	533	data6 = <&pio16 6 ALT4 BIDIR_PU BYPASS 0>;
	534	data7 = <&pio16 7 ALT4 BIDIR_PU BYPASS 0>;
	535	pwr = <&pio17 1 ALT4 OUT>;
	536	cd = <&pio17 2 ALT4 IN>;
	537	led = <&pio17 3 ALT4 OUT>;
	538	};
	539	};
	540	};
	541	mmc1 {
	542	pinctrl_mmc1: mmc1 {
	543	st,pins {
	544	mmcclk = <&pio15 0 ALT3 BIDIR_PU NICLK 0 CLK_B>;
	545	data0 = <&pio13 7 ALT3 BIDIR_PU BYPASS 0>;
	546	data1 = <&pio14 1 ALT3 BIDIR_PU BYPASS 0>;
	547	data2 = <&pio14 2 ALT3 BIDIR_PU BYPASS 0>;
	548	data3 = <&pio14 3 ALT3 BIDIR_PU BYPASS 0>;
	549	cmd = <&pio15 4 ALT3 BIDIR_PU BYPASS 0>;
	550	data4 = <&pio15 6 ALT3 BIDIR_PU BYPASS 0>;
	551	data5 = <&pio15 7 ALT3 BIDIR_PU BYPASS 0>;
	552	data6 = <&pio16 0 ALT3 BIDIR_PU BYPASS 0>;
	553	data7 = <&pio16 1 ALT3 BIDIR_PU BYPASS 0>;
	554	pwr = <&pio16 2 ALT3 OUT>;
	555	nreset = <&pio13 6 ALT3 OUT>;
	556	};
	557	};
	558	};
401a5269 PG	559
	560	usb {
	561	pinctrl_usb1: usb1 {
	562	st,pins {
	563	oc-detect = <&pio18 0 ALT1 IN>;
	564	pwr-enable = <&pio18 1 ALT1 OUT>;
	565	};
	566	};
	567	pinctrl_usb2: usb2 {
	568	st,pins {
	569	oc-detect = <&pio18 2 ALT1 IN>;
	570	pwr-enable = <&pio18 3 ALT1 OUT>;
	571	};
	572	};
	573	};
9723bac0 LJ	574
	575	pwm0 {
	576	pinctrl_pwm0_chan1_default: pwm0-1-default {
	577	st,pins {
	578	pwm-out = <&pio13 2 ALT2 OUT>;
	579	};
	580	};
	581	pinctrl_pwm0_chan2_default: pwm0-2-default {
	582	st,pins {
	583	pwm-out = <&pio15 2 ALT4 OUT>;
	584	};
	585	};
	586	pinctrl_pwm0_chan3_default: pwm0-3-default {
	587	st,pins {
	588	pwm-out = <&pio17 4 ALT1 OUT>;
	589	};
	590	};
	591	};
	592
15969b45 SK	593	};
	594
	595	pin-controller-fvdp-fe {
	596	#address-cells = <1>;
	597	#size-cells = <1>;
	598	compatible = "st,stih416-fvdp-fe-pinctrl";
	599	st,syscfg = <&syscfg_fvdp_fe>;
bdda8b05 SK	600	reg = <0xfd6bf080 0x4>;
	601	reg-names = "irqmux";
	602	interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
ae107d06	603	interrupt-names = "irqmux";
15969b45 SK	604	ranges = <0 0xfd6b0000 0x3000>;
15969b45 SK	605
dc62bfdf	606	pio100: gpio@fd6b0000 {
15969b45 SK	607	gpio-controller;
15969b45 SK	608	#gpio-cells = <1>;
bdda8b05 SK	609	interrupt-controller;
bdda8b05 SK	610	#interrupt-cells = <2>;
15969b45 SK	611	reg = <0 0x100>;
	612	st,bank-name = "PIO100";
	613	};
dc62bfdf	614	pio101: gpio@fd6b1000 {
15969b45 SK	615	gpio-controller;
15969b45 SK	616	#gpio-cells = <1>;
bdda8b05 SK	617	interrupt-controller;
bdda8b05 SK	618	#interrupt-cells = <2>;
15969b45 SK	619	reg = <0x1000 0x100>;
	620	st,bank-name = "PIO101";
	621	};
dc62bfdf	622	pio102: gpio@fd6b2000 {
15969b45 SK	623	gpio-controller;
15969b45 SK	624	#gpio-cells = <1>;
bdda8b05 SK	625	interrupt-controller;
bdda8b05 SK	626	#interrupt-cells = <2>;
15969b45 SK	627	reg = <0x2000 0x100>;
	628	st,bank-name = "PIO102";
	629	};
	630	};
	631
	632	pin-controller-fvdp-lite {
	633	#address-cells = <1>;
	634	#size-cells = <1>;
	635	compatible = "st,stih416-fvdp-lite-pinctrl";
	636	st,syscfg = <&syscfg_fvdp_lite>;
bdda8b05 SK	637	reg = <0xfd33f080 0x4>;
	638	reg-names = "irqmux";
	639	interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
ae107d06	640	interrupt-names = "irqmux";
15969b45 SK	641	ranges = <0 0xfd330000 0x5000>;
15969b45 SK	642
dc62bfdf	643	pio103: gpio@fd330000 {
15969b45 SK	644	gpio-controller;
15969b45 SK	645	#gpio-cells = <1>;
bdda8b05 SK	646	interrupt-controller;
bdda8b05 SK	647	#interrupt-cells = <2>;
15969b45 SK	648	reg = <0 0x100>;
	649	st,bank-name = "PIO103";
	650	};
dc62bfdf	651	pio104: gpio@fd331000 {
15969b45 SK	652	gpio-controller;
15969b45 SK	653	#gpio-cells = <1>;
bdda8b05 SK	654	interrupt-controller;
bdda8b05 SK	655	#interrupt-cells = <2>;
15969b45 SK	656	reg = <0x1000 0x100>;
	657	st,bank-name = "PIO104";
	658	};
dc62bfdf	659	pio105: gpio@fd332000 {
15969b45 SK	660	gpio-controller;
15969b45 SK	661	#gpio-cells = <1>;
bdda8b05 SK	662	interrupt-controller;
bdda8b05 SK	663	#interrupt-cells = <2>;
15969b45 SK	664	reg = <0x2000 0x100>;
	665	st,bank-name = "PIO105";
	666	};
dc62bfdf	667	pio106: gpio@fd333000 {
15969b45 SK	668	gpio-controller;
15969b45 SK	669	#gpio-cells = <1>;
bdda8b05 SK	670	interrupt-controller;
bdda8b05 SK	671	#interrupt-cells = <2>;
15969b45 SK	672	reg = <0x3000 0x100>;
	673	st,bank-name = "PIO106";
	674	};
	675
dc62bfdf	676	pio107: gpio@fd334000 {
15969b45 SK	677	gpio-controller;
15969b45 SK	678	#gpio-cells = <1>;
bdda8b05 SK	679	interrupt-controller;
bdda8b05 SK	680	#interrupt-cells = <2>;
15969b45 SK	681	reg = <0x4000 0x100>;
	682	st,bank-name = "PIO107";
	683	st,retime-pin-mask = <0xf>;
	684	};
	685	};
	686	};
	687	};