Commit | Line | Data |
---|---|---|
8e267f3d GL |
1 | /dts-v1/; |
2 | ||
1bd0bd49 | 3 | #include "tegra20.dtsi" |
8e267f3d GL |
4 | |
5 | / { | |
6 | model = "NVIDIA Seaboard"; | |
7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; | |
8 | ||
8e267f3d | 9 | memory { |
95decf84 | 10 | reg = <0x00000000 0x40000000>; |
8e267f3d GL |
11 | }; |
12 | ||
a75191e6 SW |
13 | host1x { |
14 | hdmi { | |
15 | status = "okay"; | |
16 | ||
17 | vdd-supply = <&hdmi_vdd_reg>; | |
18 | pll-supply = <&hdmi_pll_reg>; | |
19 | ||
20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | |
3325f1bc SW |
21 | nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
22 | GPIO_ACTIVE_HIGH>; | |
a75191e6 SW |
23 | }; |
24 | }; | |
25 | ||
f9eb26a4 | 26 | pinmux { |
ecc295bb SW |
27 | pinctrl-names = "default"; |
28 | pinctrl-0 = <&state_default>; | |
29 | ||
30 | state_default: pinmux { | |
31 | ata { | |
32 | nvidia,pins = "ata"; | |
33 | nvidia,function = "ide"; | |
34 | }; | |
35 | atb { | |
36 | nvidia,pins = "atb", "gma", "gme"; | |
37 | nvidia,function = "sdio4"; | |
38 | }; | |
39 | atc { | |
40 | nvidia,pins = "atc"; | |
41 | nvidia,function = "nand"; | |
42 | }; | |
43 | atd { | |
44 | nvidia,pins = "atd", "ate", "gmb", "spia", | |
45 | "spib", "spic"; | |
46 | nvidia,function = "gmi"; | |
47 | }; | |
48 | cdev1 { | |
49 | nvidia,pins = "cdev1"; | |
50 | nvidia,function = "plla_out"; | |
51 | }; | |
52 | cdev2 { | |
53 | nvidia,pins = "cdev2"; | |
54 | nvidia,function = "pllp_out4"; | |
55 | }; | |
56 | crtp { | |
57 | nvidia,pins = "crtp", "lm1"; | |
58 | nvidia,function = "crt"; | |
59 | }; | |
60 | csus { | |
61 | nvidia,pins = "csus"; | |
62 | nvidia,function = "vi_sensor_clk"; | |
63 | }; | |
64 | dap1 { | |
65 | nvidia,pins = "dap1"; | |
66 | nvidia,function = "dap1"; | |
67 | }; | |
68 | dap2 { | |
69 | nvidia,pins = "dap2"; | |
70 | nvidia,function = "dap2"; | |
71 | }; | |
72 | dap3 { | |
73 | nvidia,pins = "dap3"; | |
74 | nvidia,function = "dap3"; | |
75 | }; | |
76 | dap4 { | |
77 | nvidia,pins = "dap4"; | |
78 | nvidia,function = "dap4"; | |
79 | }; | |
ecc295bb SW |
80 | dta { |
81 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; | |
82 | nvidia,function = "vi"; | |
83 | }; | |
84 | dtf { | |
85 | nvidia,pins = "dtf"; | |
86 | nvidia,function = "i2c3"; | |
87 | }; | |
88 | gmc { | |
89 | nvidia,pins = "gmc"; | |
90 | nvidia,function = "uartd"; | |
91 | }; | |
92 | gmd { | |
93 | nvidia,pins = "gmd"; | |
94 | nvidia,function = "sflash"; | |
95 | }; | |
96 | gpu { | |
97 | nvidia,pins = "gpu"; | |
98 | nvidia,function = "pwm"; | |
99 | }; | |
100 | gpu7 { | |
101 | nvidia,pins = "gpu7"; | |
102 | nvidia,function = "rtck"; | |
103 | }; | |
104 | gpv { | |
105 | nvidia,pins = "gpv", "slxa", "slxk"; | |
106 | nvidia,function = "pcie"; | |
107 | }; | |
108 | hdint { | |
109 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", | |
802a8499 | 110 | "lsck", "lsda"; |
ecc295bb SW |
111 | nvidia,function = "hdmi"; |
112 | }; | |
113 | i2cp { | |
114 | nvidia,pins = "i2cp"; | |
115 | nvidia,function = "i2cp"; | |
116 | }; | |
117 | irrx { | |
118 | nvidia,pins = "irrx", "irtx"; | |
119 | nvidia,function = "uartb"; | |
120 | }; | |
121 | kbca { | |
122 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
123 | "kbce", "kbcf"; | |
124 | nvidia,function = "kbc"; | |
125 | }; | |
126 | lcsn { | |
127 | nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", | |
128 | "lsdi", "lvp0"; | |
129 | nvidia,function = "rsvd4"; | |
130 | }; | |
131 | ld0 { | |
132 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
133 | "ld5", "ld6", "ld7", "ld8", "ld9", | |
134 | "ld10", "ld11", "ld12", "ld13", "ld14", | |
135 | "ld15", "ld16", "ld17", "ldi", "lhp0", | |
136 | "lhp1", "lhp2", "lhs", "lpp", "lsc0", | |
137 | "lspi", "lvp1", "lvs"; | |
138 | nvidia,function = "displaya"; | |
139 | }; | |
a18cf6dc SW |
140 | owc { |
141 | nvidia,pins = "owc", "spdi", "spdo", "uac"; | |
142 | nvidia,function = "rsvd2"; | |
143 | }; | |
ecc295bb SW |
144 | pmc { |
145 | nvidia,pins = "pmc"; | |
146 | nvidia,function = "pwr_on"; | |
147 | }; | |
148 | rm { | |
149 | nvidia,pins = "rm"; | |
150 | nvidia,function = "i2c1"; | |
151 | }; | |
152 | sdb { | |
153 | nvidia,pins = "sdb", "sdc", "sdd"; | |
154 | nvidia,function = "sdio3"; | |
155 | }; | |
156 | sdio1 { | |
157 | nvidia,pins = "sdio1"; | |
158 | nvidia,function = "sdio1"; | |
159 | }; | |
160 | slxc { | |
161 | nvidia,pins = "slxc", "slxd"; | |
162 | nvidia,function = "spdif"; | |
163 | }; | |
164 | spid { | |
165 | nvidia,pins = "spid", "spie", "spif"; | |
166 | nvidia,function = "spi1"; | |
167 | }; | |
168 | spig { | |
169 | nvidia,pins = "spig", "spih"; | |
170 | nvidia,function = "spi2_alt"; | |
171 | }; | |
172 | uaa { | |
173 | nvidia,pins = "uaa", "uab", "uda"; | |
174 | nvidia,function = "ulpi"; | |
175 | }; | |
176 | uad { | |
177 | nvidia,pins = "uad"; | |
178 | nvidia,function = "irda"; | |
179 | }; | |
180 | uca { | |
181 | nvidia,pins = "uca", "ucb"; | |
182 | nvidia,function = "uartc"; | |
183 | }; | |
184 | conf_ata { | |
185 | nvidia,pins = "ata", "atb", "atc", "atd", | |
186 | "cdev1", "cdev2", "dap1", "dap2", | |
a18cf6dc | 187 | "dap4", "ddc", "dtf", "gma", "gmc", "gmd", |
ecc295bb SW |
188 | "gme", "gpu", "gpu7", "i2cp", "irrx", |
189 | "irtx", "pta", "rm", "sdc", "sdd", | |
190 | "slxd", "slxk", "spdi", "spdo", "uac", | |
191 | "uad", "uca", "ucb", "uda"; | |
192 | nvidia,pull = <0>; | |
193 | nvidia,tristate = <0>; | |
194 | }; | |
195 | conf_ate { | |
a18cf6dc | 196 | nvidia,pins = "ate", "csus", "dap3", |
ecc295bb SW |
197 | "gpv", "owc", "slxc", "spib", "spid", |
198 | "spie"; | |
199 | nvidia,pull = <0>; | |
200 | nvidia,tristate = <1>; | |
201 | }; | |
202 | conf_ck32 { | |
203 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | |
204 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | |
205 | nvidia,pull = <0>; | |
206 | }; | |
207 | conf_crtp { | |
208 | nvidia,pins = "crtp", "gmb", "slxa", "spia", | |
209 | "spig", "spih"; | |
210 | nvidia,pull = <2>; | |
211 | nvidia,tristate = <1>; | |
212 | }; | |
213 | conf_dta { | |
214 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; | |
215 | nvidia,pull = <1>; | |
216 | nvidia,tristate = <0>; | |
217 | }; | |
218 | conf_dte { | |
219 | nvidia,pins = "dte", "spif"; | |
220 | nvidia,pull = <1>; | |
221 | nvidia,tristate = <1>; | |
222 | }; | |
223 | conf_hdint { | |
224 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", | |
225 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", | |
226 | "lvp0"; | |
227 | nvidia,tristate = <1>; | |
228 | }; | |
229 | conf_kbca { | |
230 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | |
231 | "kbce", "kbcf", "sdio1", "spic", "uaa", | |
232 | "uab"; | |
233 | nvidia,pull = <2>; | |
234 | nvidia,tristate = <0>; | |
235 | }; | |
236 | conf_lc { | |
237 | nvidia,pins = "lc", "ls"; | |
238 | nvidia,pull = <2>; | |
239 | }; | |
240 | conf_ld0 { | |
241 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | |
242 | "ld5", "ld6", "ld7", "ld8", "ld9", | |
243 | "ld10", "ld11", "ld12", "ld13", "ld14", | |
244 | "ld15", "ld16", "ld17", "ldi", "lhp0", | |
245 | "lhp1", "lhp2", "lhs", "lm0", "lpp", | |
246 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", | |
247 | "lvs", "pmc", "sdb"; | |
248 | nvidia,tristate = <0>; | |
249 | }; | |
250 | conf_ld17_0 { | |
251 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", | |
252 | "ld23_22"; | |
253 | nvidia,pull = <1>; | |
254 | }; | |
255 | drive_sdio1 { | |
256 | nvidia,pins = "drive_sdio1"; | |
257 | nvidia,high-speed-mode = <0>; | |
258 | nvidia,schmitt = <0>; | |
259 | nvidia,low-power-mode = <3>; | |
260 | nvidia,pull-down-strength = <31>; | |
261 | nvidia,pull-up-strength = <31>; | |
262 | nvidia,slew-rate-rising = <3>; | |
263 | nvidia,slew-rate-falling = <3>; | |
264 | }; | |
265 | }; | |
a18cf6dc SW |
266 | |
267 | state_i2cmux_ddc: pinmux_i2cmux_ddc { | |
268 | ddc { | |
269 | nvidia,pins = "ddc"; | |
270 | nvidia,function = "i2c2"; | |
271 | }; | |
272 | pta { | |
273 | nvidia,pins = "pta"; | |
274 | nvidia,function = "rsvd4"; | |
275 | }; | |
276 | }; | |
277 | ||
278 | state_i2cmux_pta: pinmux_i2cmux_pta { | |
279 | ddc { | |
280 | nvidia,pins = "ddc"; | |
281 | nvidia,function = "rsvd4"; | |
282 | }; | |
283 | pta { | |
284 | nvidia,pins = "pta"; | |
285 | nvidia,function = "i2c2"; | |
286 | }; | |
287 | }; | |
288 | ||
289 | state_i2cmux_idle: pinmux_i2cmux_idle { | |
290 | ddc { | |
291 | nvidia,pins = "ddc"; | |
292 | nvidia,function = "rsvd4"; | |
293 | }; | |
294 | pta { | |
295 | nvidia,pins = "pta"; | |
296 | nvidia,function = "rsvd4"; | |
297 | }; | |
298 | }; | |
ecc295bb SW |
299 | }; |
300 | ||
2a5fdc9a SW |
301 | i2s@70002800 { |
302 | status = "okay"; | |
c04abb3a SW |
303 | }; |
304 | ||
305 | serial@70006300 { | |
2a5fdc9a | 306 | status = "okay"; |
c04abb3a SW |
307 | }; |
308 | ||
88950f3b | 309 | i2c@7000c000 { |
2a5fdc9a | 310 | status = "okay"; |
88950f3b | 311 | clock-frequency = <400000>; |
797acf70 SW |
312 | |
313 | wm8903: wm8903@1a { | |
314 | compatible = "wlf,wm8903"; | |
315 | reg = <0x1a>; | |
316 | interrupt-parent = <&gpio>; | |
6cecf916 | 317 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
797acf70 SW |
318 | |
319 | gpio-controller; | |
320 | #gpio-cells = <2>; | |
321 | ||
322 | micdet-cfg = <0>; | |
323 | micdet-delay = <100>; | |
95decf84 | 324 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
797acf70 | 325 | }; |
b46b0b54 LD |
326 | |
327 | /* ALS and proximity sensor */ | |
328 | isl29018@44 { | |
329 | compatible = "isil,isl29018"; | |
330 | reg = <0x44>; | |
331 | interrupt-parent = <&gpio>; | |
6cecf916 | 332 | interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; |
b46b0b54 | 333 | }; |
45dbe9dd OJ |
334 | |
335 | gyrometer@68 { | |
336 | compatible = "invn,mpu3050"; | |
337 | reg = <0x68>; | |
338 | interrupt-parent = <&gpio>; | |
6cecf916 | 339 | interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>; |
45dbe9dd | 340 | }; |
88950f3b SW |
341 | }; |
342 | ||
343 | i2c@7000c400 { | |
2a5fdc9a | 344 | status = "okay"; |
22bd1f7e | 345 | clock-frequency = <100000>; |
88950f3b SW |
346 | }; |
347 | ||
a18cf6dc SW |
348 | i2cmux { |
349 | compatible = "i2c-mux-pinctrl"; | |
350 | #address-cells = <1>; | |
351 | #size-cells = <0>; | |
352 | ||
353 | i2c-parent = <&{/i2c@7000c400}>; | |
354 | ||
355 | pinctrl-names = "ddc", "pta", "idle"; | |
356 | pinctrl-0 = <&state_i2cmux_ddc>; | |
357 | pinctrl-1 = <&state_i2cmux_pta>; | |
358 | pinctrl-2 = <&state_i2cmux_idle>; | |
359 | ||
a75191e6 | 360 | hdmi_ddc: i2c@0 { |
a18cf6dc SW |
361 | reg = <0>; |
362 | #address-cells = <1>; | |
363 | #size-cells = <0>; | |
364 | }; | |
365 | ||
366 | i2c@1 { | |
367 | reg = <1>; | |
368 | #address-cells = <1>; | |
369 | #size-cells = <0>; | |
0879c5f7 SW |
370 | |
371 | smart-battery@b { | |
372 | compatible = "ti,bq20z75", "smart-battery-1.1"; | |
373 | reg = <0xb>; | |
374 | ti,i2c-retry-count = <2>; | |
375 | ti,poll-retry-count = <10>; | |
376 | }; | |
a18cf6dc SW |
377 | }; |
378 | }; | |
379 | ||
88950f3b | 380 | i2c@7000c500 { |
2a5fdc9a | 381 | status = "okay"; |
88950f3b SW |
382 | clock-frequency = <400000>; |
383 | }; | |
384 | ||
385 | i2c@7000d000 { | |
2a5fdc9a | 386 | status = "okay"; |
88950f3b | 387 | clock-frequency = <400000>; |
401c9a50 | 388 | |
6529e638 SW |
389 | pmic: tps6586x@34 { |
390 | compatible = "ti,tps6586x"; | |
391 | reg = <0x34>; | |
6cecf916 | 392 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
6529e638 | 393 | |
44b12ef7 SW |
394 | ti,system-power-controller; |
395 | ||
6529e638 SW |
396 | #gpio-cells = <2>; |
397 | gpio-controller; | |
398 | ||
399 | sys-supply = <&vdd_5v0_reg>; | |
400 | vin-sm0-supply = <&sys_reg>; | |
401 | vin-sm1-supply = <&sys_reg>; | |
402 | vin-sm2-supply = <&sys_reg>; | |
403 | vinldo01-supply = <&sm2_reg>; | |
404 | vinldo23-supply = <&sm2_reg>; | |
405 | vinldo4-supply = <&sm2_reg>; | |
406 | vinldo678-supply = <&sm2_reg>; | |
407 | vinldo9-supply = <&sm2_reg>; | |
408 | ||
409 | regulators { | |
b9c665d7 | 410 | sys_reg: sys { |
6529e638 SW |
411 | regulator-name = "vdd_sys"; |
412 | regulator-always-on; | |
413 | }; | |
414 | ||
b9c665d7 | 415 | sm0 { |
6529e638 SW |
416 | regulator-name = "vdd_sm0,vdd_core"; |
417 | regulator-min-microvolt = <1300000>; | |
418 | regulator-max-microvolt = <1300000>; | |
419 | regulator-always-on; | |
420 | }; | |
421 | ||
b9c665d7 | 422 | sm1 { |
6529e638 SW |
423 | regulator-name = "vdd_sm1,vdd_cpu"; |
424 | regulator-min-microvolt = <1125000>; | |
425 | regulator-max-microvolt = <1125000>; | |
426 | regulator-always-on; | |
427 | }; | |
428 | ||
b9c665d7 | 429 | sm2_reg: sm2 { |
6529e638 SW |
430 | regulator-name = "vdd_sm2,vin_ldo*"; |
431 | regulator-min-microvolt = <3700000>; | |
432 | regulator-max-microvolt = <3700000>; | |
433 | regulator-always-on; | |
434 | }; | |
435 | ||
436 | /* LDO0 is not connected to anything */ | |
437 | ||
b9c665d7 | 438 | ldo1 { |
6529e638 SW |
439 | regulator-name = "vdd_ldo1,avdd_pll*"; |
440 | regulator-min-microvolt = <1100000>; | |
441 | regulator-max-microvolt = <1100000>; | |
442 | regulator-always-on; | |
443 | }; | |
444 | ||
b9c665d7 | 445 | ldo2 { |
6529e638 SW |
446 | regulator-name = "vdd_ldo2,vdd_rtc"; |
447 | regulator-min-microvolt = <1200000>; | |
448 | regulator-max-microvolt = <1200000>; | |
449 | }; | |
450 | ||
b9c665d7 | 451 | ldo3 { |
6529e638 SW |
452 | regulator-name = "vdd_ldo3,avdd_usb*"; |
453 | regulator-min-microvolt = <3300000>; | |
454 | regulator-max-microvolt = <3300000>; | |
455 | regulator-always-on; | |
456 | }; | |
457 | ||
b9c665d7 | 458 | ldo4 { |
6529e638 SW |
459 | regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
460 | regulator-min-microvolt = <1800000>; | |
461 | regulator-max-microvolt = <1800000>; | |
462 | regulator-always-on; | |
463 | }; | |
464 | ||
b9c665d7 | 465 | ldo5 { |
6529e638 SW |
466 | regulator-name = "vdd_ldo5,vcore_mmc"; |
467 | regulator-min-microvolt = <2850000>; | |
468 | regulator-max-microvolt = <2850000>; | |
469 | regulator-always-on; | |
470 | }; | |
471 | ||
b9c665d7 | 472 | ldo6 { |
6529e638 SW |
473 | regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; |
474 | regulator-min-microvolt = <1800000>; | |
475 | regulator-max-microvolt = <1800000>; | |
476 | }; | |
477 | ||
a75191e6 | 478 | hdmi_vdd_reg: ldo7 { |
6529e638 SW |
479 | regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
480 | regulator-min-microvolt = <3300000>; | |
481 | regulator-max-microvolt = <3300000>; | |
482 | }; | |
483 | ||
a75191e6 | 484 | hdmi_pll_reg: ldo8 { |
6529e638 SW |
485 | regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
486 | regulator-min-microvolt = <1800000>; | |
487 | regulator-max-microvolt = <1800000>; | |
488 | }; | |
489 | ||
b9c665d7 | 490 | ldo9 { |
6529e638 SW |
491 | regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
492 | regulator-min-microvolt = <2850000>; | |
493 | regulator-max-microvolt = <2850000>; | |
494 | regulator-always-on; | |
495 | }; | |
496 | ||
b9c665d7 | 497 | ldo_rtc { |
6529e638 SW |
498 | regulator-name = "vdd_rtc_out,vdd_cell"; |
499 | regulator-min-microvolt = <3300000>; | |
500 | regulator-max-microvolt = <3300000>; | |
501 | regulator-always-on; | |
502 | }; | |
503 | }; | |
504 | }; | |
505 | ||
45dbe9dd | 506 | temperature-sensor@4c { |
9846210b | 507 | compatible = "onnn,nct1008"; |
401c9a50 SW |
508 | reg = <0x4c>; |
509 | }; | |
45dbe9dd OJ |
510 | |
511 | magnetometer@c { | |
9846210b | 512 | compatible = "ak,ak8975"; |
45dbe9dd OJ |
513 | reg = <0xc>; |
514 | interrupt-parent = <&gpio>; | |
6cecf916 | 515 | interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>; |
45dbe9dd | 516 | }; |
88950f3b SW |
517 | }; |
518 | ||
6529e638 SW |
519 | pmc { |
520 | nvidia,invert-interrupt; | |
a44a019d JL |
521 | nvidia,suspend-mode = <2>; |
522 | nvidia,cpu-pwr-good-time = <5000>; | |
523 | nvidia,cpu-pwr-off-time = <5000>; | |
524 | nvidia,core-pwr-good-time = <3845 3845>; | |
525 | nvidia,core-pwr-off-time = <3875>; | |
526 | nvidia,sys-clock-req-active-high; | |
6529e638 SW |
527 | }; |
528 | ||
bbfc33bd | 529 | memory-controller@7000f400 { |
c04abb3a SW |
530 | emc-table@190000 { |
531 | reg = <190000>; | |
532 | compatible = "nvidia,tegra20-emc-table"; | |
533 | clock-frequency = <190000>; | |
534 | nvidia,emc-registers = <0x0000000c 0x00000026 | |
535 | 0x00000009 0x00000003 0x00000004 0x00000004 | |
536 | 0x00000002 0x0000000c 0x00000003 0x00000003 | |
537 | 0x00000002 0x00000001 0x00000004 0x00000005 | |
538 | 0x00000004 0x00000009 0x0000000d 0x0000059f | |
539 | 0x00000000 0x00000003 0x00000003 0x00000003 | |
540 | 0x00000003 0x00000001 0x0000000b 0x000000c8 | |
541 | 0x00000003 0x00000007 0x00000004 0x0000000f | |
542 | 0x00000002 0x00000000 0x00000000 0x00000002 | |
543 | 0x00000000 0x00000000 0x00000083 0xa06204ae | |
544 | 0x007dc010 0x00000000 0x00000000 0x00000000 | |
545 | 0x00000000 0x00000000 0x00000000 0x00000000>; | |
546 | }; | |
31c1ec92 | 547 | |
c04abb3a SW |
548 | emc-table@380000 { |
549 | reg = <380000>; | |
550 | compatible = "nvidia,tegra20-emc-table"; | |
551 | clock-frequency = <380000>; | |
552 | nvidia,emc-registers = <0x00000017 0x0000004b | |
553 | 0x00000012 0x00000006 0x00000004 0x00000005 | |
554 | 0x00000003 0x0000000c 0x00000006 0x00000006 | |
555 | 0x00000003 0x00000001 0x00000004 0x00000005 | |
556 | 0x00000004 0x00000009 0x0000000d 0x00000b5f | |
557 | 0x00000000 0x00000003 0x00000003 0x00000006 | |
558 | 0x00000006 0x00000001 0x00000011 0x000000c8 | |
559 | 0x00000003 0x0000000e 0x00000007 0x0000000f | |
560 | 0x00000002 0x00000000 0x00000000 0x00000002 | |
561 | 0x00000000 0x00000000 0x00000083 0xe044048b | |
562 | 0x007d8010 0x00000000 0x00000000 0x00000000 | |
563 | 0x00000000 0x00000000 0x00000000 0x00000000>; | |
564 | }; | |
31c1ec92 SW |
565 | }; |
566 | ||
c04abb3a | 567 | usb@c5000000 { |
2a5fdc9a | 568 | status = "okay"; |
3325f1bc | 569 | nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; |
c04abb3a | 570 | dr_mode = "otg"; |
8e267f3d GL |
571 | }; |
572 | ||
4c94c8b5 VB |
573 | usb-phy@c5000000 { |
574 | status = "okay"; | |
575 | vbus-supply = <&vbus_reg>; | |
576 | dr_mode = "otg"; | |
577 | }; | |
578 | ||
c04abb3a | 579 | usb@c5004000 { |
2a5fdc9a | 580 | status = "okay"; |
3325f1bc SW |
581 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
582 | GPIO_ACTIVE_LOW>; | |
31c1ec92 SW |
583 | }; |
584 | ||
9dffe3be | 585 | usb-phy@c5004000 { |
4c94c8b5 | 586 | status = "okay"; |
3325f1bc SW |
587 | nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
588 | GPIO_ACTIVE_LOW>; | |
1292c129 SW |
589 | }; |
590 | ||
9dffe3be VB |
591 | usb@c5008000 { |
592 | status = "okay"; | |
40e8b3a6 VB |
593 | }; |
594 | ||
4c94c8b5 VB |
595 | usb-phy@c5008000 { |
596 | status = "okay"; | |
597 | }; | |
598 | ||
da2fc651 WN |
599 | sdhci@c8000000 { |
600 | status = "okay"; | |
3325f1bc | 601 | power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; |
da2fc651 | 602 | bus-width = <4>; |
7a2617a6 | 603 | keep-power-in-suspend; |
da2fc651 WN |
604 | }; |
605 | ||
8e267f3d | 606 | sdhci@c8000400 { |
2a5fdc9a | 607 | status = "okay"; |
3325f1bc SW |
608 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
609 | wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; | |
610 | power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; | |
7f217794 | 611 | bus-width = <4>; |
8e267f3d | 612 | }; |
6111d50c SW |
613 | |
614 | sdhci@c8000600 { | |
2a5fdc9a | 615 | status = "okay"; |
7f217794 | 616 | bus-width = <8>; |
7a2617a6 | 617 | non-removable; |
6111d50c | 618 | }; |
c27317c0 | 619 | |
7021d122 JL |
620 | clocks { |
621 | compatible = "simple-bus"; | |
622 | #address-cells = <1>; | |
623 | #size-cells = <0>; | |
624 | ||
625 | clk32k_in: clock { | |
626 | compatible = "fixed-clock"; | |
627 | reg=<0>; | |
628 | #clock-cells = <0>; | |
629 | clock-frequency = <32768>; | |
630 | }; | |
631 | }; | |
632 | ||
f0d14306 SW |
633 | gpio-keys { |
634 | compatible = "gpio-keys"; | |
635 | ||
636 | power { | |
637 | label = "Power"; | |
3325f1bc | 638 | gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; |
f0d14306 SW |
639 | linux,code = <116>; /* KEY_POWER */ |
640 | gpio-key,wakeup; | |
641 | }; | |
642 | ||
643 | lid { | |
644 | label = "Lid"; | |
3325f1bc | 645 | gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; |
f0d14306 SW |
646 | linux,input-type = <5>; /* EV_SW */ |
647 | linux,code = <0>; /* SW_LID */ | |
648 | debounce-interval = <1>; | |
649 | gpio-key,wakeup; | |
650 | }; | |
651 | }; | |
d8017a97 | 652 | |
beb0e325 LD |
653 | kbc { |
654 | status = "okay"; | |
655 | nvidia,debounce-delay-ms = <32>; | |
656 | nvidia,repeat-delay-ms = <160>; | |
657 | nvidia,ghost-filter; | |
658 | nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; | |
659 | nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; | |
660 | linux,keymap = <0x00020011 /* KEY_W */ | |
661 | 0x0003001F /* KEY_S */ | |
662 | 0x0004001E /* KEY_A */ | |
663 | 0x0005002C /* KEY_Z */ | |
664 | 0x000701d0 /* KEY_FN */ | |
665 | ||
666 | 0x0107007D /* KEY_LEFTMETA */ | |
667 | 0x02060064 /* KEY_RIGHTALT */ | |
668 | 0x02070038 /* KEY_LEFTALT */ | |
669 | ||
670 | 0x03000006 /* KEY_5 */ | |
671 | 0x03010005 /* KEY_4 */ | |
672 | 0x03020013 /* KEY_R */ | |
673 | 0x03030012 /* KEY_E */ | |
674 | 0x03040021 /* KEY_F */ | |
675 | 0x03050020 /* KEY_D */ | |
676 | 0x0306002D /* KEY_X */ | |
677 | ||
678 | 0x04000008 /* KEY_7 */ | |
679 | 0x04010007 /* KEY_6 */ | |
680 | 0x04020014 /* KEY_T */ | |
681 | 0x04030023 /* KEY_H */ | |
682 | 0x04040022 /* KEY_G */ | |
683 | 0x0405002F /* KEY_V */ | |
684 | 0x0406002E /* KEY_C */ | |
685 | 0x04070039 /* KEY_SPACE */ | |
686 | ||
687 | 0x0500000A /* KEY_9 */ | |
688 | 0x05010009 /* KEY_8 */ | |
689 | 0x05020016 /* KEY_U */ | |
690 | 0x05030015 /* KEY_Y */ | |
691 | 0x05040024 /* KEY_J */ | |
692 | 0x05050031 /* KEY_N */ | |
693 | 0x05060030 /* KEY_B */ | |
694 | 0x0507002B /* KEY_BACKSLASH */ | |
695 | ||
696 | 0x0600000C /* KEY_MINUS */ | |
697 | 0x0601000B /* KEY_0 */ | |
698 | 0x06020018 /* KEY_O */ | |
699 | 0x06030017 /* KEY_I */ | |
700 | 0x06040026 /* KEY_L */ | |
701 | 0x06050025 /* KEY_K */ | |
702 | 0x06060033 /* KEY_COMMA */ | |
703 | 0x06070032 /* KEY_M */ | |
704 | ||
705 | 0x0701000D /* KEY_EQUAL */ | |
706 | 0x0702001B /* KEY_RIGHTBRACE */ | |
707 | 0x0703001C /* KEY_ENTER */ | |
708 | 0x0707008B /* KEY_MENU */ | |
709 | ||
710 | 0x08040036 /* KEY_RIGHTSHIFT */ | |
711 | 0x0805002A /* KEY_LEFTSHIFT */ | |
712 | ||
713 | 0x09050061 /* KEY_RIGHTCTRL */ | |
714 | 0x0907001D /* KEY_LEFTCTRL */ | |
715 | ||
716 | 0x0B00001A /* KEY_LEFTBRACE */ | |
717 | 0x0B010019 /* KEY_P */ | |
718 | 0x0B020028 /* KEY_APOSTROPHE */ | |
719 | 0x0B030027 /* KEY_SEMICOLON */ | |
720 | 0x0B040035 /* KEY_SLASH */ | |
721 | 0x0B050034 /* KEY_DOT */ | |
722 | ||
723 | 0x0C000044 /* KEY_F10 */ | |
724 | 0x0C010043 /* KEY_F9 */ | |
725 | 0x0C02000E /* KEY_BACKSPACE */ | |
726 | 0x0C030004 /* KEY_3 */ | |
727 | 0x0C040003 /* KEY_2 */ | |
728 | 0x0C050067 /* KEY_UP */ | |
729 | 0x0C0600D2 /* KEY_PRINT */ | |
730 | 0x0C070077 /* KEY_PAUSE */ | |
731 | ||
732 | 0x0D00006E /* KEY_INSERT */ | |
733 | 0x0D01006F /* KEY_DELETE */ | |
734 | 0x0D030068 /* KEY_PAGEUP */ | |
735 | 0x0D04006D /* KEY_PAGEDOWN */ | |
736 | 0x0D05006A /* KEY_RIGHT */ | |
737 | 0x0D06006C /* KEY_DOWN */ | |
738 | 0x0D070069 /* KEY_LEFT */ | |
739 | ||
740 | 0x0E000057 /* KEY_F11 */ | |
741 | 0x0E010058 /* KEY_F12 */ | |
742 | 0x0E020042 /* KEY_F8 */ | |
743 | 0x0E030010 /* KEY_Q */ | |
744 | 0x0E04003E /* KEY_F4 */ | |
745 | 0x0E05003D /* KEY_F3 */ | |
746 | 0x0E060002 /* KEY_1 */ | |
747 | 0x0E070041 /* KEY_F7 */ | |
748 | ||
749 | 0x0F000001 /* KEY_ESC */ | |
750 | 0x0F010029 /* KEY_GRAVE */ | |
751 | 0x0F02003F /* KEY_F5 */ | |
752 | 0x0F03000F /* KEY_TAB */ | |
753 | 0x0F04003B /* KEY_F1 */ | |
754 | 0x0F05003C /* KEY_F2 */ | |
755 | 0x0F06003A /* KEY_CAPSLOCK */ | |
756 | 0x0F070040 /* KEY_F6 */ | |
757 | ||
758 | /* Software Handled Function Keys */ | |
759 | 0x14000047 /* KEY_KP7 */ | |
760 | ||
761 | 0x15000049 /* KEY_KP9 */ | |
762 | 0x15010048 /* KEY_KP8 */ | |
763 | 0x1502004B /* KEY_KP4 */ | |
764 | 0x1504004F /* KEY_KP1 */ | |
765 | ||
766 | 0x1601004E /* KEY_KPSLASH */ | |
767 | 0x1602004D /* KEY_KP6 */ | |
768 | 0x1603004C /* KEY_KP5 */ | |
769 | 0x16040051 /* KEY_KP3 */ | |
770 | 0x16050050 /* KEY_KP2 */ | |
771 | 0x16070052 /* KEY_KP0 */ | |
772 | ||
773 | 0x1B010037 /* KEY_KPASTERISK */ | |
774 | 0x1B03004A /* KEY_KPMINUS */ | |
775 | 0x1B04004E /* KEY_KPPLUS */ | |
776 | 0x1B050053 /* KEY_KPDOT */ | |
777 | ||
778 | 0x1C050073 /* KEY_VOLUMEUP */ | |
779 | ||
780 | 0x1D030066 /* KEY_HOME */ | |
781 | 0x1D04006B /* KEY_END */ | |
782 | 0x1D0500E0 /* KEY_BRIGHTNESSDOWN */ | |
783 | 0x1D060072 /* KEY_VOLUMEDOWN */ | |
784 | 0x1D0700E1 /* KEY_BRIGHTNESSUP */ | |
785 | ||
786 | 0x1E000045 /* KEY_NUMLOCK */ | |
787 | 0x1E010046 /* KEY_SCROLLLOCK */ | |
788 | 0x1E020071 /* KEY_MUTE */ | |
789 | ||
790 | 0x1F04008A>; /* KEY_HELP */ | |
791 | }; | |
6529e638 SW |
792 | regulators { |
793 | compatible = "simple-bus"; | |
794 | #address-cells = <1>; | |
795 | #size-cells = <0>; | |
796 | ||
797 | vdd_5v0_reg: regulator@0 { | |
798 | compatible = "regulator-fixed"; | |
799 | reg = <0>; | |
800 | regulator-name = "vdd_5v0"; | |
801 | regulator-min-microvolt = <5000000>; | |
802 | regulator-max-microvolt = <5000000>; | |
803 | regulator-always-on; | |
804 | }; | |
805 | ||
806 | regulator@1 { | |
807 | compatible = "regulator-fixed"; | |
808 | reg = <1>; | |
809 | regulator-name = "vdd_1v5"; | |
810 | regulator-min-microvolt = <1500000>; | |
811 | regulator-max-microvolt = <1500000>; | |
3325f1bc | 812 | gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
6529e638 SW |
813 | }; |
814 | ||
815 | regulator@2 { | |
816 | compatible = "regulator-fixed"; | |
817 | reg = <2>; | |
818 | regulator-name = "vdd_1v2"; | |
819 | regulator-min-microvolt = <1200000>; | |
820 | regulator-max-microvolt = <1200000>; | |
3325f1bc | 821 | gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; |
6529e638 SW |
822 | enable-active-high; |
823 | }; | |
4c94c8b5 VB |
824 | |
825 | vbus_reg: regulator@3 { | |
826 | compatible = "regulator-fixed"; | |
827 | reg = <3>; | |
828 | regulator-name = "vdd_vbus_wup1"; | |
829 | regulator-min-microvolt = <5000000>; | |
830 | regulator-max-microvolt = <5000000>; | |
9f310ded | 831 | enable-active-high; |
4c94c8b5 VB |
832 | gpio = <&gpio 24 0>; /* PD0 */ |
833 | }; | |
6529e638 SW |
834 | }; |
835 | ||
c04abb3a SW |
836 | sound { |
837 | compatible = "nvidia,tegra-audio-wm8903-seaboard", | |
838 | "nvidia,tegra-audio-wm8903"; | |
839 | nvidia,model = "NVIDIA Tegra Seaboard"; | |
d8017a97 | 840 | |
c04abb3a SW |
841 | nvidia,audio-routing = |
842 | "Headphone Jack", "HPOUTR", | |
843 | "Headphone Jack", "HPOUTL", | |
844 | "Int Spk", "ROP", | |
845 | "Int Spk", "RON", | |
846 | "Int Spk", "LOP", | |
847 | "Int Spk", "LON", | |
848 | "Mic Jack", "MICBIAS", | |
849 | "IN1R", "Mic Jack"; | |
aa607ebf | 850 | |
c04abb3a SW |
851 | nvidia,i2s-controller = <&tegra_i2s1>; |
852 | nvidia,audio-codec = <&wm8903>; | |
853 | ||
3325f1bc SW |
854 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
855 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; | |
f9cd2b3b | 856 | |
885a8cfa HD |
857 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
858 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | |
859 | <&tegra_car TEGRA20_CLK_CDEV1>; | |
f9cd2b3b | 860 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
aa607ebf | 861 | }; |
8e267f3d | 862 | }; |