[deliverable/linux.git] / arch / arm / boot / dts / tegra20-ventana.dts

/dts-v1/;

#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"

/ {
	model = "NVIDIA Tegra20 Ventana evaluation board";
	compatible = "nvidia,ventana", "nvidia,tegra20";

	aliases {
		rtc0 = "/i2c@7000d000/tps6586x@34";
		rtc1 = "/rtc@7000e000";
		serial0 = &uartd;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		reg = <0x00000000 0x40000000>;
	};

	host1x@50000000 {
		dc@54200000 {
			rgb {
				status = "okay";

				nvidia,panel = <&panel>;
			};
		};

		hdmi@54280000 {
			status = "okay";

			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
		};
	};

	pinmux@70000014 {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata";
				nvidia,function = "ide";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			atc {
				nvidia,pins = "atc";
				nvidia,function = "nand";
			};
			atd {
				nvidia,pins = "atd", "ate", "gmb", "spia",
					"spib", "spic";
				nvidia,function = "gmi";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp", "lm1";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap2 {
				nvidia,pins = "dap2";
				nvidia,function = "dap2";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
				nvidia,function = "vi";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gmc {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
			};
			gmd {
				nvidia,pins = "gmd";
				nvidia,function = "sflash";
			};
			gpu {
				nvidia,pins = "gpu";
				nvidia,function = "pwm";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint";
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uartb";
			};
			kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "kbc";
			};
			lcsn {
				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
					"lsdi", "lvp0";
				nvidia,function = "rsvd4";
			};
			ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
					"lspi", "lvp1", "lvs";
				nvidia,function = "displaya";
			};
			owc {
				nvidia,pins = "owc", "spdi", "spdo", "uac";
				nvidia,function = "rsvd2";
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdb {
				nvidia,pins = "sdb", "sdc", "sdd", "slxc";
				nvidia,function = "sdio3";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxd {
				nvidia,pins = "slxd";
				nvidia,function = "spdif";
			};
			spid {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "irda";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd",
					"cdev1", "cdev2", "dap1", "dap2",
					"dap4", "ddc", "dtf", "gma", "gmc",
					"gme", "gpu", "gpu7", "i2cp", "irrx",
					"irtx", "pta", "rm", "sdc", "sdd",
					"slxc", "slxd", "slxk", "spdi", "spdo",
					"uac", "uad", "uca", "ucb", "uda";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ate {
				nvidia,pins = "ate", "csus", "dap3", "gmd",
					"gpv", "owc", "spia", "spib", "spic",
					"spid", "spie", "spig";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "gmb", "slxa", "spih";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_dte {
				nvidia,pins = "dte", "spif";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf", "sdio1", "uaa", "uab";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
			};
			conf_ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lm0", "lpp",
					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
					"lvp1", "lvs", "pmc", "sdb";
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
			};
			drive_sdio1 {
				nvidia,pins = "drive_sdio1";
				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
				nvidia,pull-down-strength = <31>;
				nvidia,pull-up-strength = <31>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
			};
		};

		state_i2cmux_ddc: pinmux_i2cmux_ddc {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};

		state_i2cmux_pta: pinmux_i2cmux_pta {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "i2c2";
			};
		};

		state_i2cmux_idle: pinmux_i2cmux_idle {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};
	};

	i2s@70002800 {
		status = "okay";
	};

	serial@70006300 {
		status = "okay";
	};

	pwm: pwm@7000a000 {
		status = "okay";
	};

	i2c@7000c000 {
		status = "okay";
		clock-frequency = <400000>;

		wm8903: wm8903@1a {
			compatible = "wlf,wm8903";
			reg = <0x1a>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;
			#gpio-cells = <2>;

			micdet-cfg = <0>;
			micdet-delay = <100>;
			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
		};

		/* ALS and proximity sensor */
		isl29018@44 {
			compatible = "isil,isl29018";
			reg = <0x44>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
		};
	};

	i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&{/i2c@7000c400}>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

		hdmi_ddc: i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		lvds_ddc: i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	i2c@7000c500 {
		status = "okay";
		clock-frequency = <400000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <400000>;

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			ti,system-power-controller;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_5v0_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
				sys_reg: sys {
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				sm0 {
					regulator-name = "vdd_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				sm1 {
					regulator-name = "vdd_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: sm2 {
					regulator-name = "vdd_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

				ldo1 {
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				ldo2 {
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo3 {
					regulator-name = "vdd_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo4 {
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5 {
					regulator-name = "vdd_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo6 {
					regulator-name = "vdd_ldo6,avdd_vdac";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				hdmi_vdd_reg: ldo7 {
					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: ldo8 {
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo9 {
					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo_rtc {
					regulator-name = "vdd_rtc_out,vdd_cell";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		temperature-sensor@4c {
			compatible = "onnn,nct1008";
			reg = <0x4c>;
		};
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <2000>;
		nvidia,cpu-pwr-off-time = <100>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <458>;
		nvidia,sys-clock-req-active-high;
	};

	usb@c5000000 {
		status = "okay";
	};

	usb-phy@c5000000 {
		status = "okay";
	};

	usb@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb-phy@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb@c5008000 {
		status = "okay";
	};

	usb-phy@c5008000 {
		status = "okay";
	};

	sdhci@c8000000 {
		status = "okay";
		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
		keep-power-in-suspend;
	};

	sdhci@c8000400 {
		status = "okay";
		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		bus-width = <8>;
		non-removable;
	};

	backlight: backlight {
		compatible = "pwm-backlight";

		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
		power-supply = <&vdd_bl_reg>;
		pwms = <&pwm 2 5000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg = <0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power";
			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
		};
	};

	panel: panel {
		compatible = "chunghwa,claa101wa01a", "simple-panel";

		power-supply = <&vdd_pnl_reg>;
		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;

		backlight = <&backlight>;
		ddc-i2c-bus = <&lvds_ddc>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_5v0_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_5v0";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "vdd_1v5";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "vdd_1v2";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		vdd_pnl_reg: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "vdd_pnl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		vdd_bl_reg: regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "vdd_bl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-wm8903-ventana",
			     "nvidia,tegra-audio-wm8903";
		nvidia,model = "NVIDIA Tegra Ventana";

		nvidia,audio-routing =
			"Headphone Jack", "HPOUTR",
			"Headphone Jack", "HPOUTL",
			"Int Spk", "ROP",
			"Int Spk", "RON",
			"Int Spk", "LOP",
			"Int Spk", "LON",
			"Mic Jack", "MICBIAS",
			"IN1L", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&wm8903>;

		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
		nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
			GPIO_ACTIVE_HIGH>;
		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
			GPIO_ACTIVE_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA20_CLK_CDEV1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};
Commit	Line	Data
add29e61 PDS	1	/dts-v1/;
add29e61 PDS	2
6bccbd5e	3	#include <dt-bindings/input/input.h>
1bd0bd49	4	#include "tegra20.dtsi"
add29e61 PDS	5
add29e61 PDS	6	/ {
8fef5dff	7	model = "NVIDIA Tegra20 Ventana evaluation board";
add29e61 PDS	8	compatible = "nvidia,ventana", "nvidia,tegra20";
add29e61 PDS	9
553c0a20 SW	10	aliases {
	11	rtc0 = "/i2c@7000d000/tps6586x@34";
	12	rtc1 = "/rtc@7000e000";
c4574aa0	13	serial0 = &uartd;
553c0a20 SW	14	};
553c0a20 SW	15
f5bbb327 JH	16	chosen {
	17	stdout-path = "serial0:115200n8";
	18	};
	19
add29e61	20	memory {
95decf84	21	reg = <0x00000000 0x40000000>;
add29e61 PDS	22	};
add29e61 PDS	23
58ecb23f	24	host1x@50000000 {
1771a254 SW	25	dc@54200000 {
	26	rgb {
	27	status = "okay";
	28
	29	nvidia,panel = <&panel>;
	30	};
	31	};
	32
58ecb23f	33	hdmi@54280000 {
97d5520f SW	34	status = "okay";
	35
	36	vdd-supply = <&hdmi_vdd_reg>;
	37	pll-supply = <&hdmi_pll_reg>;
	38
	39	nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc SW	40	nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
3325f1bc SW	41	GPIO_ACTIVE_HIGH>;
97d5520f SW	42	};
	43	};
	44
58ecb23f	45	pinmux@70000014 {
ecc295bb SW	46	pinctrl-names = "default";
	47	pinctrl-0 = <&state_default>;
	48
	49	state_default: pinmux {
	50	ata {
	51	nvidia,pins = "ata";
	52	nvidia,function = "ide";
	53	};
	54	atb {
	55	nvidia,pins = "atb", "gma", "gme";
	56	nvidia,function = "sdio4";
	57	};
	58	atc {
	59	nvidia,pins = "atc";
	60	nvidia,function = "nand";
	61	};
	62	atd {
	63	nvidia,pins = "atd", "ate", "gmb", "spia",
	64	"spib", "spic";
	65	nvidia,function = "gmi";
	66	};
	67	cdev1 {
	68	nvidia,pins = "cdev1";
	69	nvidia,function = "plla_out";
	70	};
	71	cdev2 {
	72	nvidia,pins = "cdev2";
	73	nvidia,function = "pllp_out4";
	74	};
	75	crtp {
	76	nvidia,pins = "crtp", "lm1";
	77	nvidia,function = "crt";
	78	};
	79	csus {
	80	nvidia,pins = "csus";
	81	nvidia,function = "vi_sensor_clk";
	82	};
	83	dap1 {
	84	nvidia,pins = "dap1";
	85	nvidia,function = "dap1";
	86	};
	87	dap2 {
	88	nvidia,pins = "dap2";
	89	nvidia,function = "dap2";
	90	};
	91	dap3 {
	92	nvidia,pins = "dap3";
	93	nvidia,function = "dap3";
	94	};
	95	dap4 {
	96	nvidia,pins = "dap4";
	97	nvidia,function = "dap4";
	98	};
ecc295bb SW	99	dta {
	100	nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
	101	nvidia,function = "vi";
	102	};
	103	dtf {
	104	nvidia,pins = "dtf";
	105	nvidia,function = "i2c3";
	106	};
	107	gmc {
	108	nvidia,pins = "gmc";
	109	nvidia,function = "uartd";
	110	};
	111	gmd {
	112	nvidia,pins = "gmd";
	113	nvidia,function = "sflash";
	114	};
	115	gpu {
	116	nvidia,pins = "gpu";
	117	nvidia,function = "pwm";
	118	};
	119	gpu7 {
	120	nvidia,pins = "gpu7";
	121	nvidia,function = "rtck";
	122	};
	123	gpv {
	124	nvidia,pins = "gpv", "slxa", "slxk";
	125	nvidia,function = "pcie";
	126	};
	127	hdint {
cf633464	128	nvidia,pins = "hdint";
ecc295bb SW	129	nvidia,function = "hdmi";
	130	};
	131	i2cp {
	132	nvidia,pins = "i2cp";
	133	nvidia,function = "i2cp";
	134	};
	135	irrx {
	136	nvidia,pins = "irrx", "irtx";
	137	nvidia,function = "uartb";
	138	};
	139	kbca {
	140	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	141	"kbce", "kbcf";
	142	nvidia,function = "kbc";
	143	};
	144	lcsn {
	145	nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
	146	"lsdi", "lvp0";
	147	nvidia,function = "rsvd4";
	148	};
	149	ld0 {
	150	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	151	"ld5", "ld6", "ld7", "ld8", "ld9",
	152	"ld10", "ld11", "ld12", "ld13", "ld14",
	153	"ld15", "ld16", "ld17", "ldi", "lhp0",
	154	"lhp1", "lhp2", "lhs", "lpp", "lpw0",
	155	"lpw2", "lsc0", "lsc1", "lsck", "lsda",
	156	"lspi", "lvp1", "lvs";
	157	nvidia,function = "displaya";
	158	};
cf633464 MZ	159	owc {
	160	nvidia,pins = "owc", "spdi", "spdo", "uac";
	161	nvidia,function = "rsvd2";
	162	};
ecc295bb SW	163	pmc {
	164	nvidia,pins = "pmc";
	165	nvidia,function = "pwr_on";
	166	};
	167	rm {
	168	nvidia,pins = "rm";
	169	nvidia,function = "i2c1";
	170	};
	171	sdb {
	172	nvidia,pins = "sdb", "sdc", "sdd", "slxc";
	173	nvidia,function = "sdio3";
	174	};
	175	sdio1 {
	176	nvidia,pins = "sdio1";
	177	nvidia,function = "sdio1";
	178	};
	179	slxd {
	180	nvidia,pins = "slxd";
	181	nvidia,function = "spdif";
	182	};
	183	spid {
	184	nvidia,pins = "spid", "spie", "spif";
	185	nvidia,function = "spi1";
	186	};
	187	spig {
	188	nvidia,pins = "spig", "spih";
	189	nvidia,function = "spi2_alt";
	190	};
	191	uaa {
	192	nvidia,pins = "uaa", "uab", "uda";
	193	nvidia,function = "ulpi";
	194	};
	195	uad {
	196	nvidia,pins = "uad";
	197	nvidia,function = "irda";
	198	};
	199	uca {
	200	nvidia,pins = "uca", "ucb";
	201	nvidia,function = "uartc";
	202	};
	203	conf_ata {
	204	nvidia,pins = "ata", "atb", "atc", "atd",
	205	"cdev1", "cdev2", "dap1", "dap2",
	206	"dap4", "ddc", "dtf", "gma", "gmc",
	207	"gme", "gpu", "gpu7", "i2cp", "irrx",
	208	"irtx", "pta", "rm", "sdc", "sdd",
	209	"slxc", "slxd", "slxk", "spdi", "spdo",
	210	"uac", "uad", "uca", "ucb", "uda";
ba4104e7 LD	211	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	212	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	213	};
	214	conf_ate {
	215	nvidia,pins = "ate", "csus", "dap3", "gmd",
	216	"gpv", "owc", "spia", "spib", "spic",
	217	"spid", "spie", "spig";
ba4104e7 LD	218	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	219	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	220	};
	221	conf_ck32 {
	222	nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
	223	"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
ba4104e7	224	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ecc295bb SW	225	};
	226	conf_crtp {
	227	nvidia,pins = "crtp", "gmb", "slxa", "spih";
ba4104e7 LD	228	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	229	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	230	};
	231	conf_dta {
	232	nvidia,pins = "dta", "dtb", "dtc", "dtd";
ba4104e7 LD	233	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	234	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	235	};
	236	conf_dte {
	237	nvidia,pins = "dte", "spif";
ba4104e7 LD	238	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	239	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	240	};
	241	conf_hdint {
	242	nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
	243	"lpw1", "lsck", "lsda", "lsdi", "lvp0";
ba4104e7	244	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	245	};
	246	conf_kbca {
	247	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	248	"kbce", "kbcf", "sdio1", "uaa", "uab";
ba4104e7 LD	249	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	250	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	251	};
	252	conf_lc {
	253	nvidia,pins = "lc", "ls";
ba4104e7	254	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ecc295bb SW	255	};
	256	conf_ld0 {
	257	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	258	"ld5", "ld6", "ld7", "ld8", "ld9",
	259	"ld10", "ld11", "ld12", "ld13", "ld14",
	260	"ld15", "ld16", "ld17", "ldi", "lhp0",
	261	"lhp1", "lhp2", "lhs", "lm0", "lpp",
	262	"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
	263	"lvp1", "lvs", "pmc", "sdb";
ba4104e7	264	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	265	};
	266	conf_ld17_0 {
	267	nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
	268	"ld23_22";
ba4104e7	269	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ecc295bb	270	};
c729429e WN	271	drive_sdio1 {
c729429e WN	272	nvidia,pins = "drive_sdio1";
ba4104e7 LD	273	nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
	274	nvidia,schmitt = <TEGRA_PIN_ENABLE>;
	275	nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
c729429e WN	276	nvidia,pull-down-strength = <31>;
c729429e WN	277	nvidia,pull-up-strength = <31>;
ba4104e7 LD	278	nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
ba4104e7 LD	279	nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
c729429e	280	};
ecc295bb	281	};
cf633464 MZ	282
	283	state_i2cmux_ddc: pinmux_i2cmux_ddc {
	284	ddc {
	285	nvidia,pins = "ddc";
	286	nvidia,function = "i2c2";
	287	};
	288	pta {
	289	nvidia,pins = "pta";
	290	nvidia,function = "rsvd4";
	291	};
	292	};
	293
	294	state_i2cmux_pta: pinmux_i2cmux_pta {
	295	ddc {
	296	nvidia,pins = "ddc";
	297	nvidia,function = "rsvd4";
	298	};
	299	pta {
	300	nvidia,pins = "pta";
	301	nvidia,function = "i2c2";
	302	};
	303	};
	304
	305	state_i2cmux_idle: pinmux_i2cmux_idle {
	306	ddc {
	307	nvidia,pins = "ddc";
	308	nvidia,function = "rsvd4";
	309	};
	310	pta {
	311	nvidia,pins = "pta";
	312	nvidia,function = "rsvd4";
	313	};
	314	};
ecc295bb SW	315	};
ecc295bb SW	316
2a5fdc9a SW	317	i2s@70002800 {
2a5fdc9a SW	318	status = "okay";
c04abb3a SW	319	};
	320
	321	serial@70006300 {
2a5fdc9a	322	status = "okay";
c04abb3a SW	323	};
c04abb3a SW	324
1771a254 SW	325	pwm: pwm@7000a000 {
	326	status = "okay";
	327	};
	328
88950f3b	329	i2c@7000c000 {
2a5fdc9a	330	status = "okay";
88950f3b	331	clock-frequency = <400000>;
797acf70 SW	332
	333	wm8903: wm8903@1a {
	334	compatible = "wlf,wm8903";
	335	reg = <0x1a>;
	336	interrupt-parent = <&gpio>;
6cecf916	337	interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
797acf70 SW	338
	339	gpio-controller;
	340	#gpio-cells = <2>;
	341
	342	micdet-cfg = <0>;
	343	micdet-delay = <100>;
95decf84	344	gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70	345	};
b46b0b54 LD	346
	347	/* ALS and proximity sensor */
	348	isl29018@44 {
	349	compatible = "isil,isl29018";
	350	reg = <0x44>;
	351	interrupt-parent = <&gpio>;
6cecf916	352	interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
b46b0b54	353	};
88950f3b SW	354	};
	355
	356	i2c@7000c400 {
2a5fdc9a	357	status = "okay";
97d5520f	358	clock-frequency = <100000>;
88950f3b SW	359	};
88950f3b SW	360
cf633464 MZ	361	i2cmux {
	362	compatible = "i2c-mux-pinctrl";
	363	#address-cells = <1>;
	364	#size-cells = <0>;
	365
	366	i2c-parent = <&{/i2c@7000c400}>;
	367
	368	pinctrl-names = "ddc", "pta", "idle";
	369	pinctrl-0 = <&state_i2cmux_ddc>;
	370	pinctrl-1 = <&state_i2cmux_pta>;
	371	pinctrl-2 = <&state_i2cmux_idle>;
	372
97d5520f	373	hdmi_ddc: i2c@0 {
cf633464 MZ	374	reg = <0>;
	375	#address-cells = <1>;
	376	#size-cells = <0>;
	377	};
	378
1771a254	379	lvds_ddc: i2c@1 {
cf633464 MZ	380	reg = <1>;
	381	#address-cells = <1>;
	382	#size-cells = <0>;
	383	};
	384	};
	385
88950f3b	386	i2c@7000c500 {
2a5fdc9a	387	status = "okay";
88950f3b SW	388	clock-frequency = <400000>;
	389	};
	390
	391	i2c@7000d000 {
2a5fdc9a	392	status = "okay";
88950f3b	393	clock-frequency = <400000>;
017a0104 SW	394
	395	pmic: tps6586x@34 {
	396	compatible = "ti,tps6586x";
	397	reg = <0x34>;
6cecf916	398	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
017a0104	399
44b12ef7 SW	400	ti,system-power-controller;
44b12ef7 SW	401
017a0104 SW	402	#gpio-cells = <2>;
	403	gpio-controller;
	404
	405	sys-supply = <&vdd_5v0_reg>;
	406	vin-sm0-supply = <&sys_reg>;
	407	vin-sm1-supply = <&sys_reg>;
	408	vin-sm2-supply = <&sys_reg>;
	409	vinldo01-supply = <&sm2_reg>;
	410	vinldo23-supply = <&sm2_reg>;
	411	vinldo4-supply = <&sm2_reg>;
	412	vinldo678-supply = <&sm2_reg>;
	413	vinldo9-supply = <&sm2_reg>;
	414
	415	regulators {
b9c665d7	416	sys_reg: sys {
017a0104 SW	417	regulator-name = "vdd_sys";
	418	regulator-always-on;
	419	};
	420
b9c665d7	421	sm0 {
017a0104 SW	422	regulator-name = "vdd_sm0,vdd_core";
	423	regulator-min-microvolt = <1200000>;
	424	regulator-max-microvolt = <1200000>;
	425	regulator-always-on;
	426	};
	427
b9c665d7	428	sm1 {
017a0104 SW	429	regulator-name = "vdd_sm1,vdd_cpu";
	430	regulator-min-microvolt = <1000000>;
	431	regulator-max-microvolt = <1000000>;
	432	regulator-always-on;
	433	};
	434
b9c665d7	435	sm2_reg: sm2 {
017a0104 SW	436	regulator-name = "vdd_sm2,vin_ldo*";
	437	regulator-min-microvolt = <3700000>;
	438	regulator-max-microvolt = <3700000>;
	439	regulator-always-on;
	440	};
	441
	442	/* LDO0 is not connected to anything */
	443
b9c665d7	444	ldo1 {
017a0104 SW	445	regulator-name = "vdd_ldo1,avdd_pll*";
	446	regulator-min-microvolt = <1100000>;
	447	regulator-max-microvolt = <1100000>;
	448	regulator-always-on;
	449	};
	450
b9c665d7	451	ldo2 {
017a0104 SW	452	regulator-name = "vdd_ldo2,vdd_rtc";
	453	regulator-min-microvolt = <1200000>;
	454	regulator-max-microvolt = <1200000>;
	455	};
	456
b9c665d7	457	ldo3 {
017a0104 SW	458	regulator-name = "vdd_ldo3,avdd_usb*";
	459	regulator-min-microvolt = <3300000>;
	460	regulator-max-microvolt = <3300000>;
	461	regulator-always-on;
	462	};
	463
b9c665d7	464	ldo4 {
017a0104 SW	465	regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
	466	regulator-min-microvolt = <1800000>;
	467	regulator-max-microvolt = <1800000>;
	468	regulator-always-on;
	469	};
	470
b9c665d7	471	ldo5 {
017a0104 SW	472	regulator-name = "vdd_ldo5,vcore_mmc";
	473	regulator-min-microvolt = <2850000>;
	474	regulator-max-microvolt = <2850000>;
	475	regulator-always-on;
	476	};
	477
b9c665d7	478	ldo6 {
017a0104 SW	479	regulator-name = "vdd_ldo6,avdd_vdac";
	480	regulator-min-microvolt = <1800000>;
	481	regulator-max-microvolt = <1800000>;
	482	};
	483
97d5520f	484	hdmi_vdd_reg: ldo7 {
017a0104 SW	485	regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
	486	regulator-min-microvolt = <3300000>;
	487	regulator-max-microvolt = <3300000>;
	488	};
	489
97d5520f	490	hdmi_pll_reg: ldo8 {
017a0104 SW	491	regulator-name = "vdd_ldo8,avdd_hdmi_pll";
	492	regulator-min-microvolt = <1800000>;
	493	regulator-max-microvolt = <1800000>;
	494	};
	495
b9c665d7	496	ldo9 {
017a0104 SW	497	regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
	498	regulator-min-microvolt = <2850000>;
	499	regulator-max-microvolt = <2850000>;
	500	regulator-always-on;
	501	};
	502
b9c665d7	503	ldo_rtc {
017a0104 SW	504	regulator-name = "vdd_rtc_out,vdd_cell";
	505	regulator-min-microvolt = <3300000>;
	506	regulator-max-microvolt = <3300000>;
	507	regulator-always-on;
	508	};
	509	};
	510	};
ee9f7260 TR	511
	512	temperature-sensor@4c {
	513	compatible = "onnn,nct1008";
	514	reg = <0x4c>;
	515	};
017a0104 SW	516	};
017a0104 SW	517
58ecb23f	518	pmc@7000e400 {
017a0104	519	nvidia,invert-interrupt;
47d2d63b	520	nvidia,suspend-mode = <1>;
a44a019d JL	521	nvidia,cpu-pwr-good-time = <2000>;
	522	nvidia,cpu-pwr-off-time = <100>;
	523	nvidia,core-pwr-good-time = <3845 3845>;
	524	nvidia,core-pwr-off-time = <458>;
	525	nvidia,sys-clock-req-active-high;
88950f3b SW	526	};
88950f3b SW	527
2a5fdc9a SW	528	usb@c5000000 {
2a5fdc9a SW	529	status = "okay";
c04abb3a SW	530	};
c04abb3a SW	531
4c94c8b5 VB	532	usb-phy@c5000000 {
	533	status = "okay";
	534	};
	535
2a5fdc9a SW	536	usb@c5004000 {
2a5fdc9a SW	537	status = "okay";
3325f1bc SW	538	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	539	GPIO_ACTIVE_LOW>;
797acf70 SW	540	};
797acf70 SW	541
9dffe3be	542	usb-phy@c5004000 {
4c94c8b5	543	status = "okay";
3325f1bc SW	544	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	545	GPIO_ACTIVE_LOW>;
c04abb3a SW	546	};
c04abb3a SW	547
9dffe3be VB	548	usb@c5008000 {
9dffe3be VB	549	status = "okay";
40e8b3a6 VB	550	};
40e8b3a6 VB	551
4c94c8b5 VB	552	usb-phy@c5008000 {
	553	status = "okay";
	554	};
	555
c729429e WN	556	sdhci@c8000000 {
c729429e WN	557	status = "okay";
3325f1bc	558	power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
c729429e	559	bus-width = <4>;
7a2617a6	560	keep-power-in-suspend;
c729429e WN	561	};
c729429e WN	562
c04abb3a	563	sdhci@c8000400 {
2a5fdc9a	564	status = "okay";
3325f1bc SW	565	cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
	566	wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
	567	power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
deb88cc3	568	bus-width = <4>;
c04abb3a SW	569	};
	570
	571	sdhci@c8000600 {
2a5fdc9a	572	status = "okay";
deb88cc3	573	bus-width = <8>;
7a2617a6	574	non-removable;
c04abb3a SW	575	};
c04abb3a SW	576
1771a254 SW	577	backlight: backlight {
	578	compatible = "pwm-backlight";
	579
	580	enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
	581	power-supply = <&vdd_bl_reg>;
	582	pwms = <&pwm 2 5000000>;
	583
	584	brightness-levels = <0 4 8 16 32 64 128 255>;
	585	default-brightness-level = <6>;
	586	};
	587
7021d122 JL	588	clocks {
	589	compatible = "simple-bus";
	590	#address-cells = <1>;
	591	#size-cells = <0>;
	592
58ecb23f	593	clk32k_in: clock@0 {
7021d122	594	compatible = "fixed-clock";
4ec2e601	595	reg = <0>;
7021d122 JL	596	#clock-cells = <0>;
	597	clock-frequency = <32768>;
	598	};
	599	};
	600
5741a256 JL	601	gpio-keys {
	602	compatible = "gpio-keys";
	603
	604	power {
	605	label = "Power";
3325f1bc	606	gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
6bccbd5e	607	linux,code = <KEY_POWER>;
d1c04d30	608	wakeup-source;
5741a256 JL	609	};
	610	};
	611
1771a254 SW	612	panel: panel {
	613	compatible = "chunghwa,claa101wa01a", "simple-panel";
	614
	615	power-supply = <&vdd_pnl_reg>;
	616	enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
	617
	618	backlight = <&backlight>;
	619	ddc-i2c-bus = <&lvds_ddc>;
	620	};
	621
017a0104 SW	622	regulators {
	623	compatible = "simple-bus";
	624	#address-cells = <1>;
	625	#size-cells = <0>;
	626
	627	vdd_5v0_reg: regulator@0 {
	628	compatible = "regulator-fixed";
	629	reg = <0>;
	630	regulator-name = "vdd_5v0";
	631	regulator-min-microvolt = <5000000>;
	632	regulator-max-microvolt = <5000000>;
	633	regulator-always-on;
	634	};
	635
	636	regulator@1 {
	637	compatible = "regulator-fixed";
	638	reg = <1>;
	639	regulator-name = "vdd_1v5";
	640	regulator-min-microvolt = <1500000>;
	641	regulator-max-microvolt = <1500000>;
3325f1bc	642	gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
017a0104 SW	643	};
	644
	645	regulator@2 {
	646	compatible = "regulator-fixed";
	647	reg = <2>;
	648	regulator-name = "vdd_1v2";
	649	regulator-min-microvolt = <1200000>;
	650	regulator-max-microvolt = <1200000>;
3325f1bc	651	gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
017a0104 SW	652	enable-active-high;
	653	};
	654
1771a254	655	vdd_pnl_reg: regulator@3 {
017a0104 SW	656	compatible = "regulator-fixed";
	657	reg = <3>;
	658	regulator-name = "vdd_pnl";
	659	regulator-min-microvolt = <2800000>;
	660	regulator-max-microvolt = <2800000>;
3325f1bc	661	gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
017a0104 SW	662	enable-active-high;
	663	};
	664
1771a254	665	vdd_bl_reg: regulator@4 {
017a0104 SW	666	compatible = "regulator-fixed";
	667	reg = <4>;
	668	regulator-name = "vdd_bl";
	669	regulator-min-microvolt = <2800000>;
	670	regulator-max-microvolt = <2800000>;
3325f1bc	671	gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
017a0104 SW	672	enable-active-high;
	673	};
	674	};
	675
797acf70 SW	676	sound {
	677	compatible = "nvidia,tegra-audio-wm8903-ventana",
	678	"nvidia,tegra-audio-wm8903";
	679	nvidia,model = "NVIDIA Tegra Ventana";
	680
	681	nvidia,audio-routing =
	682	"Headphone Jack", "HPOUTR",
	683	"Headphone Jack", "HPOUTL",
	684	"Int Spk", "ROP",
	685	"Int Spk", "RON",
	686	"Int Spk", "LOP",
	687	"Int Spk", "LON",
	688	"Mic Jack", "MICBIAS",
	689	"IN1L", "Mic Jack";
	690
	691	nvidia,i2s-controller = <&tegra_i2s1>;
	692	nvidia,audio-codec = <&wm8903>;
	693
3325f1bc SW	694	nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
	695	nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
	696	nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
	697	GPIO_ACTIVE_HIGH>;
	698	nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
	699	GPIO_ACTIVE_HIGH>;
f9cd2b3b	700
885a8cfa HD	701	clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
	702	<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
	703	<&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b	704	clock-names = "pll_a", "pll_a_out0", "mclk";
797acf70	705	};
add29e61	706	};