[deliverable/linux.git] / arch / arm / boot / dts / tegra20-ventana.dts

/dts-v1/;

#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"

/ {
	model = "NVIDIA Tegra20 Ventana evaluation board";
	compatible = "nvidia,ventana", "nvidia,tegra20";

	memory {
		reg = <0x00000000 0x40000000>;
	};

	host1x@50000000 {
		hdmi@54280000 {
			status = "okay";

			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
		};
	};

	pinmux@70000014 {
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata";
				nvidia,function = "ide";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			atc {
				nvidia,pins = "atc";
				nvidia,function = "nand";
			};
			atd {
				nvidia,pins = "atd", "ate", "gmb", "spia",
					"spib", "spic";
				nvidia,function = "gmi";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp", "lm1";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap2 {
				nvidia,pins = "dap2";
				nvidia,function = "dap2";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
				nvidia,function = "vi";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gmc {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
			};
			gmd {
				nvidia,pins = "gmd";
				nvidia,function = "sflash";
			};
			gpu {
				nvidia,pins = "gpu";
				nvidia,function = "pwm";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint";
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uartb";
			};
			kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "kbc";
			};
			lcsn {
				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
					"lsdi", "lvp0";
				nvidia,function = "rsvd4";
			};
			ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
					"lspi", "lvp1", "lvs";
				nvidia,function = "displaya";
			};
			owc {
				nvidia,pins = "owc", "spdi", "spdo", "uac";
				nvidia,function = "rsvd2";
			};
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdb {
				nvidia,pins = "sdb", "sdc", "sdd", "slxc";
				nvidia,function = "sdio3";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxd {
				nvidia,pins = "slxd";
				nvidia,function = "spdif";
			};
			spid {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "irda";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd",
					"cdev1", "cdev2", "dap1", "dap2",
					"dap4", "ddc", "dtf", "gma", "gmc",
					"gme", "gpu", "gpu7", "i2cp", "irrx",
					"irtx", "pta", "rm", "sdc", "sdd",
					"slxc", "slxd", "slxk", "spdi", "spdo",
					"uac", "uad", "uca", "ucb", "uda";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ate {
				nvidia,pins = "ate", "csus", "dap3", "gmd",
					"gpv", "owc", "spia", "spib", "spic",
					"spid", "spie", "spig";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "gmb", "slxa", "spih";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_dte {
				nvidia,pins = "dte", "spif";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			conf_kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf", "sdio1", "uaa", "uab";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
			};
			conf_ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lm0", "lpp",
					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
					"lvp1", "lvs", "pmc", "sdb";
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
			};
			drive_sdio1 {
				nvidia,pins = "drive_sdio1";
				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
				nvidia,pull-down-strength = <31>;
				nvidia,pull-up-strength = <31>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
			};
		};

		state_i2cmux_ddc: pinmux_i2cmux_ddc {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};

		state_i2cmux_pta: pinmux_i2cmux_pta {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "i2c2";
			};
		};

		state_i2cmux_idle: pinmux_i2cmux_idle {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};
	};

	i2s@70002800 {
		status = "okay";
	};

	serial@70006300 {
		status = "okay";
	};

	i2c@7000c000 {
		status = "okay";
		clock-frequency = <400000>;

		wm8903: wm8903@1a {
			compatible = "wlf,wm8903";
			reg = <0x1a>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;

			gpio-controller;
			#gpio-cells = <2>;

			micdet-cfg = <0>;
			micdet-delay = <100>;
			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
		};

		/* ALS and proximity sensor */
		isl29018@44 {
			compatible = "isil,isl29018";
			reg = <0x44>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
		};
	};

	i2c@7000c400 {
		status = "okay";
		clock-frequency = <100000>;
	};

	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&{/i2c@7000c400}>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

		hdmi_ddc: i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	i2c@7000c500 {
		status = "okay";
		clock-frequency = <400000>;
	};

	i2c@7000d000 {
		status = "okay";
		clock-frequency = <400000>;

		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			ti,system-power-controller;

			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_5v0_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
				sys_reg: sys {
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

				sm0 {
					regulator-name = "vdd_sm0,vdd_core";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-always-on;
				};

				sm1 {
					regulator-name = "vdd_sm1,vdd_cpu";
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-always-on;
				};

				sm2_reg: sm2 {
					regulator-name = "vdd_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

				ldo1 {
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

				ldo2 {
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

				ldo3 {
					regulator-name = "vdd_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

				ldo4 {
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

				ldo5 {
					regulator-name = "vdd_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo6 {
					regulator-name = "vdd_ldo6,avdd_vdac";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				hdmi_vdd_reg: ldo7 {
					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

				hdmi_pll_reg: ldo8 {
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo9 {
					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

				ldo_rtc {
					regulator-name = "vdd_rtc_out,vdd_cell";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

		temperature-sensor@4c {
			compatible = "onnn,nct1008";
			reg = <0x4c>;
		};
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <2000>;
		nvidia,cpu-pwr-off-time = <100>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <458>;
		nvidia,sys-clock-req-active-high;
	};

	usb@c5000000 {
		status = "okay";
	};

	usb-phy@c5000000 {
		status = "okay";
	};

	usb@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb-phy@c5004000 {
		status = "okay";
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
	};

	usb@c5008000 {
		status = "okay";
	};

	usb-phy@c5008000 {
		status = "okay";
	};

	sdhci@c8000000 {
		status = "okay";
		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
		keep-power-in-suspend;
	};

	sdhci@c8000400 {
		status = "okay";
		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
		bus-width = <4>;
	};

	sdhci@c8000600 {
		status = "okay";
		bus-width = <8>;
		non-removable;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power";
			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			gpio-key,wakeup;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_5v0_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_5v0";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "vdd_1v5";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "vdd_1v2";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "vdd_pnl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		regulator@4 {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "vdd_bl";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};
	};

	sound {
		compatible = "nvidia,tegra-audio-wm8903-ventana",
			     "nvidia,tegra-audio-wm8903";
		nvidia,model = "NVIDIA Tegra Ventana";

		nvidia,audio-routing =
			"Headphone Jack", "HPOUTR",
			"Headphone Jack", "HPOUTL",
			"Int Spk", "ROP",
			"Int Spk", "RON",
			"Int Spk", "LOP",
			"Int Spk", "LON",
			"Mic Jack", "MICBIAS",
			"IN1L", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&wm8903>;

		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
		nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
			GPIO_ACTIVE_HIGH>;
		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
			GPIO_ACTIVE_HIGH>;

		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA20_CLK_CDEV1>;
		clock-names = "pll_a", "pll_a_out0", "mclk";
	};
};
Commit	Line	Data
add29e61 PDS	1	/dts-v1/;
add29e61 PDS	2
6bccbd5e	3	#include <dt-bindings/input/input.h>
1bd0bd49	4	#include "tegra20.dtsi"
add29e61 PDS	5
add29e61 PDS	6	/ {
8fef5dff	7	model = "NVIDIA Tegra20 Ventana evaluation board";
add29e61 PDS	8	compatible = "nvidia,ventana", "nvidia,tegra20";
add29e61 PDS	9
add29e61	10	memory {
95decf84	11	reg = <0x00000000 0x40000000>;
add29e61 PDS	12	};
add29e61 PDS	13
58ecb23f SW	14	host1x@50000000 {
58ecb23f SW	15	hdmi@54280000 {
97d5520f SW	16	status = "okay";
	17
	18	vdd-supply = <&hdmi_vdd_reg>;
	19	pll-supply = <&hdmi_pll_reg>;
	20
	21	nvidia,ddc-i2c-bus = <&hdmi_ddc>;
3325f1bc SW	22	nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
3325f1bc SW	23	GPIO_ACTIVE_HIGH>;
97d5520f SW	24	};
	25	};
	26
58ecb23f	27	pinmux@70000014 {
ecc295bb SW	28	pinctrl-names = "default";
	29	pinctrl-0 = <&state_default>;
	30
	31	state_default: pinmux {
	32	ata {
	33	nvidia,pins = "ata";
	34	nvidia,function = "ide";
	35	};
	36	atb {
	37	nvidia,pins = "atb", "gma", "gme";
	38	nvidia,function = "sdio4";
	39	};
	40	atc {
	41	nvidia,pins = "atc";
	42	nvidia,function = "nand";
	43	};
	44	atd {
	45	nvidia,pins = "atd", "ate", "gmb", "spia",
	46	"spib", "spic";
	47	nvidia,function = "gmi";
	48	};
	49	cdev1 {
	50	nvidia,pins = "cdev1";
	51	nvidia,function = "plla_out";
	52	};
	53	cdev2 {
	54	nvidia,pins = "cdev2";
	55	nvidia,function = "pllp_out4";
	56	};
	57	crtp {
	58	nvidia,pins = "crtp", "lm1";
	59	nvidia,function = "crt";
	60	};
	61	csus {
	62	nvidia,pins = "csus";
	63	nvidia,function = "vi_sensor_clk";
	64	};
	65	dap1 {
	66	nvidia,pins = "dap1";
	67	nvidia,function = "dap1";
	68	};
	69	dap2 {
	70	nvidia,pins = "dap2";
	71	nvidia,function = "dap2";
	72	};
	73	dap3 {
	74	nvidia,pins = "dap3";
	75	nvidia,function = "dap3";
	76	};
	77	dap4 {
	78	nvidia,pins = "dap4";
	79	nvidia,function = "dap4";
	80	};
ecc295bb SW	81	dta {
	82	nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
	83	nvidia,function = "vi";
	84	};
	85	dtf {
	86	nvidia,pins = "dtf";
	87	nvidia,function = "i2c3";
	88	};
	89	gmc {
	90	nvidia,pins = "gmc";
	91	nvidia,function = "uartd";
	92	};
	93	gmd {
	94	nvidia,pins = "gmd";
	95	nvidia,function = "sflash";
	96	};
	97	gpu {
	98	nvidia,pins = "gpu";
	99	nvidia,function = "pwm";
	100	};
	101	gpu7 {
	102	nvidia,pins = "gpu7";
	103	nvidia,function = "rtck";
	104	};
	105	gpv {
	106	nvidia,pins = "gpv", "slxa", "slxk";
	107	nvidia,function = "pcie";
	108	};
	109	hdint {
cf633464	110	nvidia,pins = "hdint";
ecc295bb SW	111	nvidia,function = "hdmi";
	112	};
	113	i2cp {
	114	nvidia,pins = "i2cp";
	115	nvidia,function = "i2cp";
	116	};
	117	irrx {
	118	nvidia,pins = "irrx", "irtx";
	119	nvidia,function = "uartb";
	120	};
	121	kbca {
	122	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	123	"kbce", "kbcf";
	124	nvidia,function = "kbc";
	125	};
	126	lcsn {
	127	nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
	128	"lsdi", "lvp0";
	129	nvidia,function = "rsvd4";
	130	};
	131	ld0 {
	132	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	133	"ld5", "ld6", "ld7", "ld8", "ld9",
	134	"ld10", "ld11", "ld12", "ld13", "ld14",
	135	"ld15", "ld16", "ld17", "ldi", "lhp0",
	136	"lhp1", "lhp2", "lhs", "lpp", "lpw0",
	137	"lpw2", "lsc0", "lsc1", "lsck", "lsda",
	138	"lspi", "lvp1", "lvs";
	139	nvidia,function = "displaya";
	140	};
cf633464 MZ	141	owc {
	142	nvidia,pins = "owc", "spdi", "spdo", "uac";
	143	nvidia,function = "rsvd2";
	144	};
ecc295bb SW	145	pmc {
	146	nvidia,pins = "pmc";
	147	nvidia,function = "pwr_on";
	148	};
	149	rm {
	150	nvidia,pins = "rm";
	151	nvidia,function = "i2c1";
	152	};
	153	sdb {
	154	nvidia,pins = "sdb", "sdc", "sdd", "slxc";
	155	nvidia,function = "sdio3";
	156	};
	157	sdio1 {
	158	nvidia,pins = "sdio1";
	159	nvidia,function = "sdio1";
	160	};
	161	slxd {
	162	nvidia,pins = "slxd";
	163	nvidia,function = "spdif";
	164	};
	165	spid {
	166	nvidia,pins = "spid", "spie", "spif";
	167	nvidia,function = "spi1";
	168	};
	169	spig {
	170	nvidia,pins = "spig", "spih";
	171	nvidia,function = "spi2_alt";
	172	};
	173	uaa {
	174	nvidia,pins = "uaa", "uab", "uda";
	175	nvidia,function = "ulpi";
	176	};
	177	uad {
	178	nvidia,pins = "uad";
	179	nvidia,function = "irda";
	180	};
	181	uca {
	182	nvidia,pins = "uca", "ucb";
	183	nvidia,function = "uartc";
	184	};
	185	conf_ata {
	186	nvidia,pins = "ata", "atb", "atc", "atd",
	187	"cdev1", "cdev2", "dap1", "dap2",
	188	"dap4", "ddc", "dtf", "gma", "gmc",
	189	"gme", "gpu", "gpu7", "i2cp", "irrx",
	190	"irtx", "pta", "rm", "sdc", "sdd",
	191	"slxc", "slxd", "slxk", "spdi", "spdo",
	192	"uac", "uad", "uca", "ucb", "uda";
ba4104e7 LD	193	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	194	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	195	};
	196	conf_ate {
	197	nvidia,pins = "ate", "csus", "dap3", "gmd",
	198	"gpv", "owc", "spia", "spib", "spic",
	199	"spid", "spie", "spig";
ba4104e7 LD	200	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ba4104e7 LD	201	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	202	};
	203	conf_ck32 {
	204	nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
	205	"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
ba4104e7	206	nvidia,pull = <TEGRA_PIN_PULL_NONE>;
ecc295bb SW	207	};
	208	conf_crtp {
	209	nvidia,pins = "crtp", "gmb", "slxa", "spih";
ba4104e7 LD	210	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	211	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	212	};
	213	conf_dta {
	214	nvidia,pins = "dta", "dtb", "dtc", "dtd";
ba4104e7 LD	215	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	216	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	217	};
	218	conf_dte {
	219	nvidia,pins = "dte", "spif";
ba4104e7 LD	220	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ba4104e7 LD	221	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	222	};
	223	conf_hdint {
	224	nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
	225	"lpw1", "lsck", "lsda", "lsdi", "lvp0";
ba4104e7	226	nvidia,tristate = <TEGRA_PIN_ENABLE>;
ecc295bb SW	227	};
	228	conf_kbca {
	229	nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
	230	"kbce", "kbcf", "sdio1", "uaa", "uab";
ba4104e7 LD	231	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ba4104e7 LD	232	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	233	};
	234	conf_lc {
	235	nvidia,pins = "lc", "ls";
ba4104e7	236	nvidia,pull = <TEGRA_PIN_PULL_UP>;
ecc295bb SW	237	};
	238	conf_ld0 {
	239	nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
	240	"ld5", "ld6", "ld7", "ld8", "ld9",
	241	"ld10", "ld11", "ld12", "ld13", "ld14",
	242	"ld15", "ld16", "ld17", "ldi", "lhp0",
	243	"lhp1", "lhp2", "lhs", "lm0", "lpp",
	244	"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
	245	"lvp1", "lvs", "pmc", "sdb";
ba4104e7	246	nvidia,tristate = <TEGRA_PIN_DISABLE>;
ecc295bb SW	247	};
	248	conf_ld17_0 {
	249	nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
	250	"ld23_22";
ba4104e7	251	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
ecc295bb	252	};
c729429e WN	253	drive_sdio1 {
c729429e WN	254	nvidia,pins = "drive_sdio1";
ba4104e7 LD	255	nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
	256	nvidia,schmitt = <TEGRA_PIN_ENABLE>;
	257	nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
c729429e WN	258	nvidia,pull-down-strength = <31>;
c729429e WN	259	nvidia,pull-up-strength = <31>;
ba4104e7 LD	260	nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
ba4104e7 LD	261	nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
c729429e	262	};
ecc295bb	263	};
cf633464 MZ	264
	265	state_i2cmux_ddc: pinmux_i2cmux_ddc {
	266	ddc {
	267	nvidia,pins = "ddc";
	268	nvidia,function = "i2c2";
	269	};
	270	pta {
	271	nvidia,pins = "pta";
	272	nvidia,function = "rsvd4";
	273	};
	274	};
	275
	276	state_i2cmux_pta: pinmux_i2cmux_pta {
	277	ddc {
	278	nvidia,pins = "ddc";
	279	nvidia,function = "rsvd4";
	280	};
	281	pta {
	282	nvidia,pins = "pta";
	283	nvidia,function = "i2c2";
	284	};
	285	};
	286
	287	state_i2cmux_idle: pinmux_i2cmux_idle {
	288	ddc {
	289	nvidia,pins = "ddc";
	290	nvidia,function = "rsvd4";
	291	};
	292	pta {
	293	nvidia,pins = "pta";
	294	nvidia,function = "rsvd4";
	295	};
	296	};
ecc295bb SW	297	};
ecc295bb SW	298
2a5fdc9a SW	299	i2s@70002800 {
2a5fdc9a SW	300	status = "okay";
c04abb3a SW	301	};
	302
	303	serial@70006300 {
2a5fdc9a	304	status = "okay";
c04abb3a SW	305	};
c04abb3a SW	306
88950f3b	307	i2c@7000c000 {
2a5fdc9a	308	status = "okay";
88950f3b	309	clock-frequency = <400000>;
797acf70 SW	310
	311	wm8903: wm8903@1a {
	312	compatible = "wlf,wm8903";
	313	reg = <0x1a>;
	314	interrupt-parent = <&gpio>;
6cecf916	315	interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
797acf70 SW	316
	317	gpio-controller;
	318	#gpio-cells = <2>;
	319
	320	micdet-cfg = <0>;
	321	micdet-delay = <100>;
95decf84	322	gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
797acf70	323	};
b46b0b54 LD	324
	325	/* ALS and proximity sensor */
	326	isl29018@44 {
	327	compatible = "isil,isl29018";
	328	reg = <0x44>;
	329	interrupt-parent = <&gpio>;
6cecf916	330	interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
b46b0b54	331	};
88950f3b SW	332	};
	333
	334	i2c@7000c400 {
2a5fdc9a	335	status = "okay";
97d5520f	336	clock-frequency = <100000>;
88950f3b SW	337	};
88950f3b SW	338
cf633464 MZ	339	i2cmux {
	340	compatible = "i2c-mux-pinctrl";
	341	#address-cells = <1>;
	342	#size-cells = <0>;
	343
	344	i2c-parent = <&{/i2c@7000c400}>;
	345
	346	pinctrl-names = "ddc", "pta", "idle";
	347	pinctrl-0 = <&state_i2cmux_ddc>;
	348	pinctrl-1 = <&state_i2cmux_pta>;
	349	pinctrl-2 = <&state_i2cmux_idle>;
	350
97d5520f	351	hdmi_ddc: i2c@0 {
cf633464 MZ	352	reg = <0>;
	353	#address-cells = <1>;
	354	#size-cells = <0>;
	355	};
	356
	357	i2c@1 {
	358	reg = <1>;
	359	#address-cells = <1>;
	360	#size-cells = <0>;
	361	};
	362	};
	363
88950f3b	364	i2c@7000c500 {
2a5fdc9a	365	status = "okay";
88950f3b SW	366	clock-frequency = <400000>;
	367	};
	368
	369	i2c@7000d000 {
2a5fdc9a	370	status = "okay";
88950f3b	371	clock-frequency = <400000>;
017a0104 SW	372
	373	pmic: tps6586x@34 {
	374	compatible = "ti,tps6586x";
	375	reg = <0x34>;
6cecf916	376	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
017a0104	377
44b12ef7 SW	378	ti,system-power-controller;
44b12ef7 SW	379
017a0104 SW	380	#gpio-cells = <2>;
	381	gpio-controller;
	382
	383	sys-supply = <&vdd_5v0_reg>;
	384	vin-sm0-supply = <&sys_reg>;
	385	vin-sm1-supply = <&sys_reg>;
	386	vin-sm2-supply = <&sys_reg>;
	387	vinldo01-supply = <&sm2_reg>;
	388	vinldo23-supply = <&sm2_reg>;
	389	vinldo4-supply = <&sm2_reg>;
	390	vinldo678-supply = <&sm2_reg>;
	391	vinldo9-supply = <&sm2_reg>;
	392
	393	regulators {
b9c665d7	394	sys_reg: sys {
017a0104 SW	395	regulator-name = "vdd_sys";
	396	regulator-always-on;
	397	};
	398
b9c665d7	399	sm0 {
017a0104 SW	400	regulator-name = "vdd_sm0,vdd_core";
	401	regulator-min-microvolt = <1200000>;
	402	regulator-max-microvolt = <1200000>;
	403	regulator-always-on;
	404	};
	405
b9c665d7	406	sm1 {
017a0104 SW	407	regulator-name = "vdd_sm1,vdd_cpu";
	408	regulator-min-microvolt = <1000000>;
	409	regulator-max-microvolt = <1000000>;
	410	regulator-always-on;
	411	};
	412
b9c665d7	413	sm2_reg: sm2 {
017a0104 SW	414	regulator-name = "vdd_sm2,vin_ldo*";
	415	regulator-min-microvolt = <3700000>;
	416	regulator-max-microvolt = <3700000>;
	417	regulator-always-on;
	418	};
	419
	420	/* LDO0 is not connected to anything */
	421
b9c665d7	422	ldo1 {
017a0104 SW	423	regulator-name = "vdd_ldo1,avdd_pll*";
	424	regulator-min-microvolt = <1100000>;
	425	regulator-max-microvolt = <1100000>;
	426	regulator-always-on;
	427	};
	428
b9c665d7	429	ldo2 {
017a0104 SW	430	regulator-name = "vdd_ldo2,vdd_rtc";
	431	regulator-min-microvolt = <1200000>;
	432	regulator-max-microvolt = <1200000>;
	433	};
	434
b9c665d7	435	ldo3 {
017a0104 SW	436	regulator-name = "vdd_ldo3,avdd_usb*";
	437	regulator-min-microvolt = <3300000>;
	438	regulator-max-microvolt = <3300000>;
	439	regulator-always-on;
	440	};
	441
b9c665d7	442	ldo4 {
017a0104 SW	443	regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
	444	regulator-min-microvolt = <1800000>;
	445	regulator-max-microvolt = <1800000>;
	446	regulator-always-on;
	447	};
	448
b9c665d7	449	ldo5 {
017a0104 SW	450	regulator-name = "vdd_ldo5,vcore_mmc";
	451	regulator-min-microvolt = <2850000>;
	452	regulator-max-microvolt = <2850000>;
	453	regulator-always-on;
	454	};
	455
b9c665d7	456	ldo6 {
017a0104 SW	457	regulator-name = "vdd_ldo6,avdd_vdac";
	458	regulator-min-microvolt = <1800000>;
	459	regulator-max-microvolt = <1800000>;
	460	};
	461
97d5520f	462	hdmi_vdd_reg: ldo7 {
017a0104 SW	463	regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
	464	regulator-min-microvolt = <3300000>;
	465	regulator-max-microvolt = <3300000>;
	466	};
	467
97d5520f	468	hdmi_pll_reg: ldo8 {
017a0104 SW	469	regulator-name = "vdd_ldo8,avdd_hdmi_pll";
	470	regulator-min-microvolt = <1800000>;
	471	regulator-max-microvolt = <1800000>;
	472	};
	473
b9c665d7	474	ldo9 {
017a0104 SW	475	regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
	476	regulator-min-microvolt = <2850000>;
	477	regulator-max-microvolt = <2850000>;
	478	regulator-always-on;
	479	};
	480
b9c665d7	481	ldo_rtc {
017a0104 SW	482	regulator-name = "vdd_rtc_out,vdd_cell";
	483	regulator-min-microvolt = <3300000>;
	484	regulator-max-microvolt = <3300000>;
	485	regulator-always-on;
	486	};
	487	};
	488	};
ee9f7260 TR	489
	490	temperature-sensor@4c {
	491	compatible = "onnn,nct1008";
	492	reg = <0x4c>;
	493	};
017a0104 SW	494	};
017a0104 SW	495
58ecb23f	496	pmc@7000e400 {
017a0104	497	nvidia,invert-interrupt;
47d2d63b	498	nvidia,suspend-mode = <1>;
a44a019d JL	499	nvidia,cpu-pwr-good-time = <2000>;
	500	nvidia,cpu-pwr-off-time = <100>;
	501	nvidia,core-pwr-good-time = <3845 3845>;
	502	nvidia,core-pwr-off-time = <458>;
	503	nvidia,sys-clock-req-active-high;
88950f3b SW	504	};
88950f3b SW	505
2a5fdc9a SW	506	usb@c5000000 {
2a5fdc9a SW	507	status = "okay";
c04abb3a SW	508	};
c04abb3a SW	509
4c94c8b5 VB	510	usb-phy@c5000000 {
	511	status = "okay";
	512	};
	513
2a5fdc9a SW	514	usb@c5004000 {
2a5fdc9a SW	515	status = "okay";
3325f1bc SW	516	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	517	GPIO_ACTIVE_LOW>;
797acf70 SW	518	};
797acf70 SW	519
9dffe3be	520	usb-phy@c5004000 {
4c94c8b5	521	status = "okay";
3325f1bc SW	522	nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
3325f1bc SW	523	GPIO_ACTIVE_LOW>;
c04abb3a SW	524	};
c04abb3a SW	525
9dffe3be VB	526	usb@c5008000 {
9dffe3be VB	527	status = "okay";
40e8b3a6 VB	528	};
40e8b3a6 VB	529
4c94c8b5 VB	530	usb-phy@c5008000 {
	531	status = "okay";
	532	};
	533
c729429e WN	534	sdhci@c8000000 {
c729429e WN	535	status = "okay";
3325f1bc	536	power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
c729429e	537	bus-width = <4>;
7a2617a6	538	keep-power-in-suspend;
c729429e WN	539	};
c729429e WN	540
c04abb3a	541	sdhci@c8000400 {
2a5fdc9a	542	status = "okay";
3325f1bc SW	543	cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
	544	wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
	545	power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
deb88cc3	546	bus-width = <4>;
c04abb3a SW	547	};
	548
	549	sdhci@c8000600 {
2a5fdc9a	550	status = "okay";
deb88cc3	551	bus-width = <8>;
7a2617a6	552	non-removable;
c04abb3a SW	553	};
c04abb3a SW	554
7021d122 JL	555	clocks {
	556	compatible = "simple-bus";
	557	#address-cells = <1>;
	558	#size-cells = <0>;
	559
58ecb23f	560	clk32k_in: clock@0 {
7021d122 JL	561	compatible = "fixed-clock";
	562	reg=<0>;
	563	#clock-cells = <0>;
	564	clock-frequency = <32768>;
	565	};
	566	};
	567
5741a256 JL	568	gpio-keys {
	569	compatible = "gpio-keys";
	570
	571	power {
	572	label = "Power";
3325f1bc	573	gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
6bccbd5e	574	linux,code = <KEY_POWER>;
5741a256 JL	575	gpio-key,wakeup;
	576	};
	577	};
	578
017a0104 SW	579	regulators {
	580	compatible = "simple-bus";
	581	#address-cells = <1>;
	582	#size-cells = <0>;
	583
	584	vdd_5v0_reg: regulator@0 {
	585	compatible = "regulator-fixed";
	586	reg = <0>;
	587	regulator-name = "vdd_5v0";
	588	regulator-min-microvolt = <5000000>;
	589	regulator-max-microvolt = <5000000>;
	590	regulator-always-on;
	591	};
	592
	593	regulator@1 {
	594	compatible = "regulator-fixed";
	595	reg = <1>;
	596	regulator-name = "vdd_1v5";
	597	regulator-min-microvolt = <1500000>;
	598	regulator-max-microvolt = <1500000>;
3325f1bc	599	gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
017a0104 SW	600	};
	601
	602	regulator@2 {
	603	compatible = "regulator-fixed";
	604	reg = <2>;
	605	regulator-name = "vdd_1v2";
	606	regulator-min-microvolt = <1200000>;
	607	regulator-max-microvolt = <1200000>;
3325f1bc	608	gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
017a0104 SW	609	enable-active-high;
	610	};
	611
	612	regulator@3 {
	613	compatible = "regulator-fixed";
	614	reg = <3>;
	615	regulator-name = "vdd_pnl";
	616	regulator-min-microvolt = <2800000>;
	617	regulator-max-microvolt = <2800000>;
3325f1bc	618	gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
017a0104 SW	619	enable-active-high;
	620	};
	621
	622	regulator@4 {
	623	compatible = "regulator-fixed";
	624	reg = <4>;
	625	regulator-name = "vdd_bl";
	626	regulator-min-microvolt = <2800000>;
	627	regulator-max-microvolt = <2800000>;
3325f1bc	628	gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
017a0104 SW	629	enable-active-high;
	630	};
	631	};
	632
797acf70 SW	633	sound {
	634	compatible = "nvidia,tegra-audio-wm8903-ventana",
	635	"nvidia,tegra-audio-wm8903";
	636	nvidia,model = "NVIDIA Tegra Ventana";
	637
	638	nvidia,audio-routing =
	639	"Headphone Jack", "HPOUTR",
	640	"Headphone Jack", "HPOUTL",
	641	"Int Spk", "ROP",
	642	"Int Spk", "RON",
	643	"Int Spk", "LOP",
	644	"Int Spk", "LON",
	645	"Mic Jack", "MICBIAS",
	646	"IN1L", "Mic Jack";
	647
	648	nvidia,i2s-controller = <&tegra_i2s1>;
	649	nvidia,audio-codec = <&wm8903>;
	650
3325f1bc SW	651	nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
	652	nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
	653	nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
	654	GPIO_ACTIVE_HIGH>;
	655	nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
	656	GPIO_ACTIVE_HIGH>;
f9cd2b3b	657
885a8cfa HD	658	clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
	659	<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
	660	<&tegra_car TEGRA20_CLK_CDEV1>;
f9cd2b3b	661	clock-names = "pll_a", "pll_a_out0", "mclk";
797acf70	662	};
add29e61	663	};