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8e678e06 MY |
1 | /* |
2 | * Device Tree Source for UniPhier PH1-sLD3 SoC | |
3 | * | |
4 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> | |
5 | * | |
6 | * This file is dual-licensed: you can use it either under the terms | |
7 | * of the GPL or the X11 license, at your option. Note that this dual | |
8 | * licensing only applies to this file, and not this project as a | |
9 | * whole. | |
10 | * | |
11 | * a) This file is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of the | |
14 | * License, or (at your option) any later version. | |
15 | * | |
16 | * This file is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * Or, alternatively, | |
22 | * | |
23 | * b) Permission is hereby granted, free of charge, to any person | |
24 | * obtaining a copy of this software and associated documentation | |
25 | * files (the "Software"), to deal in the Software without | |
26 | * restriction, including without limitation the rights to use, | |
27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
28 | * sell copies of the Software, and to permit persons to whom the | |
29 | * Software is furnished to do so, subject to the following | |
30 | * conditions: | |
31 | * | |
32 | * The above copyright notice and this permission notice shall be | |
33 | * included in all copies or substantial portions of the Software. | |
34 | * | |
35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
42 | * OTHER DEALINGS IN THE SOFTWARE. | |
43 | */ | |
44 | ||
45 | /include/ "skeleton.dtsi" | |
46 | ||
47 | / { | |
48 | compatible = "socionext,ph1-sld3"; | |
49 | ||
50 | cpus { | |
51 | #address-cells = <1>; | |
52 | #size-cells = <0>; | |
53 | enable-method = "socionext,uniphier-smp"; | |
54 | ||
55 | cpu@0 { | |
56 | device_type = "cpu"; | |
57 | compatible = "arm,cortex-a9"; | |
58 | reg = <0>; | |
59 | }; | |
60 | ||
61 | cpu@1 { | |
62 | device_type = "cpu"; | |
63 | compatible = "arm,cortex-a9"; | |
64 | reg = <1>; | |
65 | }; | |
66 | }; | |
67 | ||
68 | clocks { | |
69 | arm_timer_clk: arm_timer_clk { | |
70 | #clock-cells = <0>; | |
71 | compatible = "fixed-clock"; | |
72 | clock-frequency = <50000000>; | |
73 | }; | |
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74 | |
75 | uart_clk: uart_clk { | |
76 | #clock-cells = <0>; | |
77 | compatible = "fixed-clock"; | |
78 | clock-frequency = <36864000>; | |
79 | }; | |
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80 | |
81 | iobus_clk: iobus_clk { | |
82 | #clock-cells = <0>; | |
83 | compatible = "fixed-clock"; | |
84 | clock-frequency = <100000000>; | |
85 | }; | |
8e678e06 MY |
86 | }; |
87 | ||
88 | soc { | |
89 | compatible = "simple-bus"; | |
90 | #address-cells = <1>; | |
91 | #size-cells = <1>; | |
92 | ranges; | |
93 | interrupt-parent = <&intc>; | |
94 | ||
95 | extbus: extbus { | |
96 | compatible = "simple-bus"; | |
97 | #address-cells = <2>; | |
98 | #size-cells = <1>; | |
99 | }; | |
100 | ||
101 | timer@20000200 { | |
102 | compatible = "arm,cortex-a9-global-timer"; | |
103 | reg = <0x20000200 0x20>; | |
104 | interrupts = <1 11 0x304>; | |
105 | clocks = <&arm_timer_clk>; | |
106 | }; | |
107 | ||
108 | timer@20000600 { | |
109 | compatible = "arm,cortex-a9-twd-timer"; | |
110 | reg = <0x20000600 0x20>; | |
111 | interrupts = <1 13 0x304>; | |
112 | clocks = <&arm_timer_clk>; | |
113 | }; | |
114 | ||
115 | intc: interrupt-controller@20001000 { | |
116 | compatible = "arm,cortex-a9-gic"; | |
117 | #interrupt-cells = <3>; | |
118 | interrupt-controller; | |
119 | reg = <0x20001000 0x1000>, | |
120 | <0x20000100 0x100>; | |
121 | }; | |
122 | ||
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123 | serial0: serial@54006800 { |
124 | compatible = "socionext,uniphier-uart"; | |
125 | status = "disabled"; | |
126 | reg = <0x54006800 0x40>; | |
127 | interrupts = <0 33 4>; | |
128 | clocks = <&uart_clk>; | |
129 | fifo-size = <64>; | |
130 | }; | |
131 | ||
132 | serial1: serial@54006900 { | |
133 | compatible = "socionext,uniphier-uart"; | |
134 | status = "disabled"; | |
135 | reg = <0x54006900 0x40>; | |
136 | interrupts = <0 35 4>; | |
137 | clocks = <&uart_clk>; | |
138 | fifo-size = <64>; | |
139 | }; | |
140 | ||
141 | serial2: serial@54006a00 { | |
142 | compatible = "socionext,uniphier-uart"; | |
143 | status = "disabled"; | |
144 | reg = <0x54006a00 0x40>; | |
145 | interrupts = <0 37 4>; | |
146 | clocks = <&uart_clk>; | |
147 | fifo-size = <64>; | |
148 | }; | |
149 | ||
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150 | i2c0: i2c@58400000 { |
151 | compatible = "socionext,uniphier-i2c"; | |
152 | status = "disabled"; | |
153 | reg = <0x58400000 0x40>; | |
154 | #address-cells = <1>; | |
155 | #size-cells = <0>; | |
156 | interrupts = <0 41 1>; | |
157 | clocks = <&iobus_clk>; | |
158 | clock-frequency = <100000>; | |
159 | }; | |
160 | ||
161 | i2c1: i2c@58480000 { | |
162 | compatible = "socionext,uniphier-i2c"; | |
163 | status = "disabled"; | |
164 | reg = <0x58480000 0x40>; | |
165 | #address-cells = <1>; | |
166 | #size-cells = <0>; | |
167 | interrupts = <0 42 1>; | |
168 | clocks = <&iobus_clk>; | |
169 | clock-frequency = <100000>; | |
170 | }; | |
171 | ||
172 | i2c2: i2c@58500000 { | |
173 | compatible = "socionext,uniphier-i2c"; | |
174 | status = "disabled"; | |
175 | reg = <0x58500000 0x40>; | |
176 | #address-cells = <1>; | |
177 | #size-cells = <0>; | |
178 | interrupts = <0 43 1>; | |
179 | clocks = <&iobus_clk>; | |
180 | clock-frequency = <100000>; | |
181 | }; | |
182 | ||
183 | i2c3: i2c@58580000 { | |
184 | compatible = "socionext,uniphier-i2c"; | |
185 | status = "disabled"; | |
186 | reg = <0x58580000 0x40>; | |
187 | #address-cells = <1>; | |
188 | #size-cells = <0>; | |
189 | interrupts = <0 44 1>; | |
190 | clocks = <&iobus_clk>; | |
191 | clock-frequency = <100000>; | |
192 | }; | |
193 | ||
194 | /* chip-internal connection for DMD */ | |
195 | i2c4: i2c@58600000 { | |
196 | compatible = "socionext,uniphier-i2c"; | |
197 | reg = <0x58600000 0x40>; | |
198 | #address-cells = <1>; | |
199 | #size-cells = <0>; | |
200 | interrupts = <0 45 1>; | |
201 | clocks = <&iobus_clk>; | |
202 | clock-frequency = <400000>; | |
203 | }; | |
204 | ||
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205 | system-bus-controller-misc@59800000 { |
206 | compatible = "socionext,uniphier-system-bus-controller-misc", | |
207 | "syscon"; | |
208 | reg = <0x59800000 0x2000>; | |
209 | }; | |
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210 | |
211 | usb0: usb@5a800100 { | |
212 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
213 | status = "disabled"; | |
214 | reg = <0x5a800100 0x100>; | |
215 | interrupts = <0 80 4>; | |
216 | }; | |
217 | ||
218 | usb1: usb@5a810100 { | |
219 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
220 | status = "disabled"; | |
221 | reg = <0x5a810100 0x100>; | |
222 | interrupts = <0 81 4>; | |
223 | }; | |
224 | ||
225 | usb2: usb@5a820100 { | |
226 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
227 | status = "disabled"; | |
228 | reg = <0x5a820100 0x100>; | |
229 | interrupts = <0 82 4>; | |
230 | }; | |
231 | ||
232 | usb3: usb@5a830100 { | |
233 | compatible = "socionext,uniphier-ehci", "generic-ehci"; | |
234 | status = "disabled"; | |
235 | reg = <0x5a830100 0x100>; | |
236 | interrupts = <0 83 4>; | |
237 | }; | |
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238 | }; |
239 | }; |