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6a371956 PM |
1 | /* |
2 | * ARM Ltd. Versatile Express | |
3 | * | |
4 | * Motherboard Express uATX | |
5 | * V2M-P1 | |
6 | * | |
7 | * HBI-0190D | |
8 | * | |
9 | * RS1 memory map ("ARM Cortex-A Series memory map" in the board's | |
10 | * Technical Reference Manual) | |
11 | * | |
12 | * WARNING! The hardware described in this file is independent from the | |
13 | * original variant (vexpress-v2m.dtsi), but there is a strong | |
14 | * correspondence between the two configurations. | |
15 | * | |
16 | * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT | |
17 | * CHANGES TO vexpress-v2m.dtsi! | |
18 | */ | |
19 | ||
6a371956 | 20 | motherboard { |
433683a6 PM |
21 | model = "V2M-P1"; |
22 | arm,hbi = <0x190>; | |
842839a3 | 23 | arm,vexpress,site = <0>; |
6a371956 | 24 | arm,v2m-memory-map = "rs1"; |
433683a6 | 25 | compatible = "arm,vexpress,v2m-p1", "simple-bus"; |
6a371956 PM |
26 | #address-cells = <2>; /* SMB chipselect number and offset */ |
27 | #size-cells = <1>; | |
28 | #interrupt-cells = <1>; | |
433683a6 | 29 | ranges; |
6a371956 PM |
30 | |
31 | flash@0,00000000 { | |
32 | compatible = "arm,vexpress-flash", "cfi-flash"; | |
33 | reg = <0 0x00000000 0x04000000>, | |
34 | <4 0x00000000 0x04000000>; | |
35 | bank-width = <4>; | |
36 | }; | |
37 | ||
38 | psram@1,00000000 { | |
39 | compatible = "arm,vexpress-psram", "mtd-ram"; | |
40 | reg = <1 0x00000000 0x02000000>; | |
41 | bank-width = <4>; | |
42 | }; | |
43 | ||
44 | vram@2,00000000 { | |
45 | compatible = "arm,vexpress-vram"; | |
46 | reg = <2 0x00000000 0x00800000>; | |
47 | }; | |
48 | ||
49 | ethernet@2,02000000 { | |
50 | compatible = "smsc,lan9118", "smsc,lan9115"; | |
51 | reg = <2 0x02000000 0x10000>; | |
52 | interrupts = <15>; | |
53 | phy-mode = "mii"; | |
54 | reg-io-width = <4>; | |
55 | smsc,irq-active-high; | |
56 | smsc,irq-push-pull; | |
b2a54ff0 PM |
57 | vdd33a-supply = <&v2m_fixed_3v3>; |
58 | vddvario-supply = <&v2m_fixed_3v3>; | |
6a371956 PM |
59 | }; |
60 | ||
61 | usb@2,03000000 { | |
62 | compatible = "nxp,usb-isp1761"; | |
63 | reg = <2 0x03000000 0x20000>; | |
64 | interrupts = <16>; | |
65 | port1-otg; | |
66 | }; | |
67 | ||
68 | iofpga@3,00000000 { | |
69 | compatible = "arm,amba-bus", "simple-bus"; | |
70 | #address-cells = <1>; | |
71 | #size-cells = <1>; | |
72 | ranges = <0 3 0 0x200000>; | |
73 | ||
842839a3 | 74 | v2m_sysreg: sysreg@010000 { |
6a371956 PM |
75 | compatible = "arm,vexpress-sysreg"; |
76 | reg = <0x010000 0x1000>; | |
842839a3 PM |
77 | gpio-controller; |
78 | #gpio-cells = <2>; | |
6a371956 PM |
79 | }; |
80 | ||
842839a3 | 81 | v2m_sysctl: sysctl@020000 { |
6a371956 PM |
82 | compatible = "arm,sp810", "arm,primecell"; |
83 | reg = <0x020000 0x1000>; | |
842839a3 PM |
84 | clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; |
85 | clock-names = "refclk", "timclk", "apb_pclk"; | |
86 | #clock-cells = <1>; | |
87 | clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; | |
6a371956 PM |
88 | }; |
89 | ||
90 | /* PCI-E I2C bus */ | |
91 | v2m_i2c_pcie: i2c@030000 { | |
92 | compatible = "arm,versatile-i2c"; | |
93 | reg = <0x030000 0x1000>; | |
94 | ||
95 | #address-cells = <1>; | |
96 | #size-cells = <0>; | |
97 | ||
98 | pcie-switch@60 { | |
99 | compatible = "idt,89hpes32h8"; | |
100 | reg = <0x60>; | |
101 | }; | |
102 | }; | |
103 | ||
104 | aaci@040000 { | |
105 | compatible = "arm,pl041", "arm,primecell"; | |
106 | reg = <0x040000 0x1000>; | |
107 | interrupts = <11>; | |
842839a3 PM |
108 | clocks = <&smbclk>; |
109 | clock-names = "apb_pclk"; | |
6a371956 PM |
110 | }; |
111 | ||
112 | mmci@050000 { | |
113 | compatible = "arm,pl180", "arm,primecell"; | |
114 | reg = <0x050000 0x1000>; | |
115 | interrupts = <9 10>; | |
842839a3 PM |
116 | cd-gpios = <&v2m_sysreg 0 0>; |
117 | wp-gpios = <&v2m_sysreg 1 0>; | |
118 | max-frequency = <12000000>; | |
119 | vmmc-supply = <&v2m_fixed_3v3>; | |
120 | clocks = <&v2m_clk24mhz>, <&smbclk>; | |
121 | clock-names = "mclk", "apb_pclk"; | |
6a371956 PM |
122 | }; |
123 | ||
124 | kmi@060000 { | |
125 | compatible = "arm,pl050", "arm,primecell"; | |
126 | reg = <0x060000 0x1000>; | |
127 | interrupts = <12>; | |
842839a3 PM |
128 | clocks = <&v2m_clk24mhz>, <&smbclk>; |
129 | clock-names = "KMIREFCLK", "apb_pclk"; | |
6a371956 PM |
130 | }; |
131 | ||
132 | kmi@070000 { | |
133 | compatible = "arm,pl050", "arm,primecell"; | |
134 | reg = <0x070000 0x1000>; | |
135 | interrupts = <13>; | |
842839a3 PM |
136 | clocks = <&v2m_clk24mhz>, <&smbclk>; |
137 | clock-names = "KMIREFCLK", "apb_pclk"; | |
6a371956 PM |
138 | }; |
139 | ||
140 | v2m_serial0: uart@090000 { | |
141 | compatible = "arm,pl011", "arm,primecell"; | |
142 | reg = <0x090000 0x1000>; | |
143 | interrupts = <5>; | |
842839a3 PM |
144 | clocks = <&v2m_oscclk2>, <&smbclk>; |
145 | clock-names = "uartclk", "apb_pclk"; | |
6a371956 PM |
146 | }; |
147 | ||
148 | v2m_serial1: uart@0a0000 { | |
149 | compatible = "arm,pl011", "arm,primecell"; | |
150 | reg = <0x0a0000 0x1000>; | |
151 | interrupts = <6>; | |
842839a3 PM |
152 | clocks = <&v2m_oscclk2>, <&smbclk>; |
153 | clock-names = "uartclk", "apb_pclk"; | |
6a371956 PM |
154 | }; |
155 | ||
156 | v2m_serial2: uart@0b0000 { | |
157 | compatible = "arm,pl011", "arm,primecell"; | |
158 | reg = <0x0b0000 0x1000>; | |
159 | interrupts = <7>; | |
842839a3 PM |
160 | clocks = <&v2m_oscclk2>, <&smbclk>; |
161 | clock-names = "uartclk", "apb_pclk"; | |
6a371956 PM |
162 | }; |
163 | ||
164 | v2m_serial3: uart@0c0000 { | |
165 | compatible = "arm,pl011", "arm,primecell"; | |
166 | reg = <0x0c0000 0x1000>; | |
167 | interrupts = <8>; | |
842839a3 PM |
168 | clocks = <&v2m_oscclk2>, <&smbclk>; |
169 | clock-names = "uartclk", "apb_pclk"; | |
6a371956 PM |
170 | }; |
171 | ||
172 | wdt@0f0000 { | |
173 | compatible = "arm,sp805", "arm,primecell"; | |
174 | reg = <0x0f0000 0x1000>; | |
175 | interrupts = <0>; | |
842839a3 PM |
176 | clocks = <&v2m_refclk32khz>, <&smbclk>; |
177 | clock-names = "wdogclk", "apb_pclk"; | |
6a371956 PM |
178 | }; |
179 | ||
180 | v2m_timer01: timer@110000 { | |
181 | compatible = "arm,sp804", "arm,primecell"; | |
182 | reg = <0x110000 0x1000>; | |
183 | interrupts = <2>; | |
842839a3 PM |
184 | clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; |
185 | clock-names = "timclken1", "timclken2", "apb_pclk"; | |
6a371956 PM |
186 | }; |
187 | ||
188 | v2m_timer23: timer@120000 { | |
189 | compatible = "arm,sp804", "arm,primecell"; | |
190 | reg = <0x120000 0x1000>; | |
b7541a95 | 191 | interrupts = <3>; |
842839a3 PM |
192 | clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; |
193 | clock-names = "timclken1", "timclken2", "apb_pclk"; | |
6a371956 PM |
194 | }; |
195 | ||
196 | /* DVI I2C bus */ | |
197 | v2m_i2c_dvi: i2c@160000 { | |
198 | compatible = "arm,versatile-i2c"; | |
199 | reg = <0x160000 0x1000>; | |
200 | ||
201 | #address-cells = <1>; | |
202 | #size-cells = <0>; | |
203 | ||
204 | dvi-transmitter@39 { | |
205 | compatible = "sil,sii9022-tpi", "sil,sii9022"; | |
206 | reg = <0x39>; | |
207 | }; | |
208 | ||
209 | dvi-transmitter@60 { | |
210 | compatible = "sil,sii9022-cpi", "sil,sii9022"; | |
211 | reg = <0x60>; | |
212 | }; | |
213 | }; | |
214 | ||
215 | rtc@170000 { | |
216 | compatible = "arm,pl031", "arm,primecell"; | |
217 | reg = <0x170000 0x1000>; | |
218 | interrupts = <4>; | |
842839a3 PM |
219 | clocks = <&smbclk>; |
220 | clock-names = "apb_pclk"; | |
6a371956 PM |
221 | }; |
222 | ||
223 | compact-flash@1a0000 { | |
224 | compatible = "arm,vexpress-cf", "ata-generic"; | |
225 | reg = <0x1a0000 0x100 | |
226 | 0x1a0100 0xf00>; | |
227 | reg-shift = <2>; | |
228 | }; | |
229 | ||
230 | clcd@1f0000 { | |
231 | compatible = "arm,pl111", "arm,primecell"; | |
232 | reg = <0x1f0000 0x1000>; | |
233 | interrupts = <14>; | |
842839a3 PM |
234 | clocks = <&v2m_oscclk1>, <&smbclk>; |
235 | clock-names = "clcdclk", "apb_pclk"; | |
6a371956 PM |
236 | }; |
237 | }; | |
b2a54ff0 PM |
238 | |
239 | v2m_fixed_3v3: fixedregulator@0 { | |
240 | compatible = "regulator-fixed"; | |
241 | regulator-name = "3V3"; | |
242 | regulator-min-microvolt = <3300000>; | |
243 | regulator-max-microvolt = <3300000>; | |
244 | regulator-always-on; | |
245 | }; | |
842839a3 PM |
246 | |
247 | v2m_clk24mhz: clk24mhz { | |
248 | compatible = "fixed-clock"; | |
249 | #clock-cells = <0>; | |
250 | clock-frequency = <24000000>; | |
251 | clock-output-names = "v2m:clk24mhz"; | |
252 | }; | |
253 | ||
254 | v2m_refclk1mhz: refclk1mhz { | |
255 | compatible = "fixed-clock"; | |
256 | #clock-cells = <0>; | |
257 | clock-frequency = <1000000>; | |
258 | clock-output-names = "v2m:refclk1mhz"; | |
259 | }; | |
260 | ||
261 | v2m_refclk32khz: refclk32khz { | |
262 | compatible = "fixed-clock"; | |
263 | #clock-cells = <0>; | |
264 | clock-frequency = <32768>; | |
265 | clock-output-names = "v2m:refclk32khz"; | |
266 | }; | |
267 | ||
268 | mcc { | |
269 | compatible = "arm,vexpress,config-bus"; | |
270 | arm,vexpress,config-bridge = <&v2m_sysreg>; | |
271 | ||
272 | osc@0 { | |
273 | /* MCC static memory clock */ | |
274 | compatible = "arm,vexpress-osc"; | |
275 | arm,vexpress-sysreg,func = <1 0>; | |
276 | freq-range = <25000000 60000000>; | |
277 | #clock-cells = <0>; | |
278 | clock-output-names = "v2m:oscclk0"; | |
279 | }; | |
280 | ||
281 | v2m_oscclk1: osc@1 { | |
282 | /* CLCD clock */ | |
283 | compatible = "arm,vexpress-osc"; | |
284 | arm,vexpress-sysreg,func = <1 1>; | |
285 | freq-range = <23750000 63500000>; | |
286 | #clock-cells = <0>; | |
287 | clock-output-names = "v2m:oscclk1"; | |
288 | }; | |
289 | ||
290 | v2m_oscclk2: osc@2 { | |
291 | /* IO FPGA peripheral clock */ | |
292 | compatible = "arm,vexpress-osc"; | |
293 | arm,vexpress-sysreg,func = <1 2>; | |
294 | freq-range = <24000000 24000000>; | |
295 | #clock-cells = <0>; | |
296 | clock-output-names = "v2m:oscclk2"; | |
297 | }; | |
298 | ||
299 | volt@0 { | |
300 | /* Logic level voltage */ | |
301 | compatible = "arm,vexpress-volt"; | |
302 | arm,vexpress-sysreg,func = <2 0>; | |
303 | regulator-name = "VIO"; | |
304 | regulator-always-on; | |
305 | label = "VIO"; | |
306 | }; | |
307 | ||
308 | temp@0 { | |
309 | /* MCC internal operating temperature */ | |
310 | compatible = "arm,vexpress-temp"; | |
311 | arm,vexpress-sysreg,func = <4 0>; | |
312 | label = "MCC"; | |
313 | }; | |
314 | ||
315 | reset@0 { | |
316 | compatible = "arm,vexpress-reset"; | |
317 | arm,vexpress-sysreg,func = <5 0>; | |
318 | }; | |
319 | ||
320 | muxfpga@0 { | |
321 | compatible = "arm,vexpress-muxfpga"; | |
322 | arm,vexpress-sysreg,func = <7 0>; | |
323 | }; | |
324 | ||
325 | shutdown@0 { | |
326 | compatible = "arm,vexpress-shutdown"; | |
327 | arm,vexpress-sysreg,func = <8 0>; | |
328 | }; | |
329 | ||
330 | reboot@0 { | |
331 | compatible = "arm,vexpress-reboot"; | |
332 | arm,vexpress-sysreg,func = <9 0>; | |
333 | }; | |
334 | ||
335 | dvimode@0 { | |
336 | compatible = "arm,vexpress-dvimode"; | |
337 | arm,vexpress-sysreg,func = <11 0>; | |
338 | }; | |
339 | }; | |
6a371956 | 340 | }; |