Commit | Line | Data |
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6a371956 PM |
1 | /* |
2 | * ARM Ltd. Versatile Express | |
3 | * | |
4 | * Motherboard Express uATX | |
5 | * V2M-P1 | |
6 | * | |
7 | * HBI-0190D | |
8 | * | |
9 | * RS1 memory map ("ARM Cortex-A Series memory map" in the board's | |
10 | * Technical Reference Manual) | |
11 | * | |
12 | * WARNING! The hardware described in this file is independent from the | |
13 | * original variant (vexpress-v2m.dtsi), but there is a strong | |
14 | * correspondence between the two configurations. | |
15 | * | |
16 | * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT | |
17 | * CHANGES TO vexpress-v2m.dtsi! | |
18 | */ | |
19 | ||
20 | / { | |
21 | aliases { | |
22 | arm,v2m_timer = &v2m_timer01; | |
23 | }; | |
24 | ||
25 | motherboard { | |
26 | compatible = "simple-bus"; | |
27 | arm,v2m-memory-map = "rs1"; | |
28 | #address-cells = <2>; /* SMB chipselect number and offset */ | |
29 | #size-cells = <1>; | |
30 | #interrupt-cells = <1>; | |
31 | ||
32 | flash@0,00000000 { | |
33 | compatible = "arm,vexpress-flash", "cfi-flash"; | |
34 | reg = <0 0x00000000 0x04000000>, | |
35 | <4 0x00000000 0x04000000>; | |
36 | bank-width = <4>; | |
37 | }; | |
38 | ||
39 | psram@1,00000000 { | |
40 | compatible = "arm,vexpress-psram", "mtd-ram"; | |
41 | reg = <1 0x00000000 0x02000000>; | |
42 | bank-width = <4>; | |
43 | }; | |
44 | ||
45 | vram@2,00000000 { | |
46 | compatible = "arm,vexpress-vram"; | |
47 | reg = <2 0x00000000 0x00800000>; | |
48 | }; | |
49 | ||
50 | ethernet@2,02000000 { | |
51 | compatible = "smsc,lan9118", "smsc,lan9115"; | |
52 | reg = <2 0x02000000 0x10000>; | |
53 | interrupts = <15>; | |
54 | phy-mode = "mii"; | |
55 | reg-io-width = <4>; | |
56 | smsc,irq-active-high; | |
57 | smsc,irq-push-pull; | |
58 | }; | |
59 | ||
60 | usb@2,03000000 { | |
61 | compatible = "nxp,usb-isp1761"; | |
62 | reg = <2 0x03000000 0x20000>; | |
63 | interrupts = <16>; | |
64 | port1-otg; | |
65 | }; | |
66 | ||
67 | iofpga@3,00000000 { | |
68 | compatible = "arm,amba-bus", "simple-bus"; | |
69 | #address-cells = <1>; | |
70 | #size-cells = <1>; | |
71 | ranges = <0 3 0 0x200000>; | |
72 | ||
73 | sysreg@010000 { | |
74 | compatible = "arm,vexpress-sysreg"; | |
75 | reg = <0x010000 0x1000>; | |
76 | }; | |
77 | ||
78 | sysctl@020000 { | |
79 | compatible = "arm,sp810", "arm,primecell"; | |
80 | reg = <0x020000 0x1000>; | |
81 | }; | |
82 | ||
83 | /* PCI-E I2C bus */ | |
84 | v2m_i2c_pcie: i2c@030000 { | |
85 | compatible = "arm,versatile-i2c"; | |
86 | reg = <0x030000 0x1000>; | |
87 | ||
88 | #address-cells = <1>; | |
89 | #size-cells = <0>; | |
90 | ||
91 | pcie-switch@60 { | |
92 | compatible = "idt,89hpes32h8"; | |
93 | reg = <0x60>; | |
94 | }; | |
95 | }; | |
96 | ||
97 | aaci@040000 { | |
98 | compatible = "arm,pl041", "arm,primecell"; | |
99 | reg = <0x040000 0x1000>; | |
100 | interrupts = <11>; | |
101 | }; | |
102 | ||
103 | mmci@050000 { | |
104 | compatible = "arm,pl180", "arm,primecell"; | |
105 | reg = <0x050000 0x1000>; | |
106 | interrupts = <9 10>; | |
107 | }; | |
108 | ||
109 | kmi@060000 { | |
110 | compatible = "arm,pl050", "arm,primecell"; | |
111 | reg = <0x060000 0x1000>; | |
112 | interrupts = <12>; | |
113 | }; | |
114 | ||
115 | kmi@070000 { | |
116 | compatible = "arm,pl050", "arm,primecell"; | |
117 | reg = <0x070000 0x1000>; | |
118 | interrupts = <13>; | |
119 | }; | |
120 | ||
121 | v2m_serial0: uart@090000 { | |
122 | compatible = "arm,pl011", "arm,primecell"; | |
123 | reg = <0x090000 0x1000>; | |
124 | interrupts = <5>; | |
125 | }; | |
126 | ||
127 | v2m_serial1: uart@0a0000 { | |
128 | compatible = "arm,pl011", "arm,primecell"; | |
129 | reg = <0x0a0000 0x1000>; | |
130 | interrupts = <6>; | |
131 | }; | |
132 | ||
133 | v2m_serial2: uart@0b0000 { | |
134 | compatible = "arm,pl011", "arm,primecell"; | |
135 | reg = <0x0b0000 0x1000>; | |
136 | interrupts = <7>; | |
137 | }; | |
138 | ||
139 | v2m_serial3: uart@0c0000 { | |
140 | compatible = "arm,pl011", "arm,primecell"; | |
141 | reg = <0x0c0000 0x1000>; | |
142 | interrupts = <8>; | |
143 | }; | |
144 | ||
145 | wdt@0f0000 { | |
146 | compatible = "arm,sp805", "arm,primecell"; | |
147 | reg = <0x0f0000 0x1000>; | |
148 | interrupts = <0>; | |
149 | }; | |
150 | ||
151 | v2m_timer01: timer@110000 { | |
152 | compatible = "arm,sp804", "arm,primecell"; | |
153 | reg = <0x110000 0x1000>; | |
154 | interrupts = <2>; | |
155 | }; | |
156 | ||
157 | v2m_timer23: timer@120000 { | |
158 | compatible = "arm,sp804", "arm,primecell"; | |
159 | reg = <0x120000 0x1000>; | |
160 | }; | |
161 | ||
162 | /* DVI I2C bus */ | |
163 | v2m_i2c_dvi: i2c@160000 { | |
164 | compatible = "arm,versatile-i2c"; | |
165 | reg = <0x160000 0x1000>; | |
166 | ||
167 | #address-cells = <1>; | |
168 | #size-cells = <0>; | |
169 | ||
170 | dvi-transmitter@39 { | |
171 | compatible = "sil,sii9022-tpi", "sil,sii9022"; | |
172 | reg = <0x39>; | |
173 | }; | |
174 | ||
175 | dvi-transmitter@60 { | |
176 | compatible = "sil,sii9022-cpi", "sil,sii9022"; | |
177 | reg = <0x60>; | |
178 | }; | |
179 | }; | |
180 | ||
181 | rtc@170000 { | |
182 | compatible = "arm,pl031", "arm,primecell"; | |
183 | reg = <0x170000 0x1000>; | |
184 | interrupts = <4>; | |
185 | }; | |
186 | ||
187 | compact-flash@1a0000 { | |
188 | compatible = "arm,vexpress-cf", "ata-generic"; | |
189 | reg = <0x1a0000 0x100 | |
190 | 0x1a0100 0xf00>; | |
191 | reg-shift = <2>; | |
192 | }; | |
193 | ||
194 | clcd@1f0000 { | |
195 | compatible = "arm,pl111", "arm,primecell"; | |
196 | reg = <0x1f0000 0x1000>; | |
197 | interrupts = <14>; | |
198 | }; | |
199 | }; | |
200 | }; | |
201 | }; |