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Merge tag 'wireless-drivers-for-davem-2016-04-13' of git://git.kernel.org/pub/scm...
[deliverable/linux.git] / arch / arm / boot / dts / vfxxx.dtsi
CommitLineData
efb45b30
SA		 1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4a4d45c7
SA		 4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
efb45b30
SA		 40 */
41
42#include "vf610-pinfunc.h"
43#include <dt-bindings/clock/vf610-clock.h>
44#include <dt-bindings/interrupt-controller/irq.h>
2b36bda3 45#include <dt-bindings/gpio/gpio.h>
efb45b30
SA		 46
47/ {
48 aliases {
49 can0 = &can0;
50 can1 = &can1;
17566c72
SA		 51 ethernet0 = &fec0;
52 ethernet1 = &fec1;
efb45b30
SA		 53 serial0 = &uart0;
54 serial1 = &uart1;
55 serial2 = &uart2;
56 serial3 = &uart3;
57 serial4 = &uart4;
58 serial5 = &uart5;
76713954
SA		 59 gpio0 = &gpio0;
60 gpio1 = &gpio1;
61 gpio2 = &gpio2;
62 gpio3 = &gpio3;
63 gpio4 = &gpio4;
efb45b30
SA		 64 usbphy0 = &usbphy0;
65 usbphy1 = &usbphy1;
66 };
67
68 fxosc: fxosc {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <24000000>;
72 };
73
74 sxosc: sxosc {
75 compatible = "fixed-clock";
76 #clock-cells = <0>;
77 clock-frequency = <32768>;
78 };
79
0d018d73
SA		 80 reboot: syscon-reboot {
81 compatible = "syscon-reboot";
82 regmap = <&src>;
83 offset = <0x0>;
84 mask = <0x1000>;
85 };
86
efb45b30
SA		 87 soc {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "simple-bus";
c09d0f7c 91 interrupt-parent = <&mscm_ir>;
efb45b30
SA		 92 ranges;
93
94 aips0: aips-bus@40000000 {
95 compatible = "fsl,aips-bus", "simple-bus";
96 #address-cells = <1>;
97 #size-cells = <1>;
98 ranges;
99
c09d0f7c
SA		 100 mscm_cpucfg: cpucfg@40001000 {
101 compatible = "fsl,vf610-mscm-cpucfg", "syscon";
102 reg = <0x40001000 0x800>;
103 };
104
105 mscm_ir: interrupt-controller@40001800 {
106 compatible = "fsl,vf610-mscm-ir";
107 reg = <0x40001800 0x400>;
108 fsl,cpucfg = <&mscm_cpucfg>;
109 interrupt-controller;
110 #interrupt-cells = <2>;
111 };
112
efb45b30
SA		 113 edma0: dma-controller@40018000 {
114 #dma-cells = <2>;
115 compatible = "fsl,vf610-edma";
116 reg = <0x40018000 0x2000>,
117 <0x40024000 0x1000>,
118 <0x40025000 0x1000>;
119 dma-channels = <32>;
c09d0f7c
SA		 120 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
121 <9 IRQ_TYPE_LEVEL_HIGH>;
122 interrupt-names = "edma-tx", "edma-err";
efb45b30
SA		 123 clock-names = "dmamux0", "dmamux1";
124 clocks = <&clks VF610_CLK_DMAMUX0>,
125 <&clks VF610_CLK_DMAMUX1>;
126 status = "disabled";
127 };
128
129 can0: flexcan@40020000 {
130 compatible = "fsl,vf610-flexcan";
131 reg = <0x40020000 0x4000>;
c09d0f7c 132 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 133 clocks = <&clks VF610_CLK_FLEXCAN0>,
134 <&clks VF610_CLK_FLEXCAN0>;
135 clock-names = "ipg", "per";
136 status = "disabled";
137 };
138
139 uart0: serial@40027000 {
140 compatible = "fsl,vf610-lpuart";
141 reg = <0x40027000 0x1000>;
c09d0f7c 142 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 143 clocks = <&clks VF610_CLK_UART0>;
144 clock-names = "ipg";
145 dmas = <&edma0 0 2>,
146 <&edma0 0 3>;
147 dma-names = "rx","tx";
148 status = "disabled";
149 };
150
151 uart1: serial@40028000 {
152 compatible = "fsl,vf610-lpuart";
153 reg = <0x40028000 0x1000>;
c09d0f7c 154 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 155 clocks = <&clks VF610_CLK_UART1>;
156 clock-names = "ipg";
157 dmas = <&edma0 0 4>,
158 <&edma0 0 5>;
159 dma-names = "rx","tx";
160 status = "disabled";
161 };
162
163 uart2: serial@40029000 {
164 compatible = "fsl,vf610-lpuart";
165 reg = <0x40029000 0x1000>;
c09d0f7c 166 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 167 clocks = <&clks VF610_CLK_UART2>;
168 clock-names = "ipg";
169 dmas = <&edma0 0 6>,
170 <&edma0 0 7>;
171 dma-names = "rx","tx";
172 status = "disabled";
173 };
174
175 uart3: serial@4002a000 {
176 compatible = "fsl,vf610-lpuart";
177 reg = <0x4002a000 0x1000>;
c09d0f7c 178 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 179 clocks = <&clks VF610_CLK_UART3>;
180 clock-names = "ipg";
181 dmas = <&edma0 0 8>,
182 <&edma0 0 9>;
183 dma-names = "rx","tx";
184 status = "disabled";
185 };
186
187 dspi0: dspi0@4002c000 {
188 #address-cells = <1>;
189 #size-cells = <0>;
190 compatible = "fsl,vf610-dspi";
191 reg = <0x4002c000 0x1000>;
c09d0f7c 192 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 193 clocks = <&clks VF610_CLK_DSPI0>;
194 clock-names = "dspi";
897ed0ca 195 spi-num-chipselects = <6>;
efb45b30
SA		 196 status = "disabled";
197 };
198
1b545c17
BD		 199 dspi1: dspi1@4002d000 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl,vf610-dspi";
203 reg = <0x4002d000 0x1000>;
c09d0f7c 204 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
1b545c17
BD		 205 clocks = <&clks VF610_CLK_DSPI1>;
206 clock-names = "dspi";
897ed0ca 207 spi-num-chipselects = <4>;
1b545c17
BD		 208 status = "disabled";
209 };
210
26a91d89
SA		 211 sai0: sai@4002f000 {
212 compatible = "fsl,vf610-sai";
213 reg = <0x4002f000 0x1000>;
214 interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
215 clocks = <&clks VF610_CLK_SAI0>,
216 <&clks VF610_CLK_SAI0_DIV>,
217 <&clks 0>, <&clks 0>;
218 clock-names = "bus", "mclk1", "mclk2", "mclk3";
219 dma-names = "tx", "rx";
220 dmas = <&edma0 0 17>,
221 <&edma0 0 16>;
222 status = "disabled";
223 };
224
225 sai1: sai@40030000 {
226 compatible = "fsl,vf610-sai";
227 reg = <0x40030000 0x1000>;
228 interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
229 clocks = <&clks VF610_CLK_SAI1>,
230 <&clks VF610_CLK_SAI1_DIV>,
231 <&clks 0>, <&clks 0>;
232 clock-names = "bus", "mclk1", "mclk2", "mclk3";
233 dma-names = "tx", "rx";
234 dmas = <&edma0 0 19>,
235 <&edma0 0 18>;
236 status = "disabled";
237 };
238
efb45b30
SA		 239 sai2: sai@40031000 {
240 compatible = "fsl,vf610-sai";
241 reg = <0x40031000 0x1000>;
c09d0f7c 242 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
531ee1f4
SA		 243 clocks = <&clks VF610_CLK_SAI2>,
244 <&clks VF610_CLK_SAI2_DIV>,
245 <&clks 0>, <&clks 0>;
246 clock-names = "bus", "mclk1", "mclk2", "mclk3";
efb45b30
SA		 247 dma-names = "tx", "rx";
248 dmas = <&edma0 0 21>,
249 <&edma0 0 20>;
250 status = "disabled";
251 };
252
26a91d89
SA		 253 sai3: sai@40032000 {
254 compatible = "fsl,vf610-sai";
255 reg = <0x40032000 0x1000>;
256 interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
257 clocks = <&clks VF610_CLK_SAI3>,
258 <&clks VF610_CLK_SAI3_DIV>,
259 <&clks 0>, <&clks 0>;
260 clock-names = "bus", "mclk1", "mclk2", "mclk3";
261 dma-names = "tx", "rx";
262 dmas = <&edma0 1 9>,
263 <&edma0 1 8>;
264 status = "disabled";
265 };
266
efb45b30
SA		 267 pit: pit@40037000 {
268 compatible = "fsl,vf610-pit";
269 reg = <0x40037000 0x1000>;
c09d0f7c 270 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 271 clocks = <&clks VF610_CLK_PIT>;
272 clock-names = "pit";
273 };
274
275 pwm0: pwm@40038000 {
276 compatible = "fsl,vf610-ftm-pwm";
277 #pwm-cells = <3>;
278 reg = <0x40038000 0x1000>;
279 clock-names = "ftm_sys", "ftm_ext",
280 "ftm_fix", "ftm_cnt_clk_en";
281 clocks = <&clks VF610_CLK_FTM0>,
282 <&clks VF610_CLK_FTM0_EXT_SEL>,
283 <&clks VF610_CLK_FTM0_FIX_SEL>,
284 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
285 status = "disabled";
286 };
287
288 pwm1: pwm@40039000 {
289 compatible = "fsl,vf610-ftm-pwm";
290 #pwm-cells = <3>;
291 reg = <0x40039000 0x1000>;
292 clock-names = "ftm_sys", "ftm_ext",
293 "ftm_fix", "ftm_cnt_clk_en";
294 clocks = <&clks VF610_CLK_FTM1>,
295 <&clks VF610_CLK_FTM1_EXT_SEL>,
296 <&clks VF610_CLK_FTM1_FIX_SEL>,
297 <&clks VF610_CLK_FTM1_EXT_FIX_EN>;
298 status = "disabled";
299 };
300
301 adc0: adc@4003b000 {
302 compatible = "fsl,vf610-adc";
303 reg = <0x4003b000 0x1000>;
c09d0f7c 304 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 305 clocks = <&clks VF610_CLK_ADC0>;
306 clock-names = "adc";
9b1793af 307 #io-channel-cells = <1>;
efb45b30 308 status = "disabled";
def0641e
SA		 309 fsl,adck-max-frequency = <30000000>, <40000000>,
310 <20000000>;
efb45b30
SA		 311 };
312
c134e09f 313 wdoga5: wdog@4003e000 {
efb45b30
SA		 314 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
315 reg = <0x4003e000 0x1000>;
c09d0f7c 316 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 317 clocks = <&clks VF610_CLK_WDT>;
318 clock-names = "wdog";
319 status = "disabled";
320 };
321
322 qspi0: quadspi@40044000 {
323 #address-cells = <1>;
324 #size-cells = <0>;
325 compatible = "fsl,vf610-qspi";
f4b89232
CT		 326 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
327 reg-names = "QuadSPI", "QuadSPI-memory";
c09d0f7c 328 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 329 clocks = <&clks VF610_CLK_QSPI0_EN>,
330 <&clks VF610_CLK_QSPI0>;
331 clock-names = "qspi_en", "qspi";
332 status = "disabled";
333 };
334
335 iomuxc: iomuxc@40048000 {
336 compatible = "fsl,vf610-iomuxc";
337 reg = <0x40048000 0x1000>;
efb45b30
SA		 338 };
339
76713954 340 gpio0: gpio@40049000 {
efb45b30
SA		 341 compatible = "fsl,vf610-gpio";
342 reg = <0x40049000 0x1000 0x400ff000 0x40>;
343 gpio-controller;
344 #gpio-cells = <2>;
c09d0f7c 345 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 346 interrupt-controller;
347 #interrupt-cells = <2>;
348 gpio-ranges = <&iomuxc 0 0 32>;
349 };
350
76713954 351 gpio1: gpio@4004a000 {
efb45b30
SA		 352 compatible = "fsl,vf610-gpio";
353 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
354 gpio-controller;
355 #gpio-cells = <2>;
c09d0f7c 356 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 357 interrupt-controller;
358 #interrupt-cells = <2>;
359 gpio-ranges = <&iomuxc 0 32 32>;
360 };
361
76713954 362 gpio2: gpio@4004b000 {
efb45b30
SA		 363 compatible = "fsl,vf610-gpio";
364 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
365 gpio-controller;
366 #gpio-cells = <2>;
c09d0f7c 367 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 368 interrupt-controller;
369 #interrupt-cells = <2>;
370 gpio-ranges = <&iomuxc 0 64 32>;
371 };
372
76713954 373 gpio3: gpio@4004c000 {
efb45b30
SA		 374 compatible = "fsl,vf610-gpio";
375 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
376 gpio-controller;
377 #gpio-cells = <2>;
c09d0f7c 378 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 379 interrupt-controller;
380 #interrupt-cells = <2>;
381 gpio-ranges = <&iomuxc 0 96 32>;
382 };
383
76713954 384 gpio4: gpio@4004d000 {
efb45b30
SA		 385 compatible = "fsl,vf610-gpio";
386 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
387 gpio-controller;
388 #gpio-cells = <2>;
c09d0f7c 389 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 390 interrupt-controller;
391 #interrupt-cells = <2>;
392 gpio-ranges = <&iomuxc 0 128 7>;
393 };
394
395 anatop: anatop@40050000 {
396 compatible = "fsl,vf610-anatop", "syscon";
397 reg = <0x40050000 0x400>;
398 };
399
400 usbphy0: usbphy@40050800 {
401 compatible = "fsl,vf610-usbphy";
402 reg = <0x40050800 0x400>;
c09d0f7c 403 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 404 clocks = <&clks VF610_CLK_USBPHY0>;
405 fsl,anatop = <&anatop>;
406 status = "disabled";
407 };
408
409 usbphy1: usbphy@40050c00 {
410 compatible = "fsl,vf610-usbphy";
411 reg = <0x40050c00 0x400>;
c09d0f7c 412 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 413 clocks = <&clks VF610_CLK_USBPHY1>;
414 fsl,anatop = <&anatop>;
415 status = "disabled";
416 };
417
418 i2c0: i2c@40066000 {
419 #address-cells = <1>;
420 #size-cells = <0>;
421 compatible = "fsl,vf610-i2c";
422 reg = <0x40066000 0x1000>;
c09d0f7c 423 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 424 clocks = <&clks VF610_CLK_I2C0>;
425 clock-names = "ipg";
426 dmas = <&edma0 0 50>,
427 <&edma0 0 51>;
428 dma-names = "rx","tx";
429 status = "disabled";
430 };
431
2d4e4a62
CT		 432 i2c1: i2c@40067000 {
433 #address-cells = <1>;
434 #size-cells = <0>;
435 compatible = "fsl,vf610-i2c";
436 reg = <0x40067000 0x1000>;
437 interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
438 clocks = <&clks VF610_CLK_I2C1>;
439 clock-names = "ipg";
440 dmas = <&edma0 0 52>,
441 <&edma0 0 53>;
442 dma-names = "rx","tx";
443 status = "disabled";
444 };
445
efb45b30
SA		 446 clks: ccm@4006b000 {
447 compatible = "fsl,vf610-ccm";
448 reg = <0x4006b000 0x1000>;
449 clocks = <&sxosc>, <&fxosc>;
450 clock-names = "sxosc", "fxosc";
451 #clock-cells = <1>;
452 };
453
454 usbdev0: usb@40034000 {
455 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
456 reg = <0x40034000 0x800>;
c09d0f7c 457 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 458 clocks = <&clks VF610_CLK_USBC0>;
459 fsl,usbphy = <&usbphy0>;
460 fsl,usbmisc = <&usbmisc0 0>;
461 dr_mode = "peripheral";
462 status = "disabled";
463 };
464
465 usbmisc0: usb@40034800 {
466 #index-cells = <1>;
467 compatible = "fsl,vf610-usbmisc";
468 reg = <0x40034800 0x200>;
469 clocks = <&clks VF610_CLK_USBC0>;
470 status = "disabled";
471 };
0d018d73
SA		 472
473 src: src@4006e000 {
474 compatible = "fsl,vf610-src", "syscon";
475 reg = <0x4006e000 0x1000>;
53f643d2 476 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
0d018d73 477 };
efb45b30
SA		 478 };
479
480 aips1: aips-bus@40080000 {
481 compatible = "fsl,aips-bus", "simple-bus";
482 #address-cells = <1>;
483 #size-cells = <1>;
484 ranges;
485
486 edma1: dma-controller@40098000 {
487 #dma-cells = <2>;
488 compatible = "fsl,vf610-edma";
489 reg = <0x40098000 0x2000>,
490 <0x400a1000 0x1000>,
491 <0x400a2000 0x1000>;
492 dma-channels = <32>;
c09d0f7c
SA		 493 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
494 <11 IRQ_TYPE_LEVEL_HIGH>;
495 interrupt-names = "edma-tx", "edma-err";
efb45b30
SA		 496 clock-names = "dmamux0", "dmamux1";
497 clocks = <&clks VF610_CLK_DMAMUX2>,
498 <&clks VF610_CLK_DMAMUX3>;
499 status = "disabled";
500 };
501
8455dd0d 502 snvs0: snvs@400a7000 {
95d739b5
FL		 503 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
504 reg = <0x400a7000 0x2000>;
8455dd0d 505
95d739b5 506 snvsrtc: snvs-rtc-lp {
8455dd0d 507 compatible = "fsl,sec-v4.0-mon-rtc-lp";
95d739b5
FL		 508 regmap = <&snvs0>;
509 offset = <0x34>;
53f643d2 510 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
8455dd0d
SM		 511 clocks = <&clks VF610_CLK_SNVS>;
512 clock-names = "snvs-rtc";
513 };
514 };
515
efb45b30
SA		 516 uart4: serial@400a9000 {
517 compatible = "fsl,vf610-lpuart";
518 reg = <0x400a9000 0x1000>;
c09d0f7c 519 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 520 clocks = <&clks VF610_CLK_UART4>;
521 clock-names = "ipg";
522 status = "disabled";
523 };
524
525 uart5: serial@400aa000 {
526 compatible = "fsl,vf610-lpuart";
527 reg = <0x400aa000 0x1000>;
c09d0f7c 528 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 529 clocks = <&clks VF610_CLK_UART5>;
530 clock-names = "ipg";
531 status = "disabled";
532 };
533
5f060c71
CT		 534 dspi2: dspi2@400ac000 {
535 #address-cells = <1>;
536 #size-cells = <0>;
537 compatible = "fsl,vf610-dspi";
538 reg = <0x400ac000 0x1000>;
539 interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
540 clocks = <&clks VF610_CLK_DSPI2>;
541 clock-names = "dspi";
542 spi-num-chipselects = <2>;
543 status = "disabled";
544 };
545
546 dspi3: dspi3@400ad000 {
547 #address-cells = <1>;
548 #size-cells = <0>;
549 compatible = "fsl,vf610-dspi";
550 reg = <0x400ad000 0x1000>;
551 interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&clks VF610_CLK_DSPI3>;
553 clock-names = "dspi";
554 spi-num-chipselects = <2>;
555 status = "disabled";
556 };
557
efb45b30
SA		 558 adc1: adc@400bb000 {
559 compatible = "fsl,vf610-adc";
560 reg = <0x400bb000 0x1000>;
c09d0f7c 561 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 562 clocks = <&clks VF610_CLK_ADC1>;
563 clock-names = "adc";
9b1793af 564 #io-channel-cells = <1>;
efb45b30 565 status = "disabled";
3fa2f949
SM		 566 fsl,adck-max-frequency = <30000000>, <40000000>,
567 <20000000>;
efb45b30
SA		 568 };
569
3b7816ba
CT		 570 esdhc0: esdhc@400b1000 {
571 compatible = "fsl,imx53-esdhc";
572 reg = <0x400b1000 0x1000>;
573 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&clks VF610_CLK_IPG_BUS>,
575 <&clks VF610_CLK_PLATFORM_BUS>,
576 <&clks VF610_CLK_ESDHC0>;
577 clock-names = "ipg", "ahb", "per";
578 status = "disabled";
579 };
580
efb45b30
SA		 581 esdhc1: esdhc@400b2000 {
582 compatible = "fsl,imx53-esdhc";
583 reg = <0x400b2000 0x1000>;
c09d0f7c 584 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 585 clocks = <&clks VF610_CLK_IPG_BUS>,
586 <&clks VF610_CLK_PLATFORM_BUS>,
587 <&clks VF610_CLK_ESDHC1>;
588 clock-names = "ipg", "ahb", "per";
589 status = "disabled";
590 };
591
592 usbh1: usb@400b4000 {
593 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
594 reg = <0x400b4000 0x800>;
c09d0f7c 595 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 596 clocks = <&clks VF610_CLK_USBC1>;
597 fsl,usbphy = <&usbphy1>;
598 fsl,usbmisc = <&usbmisc1 0>;
599 dr_mode = "host";
600 status = "disabled";
601 };
602
603 usbmisc1: usb@400b4800 {
604 #index-cells = <1>;
605 compatible = "fsl,vf610-usbmisc";
606 reg = <0x400b4800 0x200>;
607 clocks = <&clks VF610_CLK_USBC1>;
608 status = "disabled";
609 };
610
611 ftm: ftm@400b8000 {
612 compatible = "fsl,ftm-timer";
613 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
c09d0f7c 614 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 615 clock-names = "ftm-evt", "ftm-src",
616 "ftm-evt-counter-en", "ftm-src-counter-en";
617 clocks = <&clks VF610_CLK_FTM2>,
618 <&clks VF610_CLK_FTM3>,
619 <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
620 <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
621 status = "disabled";
622 };
623
6f5e6967
CT		 624 qspi1: quadspi@400c4000 {
625 #address-cells = <1>;
626 #size-cells = <0>;
627 compatible = "fsl,vf610-qspi";
628 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
629 reg-names = "QuadSPI", "QuadSPI-memory";
630 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&clks VF610_CLK_QSPI1_EN>,
632 <&clks VF610_CLK_QSPI1>;
633 clock-names = "qspi_en", "qspi";
634 status = "disabled";
635 };
636
18e75ad2
SM		 637 dac0: dac@400cc000 {
638 compatible = "fsl,vf610-dac";
639 reg = <0x400cc000 1000>;
640 interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
641 clock-names = "dac";
642 clocks = <&clks VF610_CLK_DAC0>;
643 status = "disabled";
644 };
645
646 dac1: dac@400cd000 {
647 compatible = "fsl,vf610-dac";
648 reg = <0x400cd000 1000>;
649 interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
650 clock-names = "dac";
651 clocks = <&clks VF610_CLK_DAC1>;
652 status = "disabled";
653 };
654
efb45b30
SA		 655 fec0: ethernet@400d0000 {
656 compatible = "fsl,mvf600-fec";
657 reg = <0x400d0000 0x1000>;
c09d0f7c 658 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 659 clocks = <&clks VF610_CLK_ENET0>,
660 <&clks VF610_CLK_ENET0>,
661 <&clks VF610_CLK_ENET>;
662 clock-names = "ipg", "ahb", "ptp";
663 status = "disabled";
664 };
665
666 fec1: ethernet@400d1000 {
667 compatible = "fsl,mvf600-fec";
668 reg = <0x400d1000 0x1000>;
c09d0f7c 669 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 670 clocks = <&clks VF610_CLK_ENET1>,
671 <&clks VF610_CLK_ENET1>,
672 <&clks VF610_CLK_ENET>;
673 clock-names = "ipg", "ahb", "ptp";
674 status = "disabled";
675 };
676
677 can1: flexcan@400d4000 {
678 compatible = "fsl,vf610-flexcan";
679 reg = <0x400d4000 0x4000>;
c09d0f7c 680 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
efb45b30
SA		 681 clocks = <&clks VF610_CLK_FLEXCAN1>,
682 <&clks VF610_CLK_FLEXCAN1>;
683 clock-names = "ipg", "per";
684 status = "disabled";
685 };
686
baeeb541
SA		 687 nfc: nand@400e0000 {
688 #address-cells = <1>;
689 #size-cells = <0>;
690 compatible = "fsl,vf610-nfc";
691 reg = <0x400e0000 0x4000>;
692 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
693 clocks = <&clks VF610_CLK_NFC>;
694 clock-names = "nfc";
695 status = "disabled";
696 };
697
2d4e4a62
CT		 698 i2c2: i2c@400e6000 {
699 #address-cells = <1>;
700 #size-cells = <0>;
701 compatible = "fsl,vf610-i2c";
702 reg = <0x400e6000 0x1000>;
703 interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
704 clocks = <&clks VF610_CLK_I2C2>;
705 clock-names = "ipg";
706 dmas = <&edma0 1 36>,
707 <&edma0 1 37>;
708 dma-names = "rx","tx";
709 status = "disabled";
710 };
711
712 i2c3: i2c@400e7000 {
713 #address-cells = <1>;
714 #size-cells = <0>;
715 compatible = "fsl,vf610-i2c";
716 reg = <0x400e7000 0x1000>;
717 interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&clks VF610_CLK_I2C3>;
719 clock-names = "ipg";
720 dmas = <&edma0 1 38>,
721 <&edma0 1 39>;
722 dma-names = "rx","tx";
723 status = "disabled";
724 };
efb45b30 725 };
0aa8a996
SM		 726
727 iio-hwmon {
728 compatible = "iio-hwmon";
729 io-channels = <&adc0 16>, <&adc1 16>;
730 };
efb45b30
SA		 731 };
732};
Linux kernel - Deliverables
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