[deliverable/linux.git] / arch / arm / boot / dts / vfxxx.dtsi

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include "vf610-pinfunc.h"
#include <dt-bindings/clock/vf610-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		can0 = &can0;
		can1 = &can1;
		ethernet0 = &fec0;
		ethernet1 = &fec1;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		usbphy0 = &usbphy0;
		usbphy1 = &usbphy1;
	};

	fxosc: fxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	sxosc: sxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	reboot: syscon-reboot {
		compatible = "syscon-reboot";
		regmap = <&src>;
		offset = <0x0>;
		mask = <0x1000>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&mscm_ir>;
		ranges;

		aips0: aips-bus@40000000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			mscm_cpucfg: cpucfg@40001000 {
				compatible = "fsl,vf610-mscm-cpucfg", "syscon";
				reg = <0x40001000 0x800>;
			};

			mscm_ir: interrupt-controller@40001800 {
				compatible = "fsl,vf610-mscm-ir";
				reg = <0x40001800 0x400>;
				fsl,cpucfg = <&mscm_cpucfg>;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			edma0: dma-controller@40018000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40018000 0x2000>,
					<0x40024000 0x1000>,
					<0x40025000 0x1000>;
				dma-channels = <32>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
						<9 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX0>,
					<&clks VF610_CLK_DMAMUX1>;
				status = "disabled";
			};

			can0: flexcan@40020000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x40020000 0x4000>;
				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN0>,
					 <&clks VF610_CLK_FLEXCAN0>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			uart0: serial@40027000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40027000 0x1000>;
				interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART0>;
				clock-names = "ipg";
				dmas = <&edma0 0 2>,
					<&edma0 0 3>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart1: serial@40028000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40028000 0x1000>;
				interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART1>;
				clock-names = "ipg";
				dmas = <&edma0 0 4>,
					<&edma0 0 5>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart2: serial@40029000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x40029000 0x1000>;
				interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART2>;
				clock-names = "ipg";
				dmas = <&edma0 0 6>,
					<&edma0 0 7>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			uart3: serial@4002a000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x4002a000 0x1000>;
				interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART3>;
				clock-names = "ipg";
				dmas = <&edma0 0 8>,
					<&edma0 0 9>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			dspi0: dspi0@4002c000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002c000 0x1000>;
				interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI0>;
				clock-names = "dspi";
				spi-num-chipselects = <6>;
				status = "disabled";
			};

			dspi1: dspi1@4002d000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x4002d000 0x1000>;
				interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI1>;
				clock-names = "dspi";
				spi-num-chipselects = <4>;
				status = "disabled";
			};

			sai0: sai@4002f000 {
				compatible = "fsl,vf610-sai";
				reg = <0x4002f000 0x1000>;
				interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI0>,
					<&clks VF610_CLK_SAI0_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 17>,
					<&edma0 0 16>;
				status = "disabled";
			};

			sai1: sai@40030000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40030000 0x1000>;
				interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI1>,
					<&clks VF610_CLK_SAI1_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 19>,
					<&edma0 0 18>;
				status = "disabled";
			};

			sai2: sai@40031000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40031000 0x1000>;
				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI2>,
					<&clks VF610_CLK_SAI2_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 0 21>,
					<&edma0 0 20>;
				status = "disabled";
			};

			sai3: sai@40032000 {
				compatible = "fsl,vf610-sai";
				reg = <0x40032000 0x1000>;
				interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_SAI3>,
					<&clks VF610_CLK_SAI3_DIV>,
					<&clks 0>, <&clks 0>;
				clock-names = "bus", "mclk1", "mclk2", "mclk3";
				dma-names = "tx", "rx";
				dmas = <&edma0 1 9>,
					<&edma0 1 8>;
				status = "disabled";
			};

			pit: pit@40037000 {
				compatible = "fsl,vf610-pit";
				reg = <0x40037000 0x1000>;
				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_PIT>;
				clock-names = "pit";
			};

			pwm0: pwm@40038000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40038000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM0>,
					<&clks VF610_CLK_FTM0_EXT_SEL>,
					<&clks VF610_CLK_FTM0_FIX_SEL>,
					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
				status = "disabled";
			};

			pwm1: pwm@40039000 {
				compatible = "fsl,vf610-ftm-pwm";
				#pwm-cells = <3>;
				reg = <0x40039000 0x1000>;
				clock-names = "ftm_sys", "ftm_ext",
					      "ftm_fix", "ftm_cnt_clk_en";
				clocks = <&clks VF610_CLK_FTM1>,
					<&clks VF610_CLK_FTM1_EXT_SEL>,
					<&clks VF610_CLK_FTM1_FIX_SEL>,
					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
				status = "disabled";
			};

			adc0: adc@4003b000 {
				compatible = "fsl,vf610-adc";
				reg = <0x4003b000 0x1000>;
				interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ADC0>;
				clock-names = "adc";
				#io-channel-cells = <1>;
				status = "disabled";
				fsl,adck-max-frequency = <30000000>, <40000000>,
							<20000000>;
			};

			wdoga5: wdog@4003e000 {
				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
				reg = <0x4003e000 0x1000>;
				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_WDT>;
				clock-names = "wdog";
				status = "disabled";
			};

			qspi0: quadspi@40044000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI0_EN>,
					<&clks VF610_CLK_QSPI0>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			iomuxc: iomuxc@40048000 {
				compatible = "fsl,vf610-iomuxc";
				reg = <0x40048000 0x1000>;
			};

			gpio0: gpio@40049000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x40049000 0x1000 0x400ff000 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 0 32>;
			};

			gpio1: gpio@4004a000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 32 32>;
			};

			gpio2: gpio@4004b000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 64 32>;
			};

			gpio3: gpio@4004c000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 96 32>;
			};

			gpio4: gpio@4004d000 {
				compatible = "fsl,vf610-gpio";
				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <2>;
				gpio-ranges = <&iomuxc 0 128 7>;
			};

			anatop: anatop@40050000 {
				compatible = "fsl,vf610-anatop", "syscon";
				reg = <0x40050000 0x400>;
			};

			usbphy0: usbphy@40050800 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050800 0x400>;
				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY0>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			usbphy1: usbphy@40050c00 {
				compatible = "fsl,vf610-usbphy";
				reg = <0x40050c00 0x400>;
				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBPHY1>;
				fsl,anatop = <&anatop>;
				status = "disabled";
			};

			i2c0: i2c@40066000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40066000 0x1000>;
				interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C0>;
				clock-names = "ipg";
				dmas = <&edma0 0 50>,
					<&edma0 0 51>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			i2c1: i2c@40067000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x40067000 0x1000>;
				interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C1>;
				clock-names = "ipg";
				dmas = <&edma0 0 52>,
					<&edma0 0 53>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				clocks = <&sxosc>, <&fxosc>;
				clock-names = "sxosc", "fxosc";
				#clock-cells = <1>;
			};

			usbdev0: usb@40034000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x40034000 0x800>;
				interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC0>;
				fsl,usbphy = <&usbphy0>;
				fsl,usbmisc = <&usbmisc0 0>;
				dr_mode = "peripheral";
				status = "disabled";
			};

			usbmisc0: usb@40034800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x40034800 0x200>;
				clocks = <&clks VF610_CLK_USBC0>;
				status = "disabled";
			};

			src: src@4006e000 {
				compatible = "fsl,vf610-src", "syscon";
				reg = <0x4006e000 0x1000>;
				interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		aips1: aips-bus@40080000 {
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			edma1: dma-controller@40098000 {
				#dma-cells = <2>;
				compatible = "fsl,vf610-edma";
				reg = <0x40098000 0x2000>,
					<0x400a1000 0x1000>,
					<0x400a2000 0x1000>;
				dma-channels = <32>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
						<11 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "edma-tx", "edma-err";
				clock-names = "dmamux0", "dmamux1";
				clocks = <&clks VF610_CLK_DMAMUX2>,
					<&clks VF610_CLK_DMAMUX3>;
				status = "disabled";
			};

			snvs0: snvs@400a7000 {
			    compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
				reg = <0x400a7000 0x2000>;

				snvsrtc: snvs-rtc-lp {
					compatible = "fsl,sec-v4.0-mon-rtc-lp";
					regmap = <&snvs0>;
					offset = <0x34>;
					interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
					clocks = <&clks VF610_CLK_SNVS>;
					clock-names = "snvs-rtc";
				};
			};

			uart4: serial@400a9000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400a9000 0x1000>;
				interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART4>;
				clock-names = "ipg";
				status = "disabled";
			};

			uart5: serial@400aa000 {
				compatible = "fsl,vf610-lpuart";
				reg = <0x400aa000 0x1000>;
				interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_UART5>;
				clock-names = "ipg";
				status = "disabled";
			};

			dspi2: dspi2@400ac000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x400ac000 0x1000>;
				interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI2>;
				clock-names = "dspi";
				spi-num-chipselects = <2>;
				status = "disabled";
			};

			dspi3: dspi3@400ad000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-dspi";
				reg = <0x400ad000 0x1000>;
				interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_DSPI3>;
				clock-names = "dspi";
				spi-num-chipselects = <2>;
				status = "disabled";
			};

			adc1: adc@400bb000 {
				compatible = "fsl,vf610-adc";
				reg = <0x400bb000 0x1000>;
				interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ADC1>;
				clock-names = "adc";
				#io-channel-cells = <1>;
				status = "disabled";
				fsl,adck-max-frequency = <30000000>, <40000000>,
							<20000000>;
			};

			esdhc0: esdhc@400b1000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b1000 0x1000>;
				interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC0>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			esdhc1: esdhc@400b2000 {
				compatible = "fsl,imx53-esdhc";
				reg = <0x400b2000 0x1000>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_IPG_BUS>,
					<&clks VF610_CLK_PLATFORM_BUS>,
					<&clks VF610_CLK_ESDHC1>;
				clock-names = "ipg", "ahb", "per";
				status = "disabled";
			};

			usbh1: usb@400b4000 {
				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
				reg = <0x400b4000 0x800>;
				interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_USBC1>;
				fsl,usbphy = <&usbphy1>;
				fsl,usbmisc = <&usbmisc1 0>;
				dr_mode = "host";
				status = "disabled";
			};

			usbmisc1: usb@400b4800 {
				#index-cells = <1>;
				compatible = "fsl,vf610-usbmisc";
				reg = <0x400b4800 0x200>;
				clocks = <&clks VF610_CLK_USBC1>;
				status = "disabled";
			};

			ftm: ftm@400b8000 {
				compatible = "fsl,ftm-timer";
				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
				interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
				clock-names = "ftm-evt", "ftm-src",
					"ftm-evt-counter-en", "ftm-src-counter-en";
				clocks = <&clks VF610_CLK_FTM2>,
					<&clks VF610_CLK_FTM3>,
					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
				status = "disabled";
			};

			qspi1: quadspi@400c4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-qspi";
				reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
				reg-names = "QuadSPI", "QuadSPI-memory";
				interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_QSPI1_EN>,
					<&clks VF610_CLK_QSPI1>;
				clock-names = "qspi_en", "qspi";
				status = "disabled";
			};

			fec0: ethernet@400d0000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d0000 0x1000>;
				interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET0>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			fec1: ethernet@400d1000 {
				compatible = "fsl,mvf600-fec";
				reg = <0x400d1000 0x1000>;
				interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET1>,
					<&clks VF610_CLK_ENET>;
				clock-names = "ipg", "ahb", "ptp";
				status = "disabled";
			};

			can1: flexcan@400d4000 {
				compatible = "fsl,vf610-flexcan";
				reg = <0x400d4000 0x4000>;
				interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_FLEXCAN1>,
					 <&clks VF610_CLK_FLEXCAN1>;
				clock-names = "ipg", "per";
				status = "disabled";
			};

			nfc: nand@400e0000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-nfc";
				reg = <0x400e0000 0x4000>;
				interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_NFC>;
				clock-names = "nfc";
				status = "disabled";
			};

			i2c2: i2c@400e6000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e6000 0x1000>;
				interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C2>;
				clock-names = "ipg";
				dmas = <&edma0 1 36>,
					<&edma0 1 37>;
				dma-names = "rx","tx";
				status = "disabled";
			};

			i2c3: i2c@400e7000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,vf610-i2c";
				reg = <0x400e7000 0x1000>;
				interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks VF610_CLK_I2C3>;
				clock-names = "ipg";
				dmas = <&edma0 1 38>,
					<&edma0 1 39>;
				dma-names = "rx","tx";
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
efb45b30 SA	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#include "vf610-pinfunc.h"
	11	#include <dt-bindings/clock/vf610-clock.h>
	12	#include <dt-bindings/interrupt-controller/irq.h>
2b36bda3	13	#include <dt-bindings/gpio/gpio.h>
efb45b30 SA	14
	15	/ {
	16	aliases {
	17	can0 = &can0;
	18	can1 = &can1;
17566c72 SA	19	ethernet0 = &fec0;
17566c72 SA	20	ethernet1 = &fec1;
efb45b30 SA	21	serial0 = &uart0;
	22	serial1 = &uart1;
	23	serial2 = &uart2;
	24	serial3 = &uart3;
	25	serial4 = &uart4;
	26	serial5 = &uart5;
76713954 SA	27	gpio0 = &gpio0;
	28	gpio1 = &gpio1;
	29	gpio2 = &gpio2;
	30	gpio3 = &gpio3;
	31	gpio4 = &gpio4;
efb45b30 SA	32	usbphy0 = &usbphy0;
	33	usbphy1 = &usbphy1;
	34	};
	35
	36	fxosc: fxosc {
	37	compatible = "fixed-clock";
	38	#clock-cells = <0>;
	39	clock-frequency = <24000000>;
	40	};
	41
	42	sxosc: sxosc {
	43	compatible = "fixed-clock";
	44	#clock-cells = <0>;
	45	clock-frequency = <32768>;
	46	};
	47
0d018d73 SA	48	reboot: syscon-reboot {
	49	compatible = "syscon-reboot";
	50	regmap = <&src>;
	51	offset = <0x0>;
	52	mask = <0x1000>;
	53	};
	54
efb45b30 SA	55	soc {
	56	#address-cells = <1>;
	57	#size-cells = <1>;
	58	compatible = "simple-bus";
c09d0f7c	59	interrupt-parent = <&mscm_ir>;
efb45b30 SA	60	ranges;
	61
	62	aips0: aips-bus@40000000 {
	63	compatible = "fsl,aips-bus", "simple-bus";
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66	ranges;
	67
c09d0f7c SA	68	mscm_cpucfg: cpucfg@40001000 {
	69	compatible = "fsl,vf610-mscm-cpucfg", "syscon";
	70	reg = <0x40001000 0x800>;
	71	};
	72
	73	mscm_ir: interrupt-controller@40001800 {
	74	compatible = "fsl,vf610-mscm-ir";
	75	reg = <0x40001800 0x400>;
	76	fsl,cpucfg = <&mscm_cpucfg>;
	77	interrupt-controller;
	78	#interrupt-cells = <2>;
	79	};
	80
efb45b30 SA	81	edma0: dma-controller@40018000 {
	82	#dma-cells = <2>;
	83	compatible = "fsl,vf610-edma";
	84	reg = <0x40018000 0x2000>,
	85	<0x40024000 0x1000>,
	86	<0x40025000 0x1000>;
	87	dma-channels = <32>;
c09d0f7c SA	88	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
	89	<9 IRQ_TYPE_LEVEL_HIGH>;
	90	interrupt-names = "edma-tx", "edma-err";
efb45b30 SA	91	clock-names = "dmamux0", "dmamux1";
	92	clocks = <&clks VF610_CLK_DMAMUX0>,
	93	<&clks VF610_CLK_DMAMUX1>;
	94	status = "disabled";
	95	};
	96
	97	can0: flexcan@40020000 {
	98	compatible = "fsl,vf610-flexcan";
	99	reg = <0x40020000 0x4000>;
c09d0f7c	100	interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	101	clocks = <&clks VF610_CLK_FLEXCAN0>,
	102	<&clks VF610_CLK_FLEXCAN0>;
	103	clock-names = "ipg", "per";
	104	status = "disabled";
	105	};
	106
	107	uart0: serial@40027000 {
	108	compatible = "fsl,vf610-lpuart";
	109	reg = <0x40027000 0x1000>;
c09d0f7c	110	interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	111	clocks = <&clks VF610_CLK_UART0>;
	112	clock-names = "ipg";
	113	dmas = <&edma0 0 2>,
	114	<&edma0 0 3>;
	115	dma-names = "rx","tx";
	116	status = "disabled";
	117	};
	118
	119	uart1: serial@40028000 {
	120	compatible = "fsl,vf610-lpuart";
	121	reg = <0x40028000 0x1000>;
c09d0f7c	122	interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	123	clocks = <&clks VF610_CLK_UART1>;
	124	clock-names = "ipg";
	125	dmas = <&edma0 0 4>,
	126	<&edma0 0 5>;
	127	dma-names = "rx","tx";
	128	status = "disabled";
	129	};
	130
	131	uart2: serial@40029000 {
	132	compatible = "fsl,vf610-lpuart";
	133	reg = <0x40029000 0x1000>;
c09d0f7c	134	interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	135	clocks = <&clks VF610_CLK_UART2>;
	136	clock-names = "ipg";
	137	dmas = <&edma0 0 6>,
	138	<&edma0 0 7>;
	139	dma-names = "rx","tx";
	140	status = "disabled";
	141	};
	142
	143	uart3: serial@4002a000 {
	144	compatible = "fsl,vf610-lpuart";
	145	reg = <0x4002a000 0x1000>;
c09d0f7c	146	interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	147	clocks = <&clks VF610_CLK_UART3>;
	148	clock-names = "ipg";
	149	dmas = <&edma0 0 8>,
	150	<&edma0 0 9>;
	151	dma-names = "rx","tx";
	152	status = "disabled";
	153	};
	154
	155	dspi0: dspi0@4002c000 {
	156	#address-cells = <1>;
	157	#size-cells = <0>;
	158	compatible = "fsl,vf610-dspi";
	159	reg = <0x4002c000 0x1000>;
c09d0f7c	160	interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	161	clocks = <&clks VF610_CLK_DSPI0>;
efb45b30 SA	162	clock-names = "dspi";
897ed0ca	163	spi-num-chipselects = <6>;
efb45b30 SA	164	status = "disabled";
	165	};
	166
1b545c17 BD	167	dspi1: dspi1@4002d000 {
	168	#address-cells = <1>;
	169	#size-cells = <0>;
	170	compatible = "fsl,vf610-dspi";
	171	reg = <0x4002d000 0x1000>;
c09d0f7c	172	interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
1b545c17 BD	173	clocks = <&clks VF610_CLK_DSPI1>;
1b545c17 BD	174	clock-names = "dspi";
897ed0ca	175	spi-num-chipselects = <4>;
1b545c17 BD	176	status = "disabled";
	177	};
	178
26a91d89 SA	179	sai0: sai@4002f000 {
	180	compatible = "fsl,vf610-sai";
	181	reg = <0x4002f000 0x1000>;
	182	interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
	183	clocks = <&clks VF610_CLK_SAI0>,
	184	<&clks VF610_CLK_SAI0_DIV>,
	185	<&clks 0>, <&clks 0>;
	186	clock-names = "bus", "mclk1", "mclk2", "mclk3";
	187	dma-names = "tx", "rx";
	188	dmas = <&edma0 0 17>,
	189	<&edma0 0 16>;
	190	status = "disabled";
	191	};
	192
	193	sai1: sai@40030000 {
	194	compatible = "fsl,vf610-sai";
	195	reg = <0x40030000 0x1000>;
	196	interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
	197	clocks = <&clks VF610_CLK_SAI1>,
	198	<&clks VF610_CLK_SAI1_DIV>,
	199	<&clks 0>, <&clks 0>;
	200	clock-names = "bus", "mclk1", "mclk2", "mclk3";
	201	dma-names = "tx", "rx";
	202	dmas = <&edma0 0 19>,
	203	<&edma0 0 18>;
	204	status = "disabled";
	205	};
	206
efb45b30 SA	207	sai2: sai@40031000 {
	208	compatible = "fsl,vf610-sai";
	209	reg = <0x40031000 0x1000>;
c09d0f7c	210	interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
531ee1f4 SA	211	clocks = <&clks VF610_CLK_SAI2>,
	212	<&clks VF610_CLK_SAI2_DIV>,
	213	<&clks 0>, <&clks 0>;
	214	clock-names = "bus", "mclk1", "mclk2", "mclk3";
efb45b30 SA	215	dma-names = "tx", "rx";
	216	dmas = <&edma0 0 21>,
	217	<&edma0 0 20>;
	218	status = "disabled";
	219	};
	220
26a91d89 SA	221	sai3: sai@40032000 {
	222	compatible = "fsl,vf610-sai";
	223	reg = <0x40032000 0x1000>;
	224	interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
	225	clocks = <&clks VF610_CLK_SAI3>,
	226	<&clks VF610_CLK_SAI3_DIV>,
	227	<&clks 0>, <&clks 0>;
	228	clock-names = "bus", "mclk1", "mclk2", "mclk3";
	229	dma-names = "tx", "rx";
	230	dmas = <&edma0 1 9>,
	231	<&edma0 1 8>;
	232	status = "disabled";
	233	};
	234
efb45b30 SA	235	pit: pit@40037000 {
	236	compatible = "fsl,vf610-pit";
	237	reg = <0x40037000 0x1000>;
c09d0f7c	238	interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	239	clocks = <&clks VF610_CLK_PIT>;
	240	clock-names = "pit";
	241	};
	242
	243	pwm0: pwm@40038000 {
	244	compatible = "fsl,vf610-ftm-pwm";
	245	#pwm-cells = <3>;
	246	reg = <0x40038000 0x1000>;
	247	clock-names = "ftm_sys", "ftm_ext",
	248	"ftm_fix", "ftm_cnt_clk_en";
	249	clocks = <&clks VF610_CLK_FTM0>,
	250	<&clks VF610_CLK_FTM0_EXT_SEL>,
	251	<&clks VF610_CLK_FTM0_FIX_SEL>,
	252	<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
	253	status = "disabled";
	254	};
	255
	256	pwm1: pwm@40039000 {
	257	compatible = "fsl,vf610-ftm-pwm";
	258	#pwm-cells = <3>;
	259	reg = <0x40039000 0x1000>;
	260	clock-names = "ftm_sys", "ftm_ext",
	261	"ftm_fix", "ftm_cnt_clk_en";
	262	clocks = <&clks VF610_CLK_FTM1>,
	263	<&clks VF610_CLK_FTM1_EXT_SEL>,
	264	<&clks VF610_CLK_FTM1_FIX_SEL>,
	265	<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
	266	status = "disabled";
	267	};
	268
	269	adc0: adc@4003b000 {
	270	compatible = "fsl,vf610-adc";
	271	reg = <0x4003b000 0x1000>;
c09d0f7c	272	interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	273	clocks = <&clks VF610_CLK_ADC0>;
efb45b30 SA	274	clock-names = "adc";
9b1793af	275	#io-channel-cells = <1>;
efb45b30	276	status = "disabled";
def0641e SA	277	fsl,adck-max-frequency = <30000000>, <40000000>,
def0641e SA	278	<20000000>;
efb45b30 SA	279	};
efb45b30 SA	280
c134e09f	281	wdoga5: wdog@4003e000 {
efb45b30 SA	282	compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
efb45b30 SA	283	reg = <0x4003e000 0x1000>;
c09d0f7c	284	interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	285	clocks = <&clks VF610_CLK_WDT>;
	286	clock-names = "wdog";
	287	status = "disabled";
	288	};
	289
	290	qspi0: quadspi@40044000 {
	291	#address-cells = <1>;
	292	#size-cells = <0>;
	293	compatible = "fsl,vf610-qspi";
f4b89232 CT	294	reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
f4b89232 CT	295	reg-names = "QuadSPI", "QuadSPI-memory";
c09d0f7c	296	interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	297	clocks = <&clks VF610_CLK_QSPI0_EN>,
	298	<&clks VF610_CLK_QSPI0>;
	299	clock-names = "qspi_en", "qspi";
	300	status = "disabled";
	301	};
	302
	303	iomuxc: iomuxc@40048000 {
	304	compatible = "fsl,vf610-iomuxc";
	305	reg = <0x40048000 0x1000>;
efb45b30 SA	306	};
efb45b30 SA	307
76713954	308	gpio0: gpio@40049000 {
efb45b30 SA	309	compatible = "fsl,vf610-gpio";
	310	reg = <0x40049000 0x1000 0x400ff000 0x40>;
	311	gpio-controller;
	312	#gpio-cells = <2>;
c09d0f7c	313	interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	314	interrupt-controller;
	315	#interrupt-cells = <2>;
	316	gpio-ranges = <&iomuxc 0 0 32>;
	317	};
	318
76713954	319	gpio1: gpio@4004a000 {
efb45b30 SA	320	compatible = "fsl,vf610-gpio";
	321	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
	322	gpio-controller;
	323	#gpio-cells = <2>;
c09d0f7c	324	interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	325	interrupt-controller;
	326	#interrupt-cells = <2>;
	327	gpio-ranges = <&iomuxc 0 32 32>;
	328	};
	329
76713954	330	gpio2: gpio@4004b000 {
efb45b30 SA	331	compatible = "fsl,vf610-gpio";
	332	reg = <0x4004b000 0x1000 0x400ff080 0x40>;
	333	gpio-controller;
	334	#gpio-cells = <2>;
c09d0f7c	335	interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	336	interrupt-controller;
	337	#interrupt-cells = <2>;
	338	gpio-ranges = <&iomuxc 0 64 32>;
	339	};
	340
76713954	341	gpio3: gpio@4004c000 {
efb45b30 SA	342	compatible = "fsl,vf610-gpio";
	343	reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
	344	gpio-controller;
	345	#gpio-cells = <2>;
c09d0f7c	346	interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	347	interrupt-controller;
	348	#interrupt-cells = <2>;
	349	gpio-ranges = <&iomuxc 0 96 32>;
	350	};
	351
76713954	352	gpio4: gpio@4004d000 {
efb45b30 SA	353	compatible = "fsl,vf610-gpio";
	354	reg = <0x4004d000 0x1000 0x400ff100 0x40>;
	355	gpio-controller;
	356	#gpio-cells = <2>;
c09d0f7c	357	interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	358	interrupt-controller;
	359	#interrupt-cells = <2>;
	360	gpio-ranges = <&iomuxc 0 128 7>;
	361	};
	362
	363	anatop: anatop@40050000 {
	364	compatible = "fsl,vf610-anatop", "syscon";
	365	reg = <0x40050000 0x400>;
	366	};
	367
	368	usbphy0: usbphy@40050800 {
	369	compatible = "fsl,vf610-usbphy";
	370	reg = <0x40050800 0x400>;
c09d0f7c	371	interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	372	clocks = <&clks VF610_CLK_USBPHY0>;
	373	fsl,anatop = <&anatop>;
	374	status = "disabled";
	375	};
	376
	377	usbphy1: usbphy@40050c00 {
	378	compatible = "fsl,vf610-usbphy";
	379	reg = <0x40050c00 0x400>;
c09d0f7c	380	interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	381	clocks = <&clks VF610_CLK_USBPHY1>;
	382	fsl,anatop = <&anatop>;
	383	status = "disabled";
	384	};
	385
	386	i2c0: i2c@40066000 {
	387	#address-cells = <1>;
	388	#size-cells = <0>;
	389	compatible = "fsl,vf610-i2c";
	390	reg = <0x40066000 0x1000>;
c09d0f7c	391	interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	392	clocks = <&clks VF610_CLK_I2C0>;
	393	clock-names = "ipg";
	394	dmas = <&edma0 0 50>,
	395	<&edma0 0 51>;
	396	dma-names = "rx","tx";
	397	status = "disabled";
	398	};
	399
2d4e4a62 CT	400	i2c1: i2c@40067000 {
	401	#address-cells = <1>;
	402	#size-cells = <0>;
	403	compatible = "fsl,vf610-i2c";
	404	reg = <0x40067000 0x1000>;
	405	interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
	406	clocks = <&clks VF610_CLK_I2C1>;
	407	clock-names = "ipg";
	408	dmas = <&edma0 0 52>,
	409	<&edma0 0 53>;
	410	dma-names = "rx","tx";
	411	status = "disabled";
	412	};
	413
efb45b30 SA	414	clks: ccm@4006b000 {
	415	compatible = "fsl,vf610-ccm";
	416	reg = <0x4006b000 0x1000>;
	417	clocks = <&sxosc>, <&fxosc>;
	418	clock-names = "sxosc", "fxosc";
	419	#clock-cells = <1>;
	420	};
	421
	422	usbdev0: usb@40034000 {
	423	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	424	reg = <0x40034000 0x800>;
c09d0f7c	425	interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	426	clocks = <&clks VF610_CLK_USBC0>;
	427	fsl,usbphy = <&usbphy0>;
	428	fsl,usbmisc = <&usbmisc0 0>;
	429	dr_mode = "peripheral";
	430	status = "disabled";
	431	};
	432
	433	usbmisc0: usb@40034800 {
	434	#index-cells = <1>;
	435	compatible = "fsl,vf610-usbmisc";
	436	reg = <0x40034800 0x200>;
	437	clocks = <&clks VF610_CLK_USBC0>;
	438	status = "disabled";
	439	};
0d018d73 SA	440
	441	src: src@4006e000 {
	442	compatible = "fsl,vf610-src", "syscon";
	443	reg = <0x4006e000 0x1000>;
53f643d2	444	interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
0d018d73	445	};
efb45b30 SA	446	};
	447
	448	aips1: aips-bus@40080000 {
	449	compatible = "fsl,aips-bus", "simple-bus";
	450	#address-cells = <1>;
	451	#size-cells = <1>;
	452	ranges;
	453
	454	edma1: dma-controller@40098000 {
	455	#dma-cells = <2>;
	456	compatible = "fsl,vf610-edma";
	457	reg = <0x40098000 0x2000>,
	458	<0x400a1000 0x1000>,
	459	<0x400a2000 0x1000>;
	460	dma-channels = <32>;
c09d0f7c SA	461	interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
	462	<11 IRQ_TYPE_LEVEL_HIGH>;
	463	interrupt-names = "edma-tx", "edma-err";
efb45b30 SA	464	clock-names = "dmamux0", "dmamux1";
	465	clocks = <&clks VF610_CLK_DMAMUX2>,
	466	<&clks VF610_CLK_DMAMUX3>;
	467	status = "disabled";
	468	};
	469
8455dd0d	470	snvs0: snvs@400a7000 {
95d739b5 FL	471	compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
95d739b5 FL	472	reg = <0x400a7000 0x2000>;
8455dd0d	473
95d739b5	474	snvsrtc: snvs-rtc-lp {
8455dd0d	475	compatible = "fsl,sec-v4.0-mon-rtc-lp";
95d739b5 FL	476	regmap = <&snvs0>;
95d739b5 FL	477	offset = <0x34>;
53f643d2	478	interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
8455dd0d SM	479	clocks = <&clks VF610_CLK_SNVS>;
	480	clock-names = "snvs-rtc";
	481	};
	482	};
	483
efb45b30 SA	484	uart4: serial@400a9000 {
	485	compatible = "fsl,vf610-lpuart";
	486	reg = <0x400a9000 0x1000>;
c09d0f7c	487	interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	488	clocks = <&clks VF610_CLK_UART4>;
	489	clock-names = "ipg";
	490	status = "disabled";
	491	};
	492
	493	uart5: serial@400aa000 {
	494	compatible = "fsl,vf610-lpuart";
	495	reg = <0x400aa000 0x1000>;
c09d0f7c	496	interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	497	clocks = <&clks VF610_CLK_UART5>;
	498	clock-names = "ipg";
	499	status = "disabled";
	500	};
	501
5f060c71 CT	502	dspi2: dspi2@400ac000 {
	503	#address-cells = <1>;
	504	#size-cells = <0>;
	505	compatible = "fsl,vf610-dspi";
	506	reg = <0x400ac000 0x1000>;
	507	interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
	508	clocks = <&clks VF610_CLK_DSPI2>;
	509	clock-names = "dspi";
	510	spi-num-chipselects = <2>;
	511	status = "disabled";
	512	};
	513
	514	dspi3: dspi3@400ad000 {
	515	#address-cells = <1>;
	516	#size-cells = <0>;
	517	compatible = "fsl,vf610-dspi";
	518	reg = <0x400ad000 0x1000>;
	519	interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
	520	clocks = <&clks VF610_CLK_DSPI3>;
	521	clock-names = "dspi";
	522	spi-num-chipselects = <2>;
	523	status = "disabled";
	524	};
	525
efb45b30 SA	526	adc1: adc@400bb000 {
	527	compatible = "fsl,vf610-adc";
	528	reg = <0x400bb000 0x1000>;
c09d0f7c	529	interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	530	clocks = <&clks VF610_CLK_ADC1>;
efb45b30 SA	531	clock-names = "adc";
9b1793af	532	#io-channel-cells = <1>;
efb45b30	533	status = "disabled";
3fa2f949 SM	534	fsl,adck-max-frequency = <30000000>, <40000000>,
3fa2f949 SM	535	<20000000>;
efb45b30 SA	536	};
efb45b30 SA	537
3b7816ba CT	538	esdhc0: esdhc@400b1000 {
	539	compatible = "fsl,imx53-esdhc";
	540	reg = <0x400b1000 0x1000>;
	541	interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
	542	clocks = <&clks VF610_CLK_IPG_BUS>,
	543	<&clks VF610_CLK_PLATFORM_BUS>,
	544	<&clks VF610_CLK_ESDHC0>;
	545	clock-names = "ipg", "ahb", "per";
	546	status = "disabled";
	547	};
	548
efb45b30 SA	549	esdhc1: esdhc@400b2000 {
	550	compatible = "fsl,imx53-esdhc";
	551	reg = <0x400b2000 0x1000>;
c09d0f7c	552	interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	553	clocks = <&clks VF610_CLK_IPG_BUS>,
	554	<&clks VF610_CLK_PLATFORM_BUS>,
	555	<&clks VF610_CLK_ESDHC1>;
	556	clock-names = "ipg", "ahb", "per";
	557	status = "disabled";
	558	};
	559
	560	usbh1: usb@400b4000 {
	561	compatible = "fsl,vf610-usb", "fsl,imx27-usb";
	562	reg = <0x400b4000 0x800>;
c09d0f7c	563	interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	564	clocks = <&clks VF610_CLK_USBC1>;
	565	fsl,usbphy = <&usbphy1>;
	566	fsl,usbmisc = <&usbmisc1 0>;
	567	dr_mode = "host";
	568	status = "disabled";
	569	};
	570
	571	usbmisc1: usb@400b4800 {
	572	#index-cells = <1>;
	573	compatible = "fsl,vf610-usbmisc";
	574	reg = <0x400b4800 0x200>;
	575	clocks = <&clks VF610_CLK_USBC1>;
	576	status = "disabled";
	577	};
	578
	579	ftm: ftm@400b8000 {
	580	compatible = "fsl,ftm-timer";
	581	reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
c09d0f7c	582	interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	583	clock-names = "ftm-evt", "ftm-src",
	584	"ftm-evt-counter-en", "ftm-src-counter-en";
	585	clocks = <&clks VF610_CLK_FTM2>,
	586	<&clks VF610_CLK_FTM3>,
	587	<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
	588	<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
	589	status = "disabled";
	590	};
	591
6f5e6967 CT	592	qspi1: quadspi@400c4000 {
	593	#address-cells = <1>;
	594	#size-cells = <0>;
	595	compatible = "fsl,vf610-qspi";
	596	reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
	597	reg-names = "QuadSPI", "QuadSPI-memory";
	598	interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
	599	clocks = <&clks VF610_CLK_QSPI1_EN>,
	600	<&clks VF610_CLK_QSPI1>;
	601	clock-names = "qspi_en", "qspi";
	602	status = "disabled";
	603	};
	604
efb45b30 SA	605	fec0: ethernet@400d0000 {
	606	compatible = "fsl,mvf600-fec";
	607	reg = <0x400d0000 0x1000>;
c09d0f7c	608	interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	609	clocks = <&clks VF610_CLK_ENET0>,
	610	<&clks VF610_CLK_ENET0>,
	611	<&clks VF610_CLK_ENET>;
	612	clock-names = "ipg", "ahb", "ptp";
	613	status = "disabled";
	614	};
	615
	616	fec1: ethernet@400d1000 {
	617	compatible = "fsl,mvf600-fec";
	618	reg = <0x400d1000 0x1000>;
c09d0f7c	619	interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	620	clocks = <&clks VF610_CLK_ENET1>,
	621	<&clks VF610_CLK_ENET1>,
	622	<&clks VF610_CLK_ENET>;
	623	clock-names = "ipg", "ahb", "ptp";
	624	status = "disabled";
	625	};
	626
	627	can1: flexcan@400d4000 {
	628	compatible = "fsl,vf610-flexcan";
	629	reg = <0x400d4000 0x4000>;
c09d0f7c	630	interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
efb45b30 SA	631	clocks = <&clks VF610_CLK_FLEXCAN1>,
	632	<&clks VF610_CLK_FLEXCAN1>;
	633	clock-names = "ipg", "per";
	634	status = "disabled";
	635	};
	636
baeeb541 SA	637	nfc: nand@400e0000 {
	638	#address-cells = <1>;
	639	#size-cells = <0>;
	640	compatible = "fsl,vf610-nfc";
	641	reg = <0x400e0000 0x4000>;
	642	interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
	643	clocks = <&clks VF610_CLK_NFC>;
	644	clock-names = "nfc";
	645	status = "disabled";
	646	};
	647
2d4e4a62 CT	648	i2c2: i2c@400e6000 {
	649	#address-cells = <1>;
	650	#size-cells = <0>;
	651	compatible = "fsl,vf610-i2c";
	652	reg = <0x400e6000 0x1000>;
	653	interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
	654	clocks = <&clks VF610_CLK_I2C2>;
	655	clock-names = "ipg";
	656	dmas = <&edma0 1 36>,
	657	<&edma0 1 37>;
	658	dma-names = "rx","tx";
	659	status = "disabled";
	660	};
	661
	662	i2c3: i2c@400e7000 {
	663	#address-cells = <1>;
	664	#size-cells = <0>;
	665	compatible = "fsl,vf610-i2c";
	666	reg = <0x400e7000 0x1000>;
	667	interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
	668	clocks = <&clks VF610_CLK_I2C3>;
	669	clock-names = "ipg";
	670	dmas = <&edma0 1 38>,
	671	<&edma0 1 39>;
	672	dma-names = "rx","tx";
	673	status = "disabled";
	674	};
efb45b30 SA	675	};
	676	};
	677	};